The advancements of semiconductor processing technology have led to the ability for computing platforms to operate on large amounts of data at very high clock speeds. To fully utilize this processing power the components must have data continually available for operation upon and transport to other system components. To enable this data requirement, high speed serial links have replaced slower parallel communication protocols. Serial interfaces inherently require fewer signals for communication and thus reduce the device pin count, area and cost. A serial communication interface can also be run at a higher frequency because the clock skew between channels is no longer an issue since the data transmitted on various channels is independent. Serial data transmission also comes with a set of drawbacks when signal integrity is considered. The data must propagate through a channel that induces unwanted effects onto the signals such as intersymbol interference. These channel effects must be understood and mitigated to successfully transmit data without creating bit errors upon reception at the target component. Previously developed adaptive equalization techniques have been used to filter the effects of intersymbol interference from the transmitted data in the signal. This report explores the modeling and implementation of a system comprised of a transmitter, channel, and receiver to understand how intersymbol interference can be removed through a decision-feedback equalizer realized in hardware. The equalizer design, implementation, and measurements are the main focus of this report and are based on previous works in the areas of integrated circuit testing, channel modeling, and equalizer design. Simulation results from a system modeled in Simulink are compared against the results from a hardware model implemented with an FPGA, analog to digital converter and discrete circuit elements. In both the software and hardware models, bit errors were eliminated for certain amounts of intersymbol interference when a receiver with decision-feedback equalization was used instead of a receiver without equalization. / text

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MPI-IO, the parallel I/O functionality of MPI-2, is a portable interface designed specifically to achieve high-performance. This thesis proposes fundamental design criteria influencing the performance of a portable high performance I/O middleware. This thesis hypothesizes that overlap of I/O and computation and agglomeration of I/O requests based on an application's access pattern improve the performance of a portable parallel I/O implementation. The work included the development of MercutIO, a complete, portable, high performance MPI-IO implementation. MercutIO achieves portability through the Bulldog Abstract File System, a portable, efficient non-collective I/O interface, also developed in this thesis work. A new data access model based on non-blocking semantics is presented here. Two new I/O metrics (degree of overlapping and degree of non-contiguity) as well as parallel I/O benchmarks essential in the performance appraisal of a parallel I/O implementation are introduced in this thesis.

Traditional file access interfaces rely on ubiquitous transports that impose severe restrictions on performance and prove insufficient for adaptation to parallel Input/Output (I/O). Remote Direct Memory Access based (RDMA-based) approaches are aimed at moving data between different process address spaces with streamlined mediation and reduced involvement of the operating system using synchronization semantics that are different from ubiquitous transports. This thesis studies the adaptability of RDMA-based transports to parallel I/O. Combining RDMA semantics with parallel I/O leads to overhead reduction by overlapping communication and computation and by bandwidth enhancement. Although parallel I/O tends to increase latency in certain cases, use of RDMA techniques mitigate on this effect.

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This thesis investigates two aspects of the protocol IO-Link Wireless (IOL-W), a wireless derivative of the widely established network protocol for industry automation IO-Link (IOL). There is an increasing interest in using wireless solutions within the automation industry. The IOL-W protocol is developed to meet the needs of a wireless protocol that can meet the stringent reliability requirements of industrial applications. The first investigated aspect is whether it is feasible to port existing IOL stacks to IOL-W. The second aspect investigates the possibility to establish IOL-W communication using a generic hardware board supporting Bluetooth Low Energy (BLE) and IEEE 802.15.4, specifically the nRF architecture manufactured by Nordic Semiconductor. The properties and mechanisms of the physical layer of IOL-W are thoroughly researched. Afterward, two open-source IOL stacks are examined as potential candidates for protocol porting. From that examination, the main conclusion is that for a commercial project, it is more feasible to invest in a native IOL-W stack. Porting an IOL stack to IOL-W would be immensely time-consuming since it is not enough only to replace the code responsible for handling the physical layer. One would also need to modify the system management module embedded within every hardware layer. Lastly, the nRF hardware is examined, focusing on its radio capabilities. Several problems arose with the radio configuration and the CRC capability of the nRF boards from the subsequent investigation and experiments; therefore, it is concluded that this particular hardware is inappropriate for implementing IOL-W. / Den här uppsatsen granskar två aspekter av protokollet IO-Link Wireless (IOL-W), en trådlös version av det etablerade protokollet IO-Link (IOL). Det finns ett ökat intresse för trådlösa lösningar i Automationsindustrin och IOL-W protokollet är utvecklat för att bemöta det ökade behovet av pålitlig trådlös industriell kommunikation. Den första aspekten granskar huruvida det är möjligt att konvertera en IOL stack till en IOL-W stack. Den andra aspekten utreder om det är möjligt att etablera IOL-W kommunikation med hårdvara designad för Bluetooth Low Energy (BLE) och IEEE 802.15.4, mer specifikt, nRF arkitekturen tillverkad av Nordic Semiconductor. Egenskaperna och mekanismerna av "physical layer" av IOL-W är grundligt undersökt. Två IOL stackar har granskats och det har undersökts huruvida det med rimlig arbetsinsats går att konvertera någon av dem till IOL-W stackar. Undersökningen kommer att huvudsakligen konstatera att, för ett kommersiellt projekt är det bästa alternativet att investera i en färdig IOL-W stack. Att konvertera en IOL stack till en IOL-W stack är en tidskonsumerande uppgift och kräver grundlig kännedom i både IOL och IOL-W, att ersätta dom nedre lagren av en IOL stack är inte en rekommenderad lösning, eftersom System management modulen kommer att behövas modifieras, då den är inbyggd i varje lager av abstraktions modellen. Till sist, kommer nRF hårdvaran att examineras, fokus kommer att ligga på radions förmåga och kompabilitet. Under projektet gång dök ett flertal problem upp med radio konfigurationen samt CRC förmågan, detta kommer att presenteras med flertalet granskningar och experiment. Slutsatsen av undersökningen blir att nRF hårdvaran inte är lämplig att använda som bas för en implementation av IOL-W.

Sjöfartshögskolan i Kalmar har kurser i bl.a. programmerbara styrsystem. För att undervisningen ska ta steget in i Industri 4.0 vill skolan först ha utlåtande om svårighetsgraden att implementera en IO-linkgivare i befintlig process. Syftet med arbetet var att installera och konfigurera en IO-linkgivare i skolans ånganläggning för att på så sätt kunna utvärdera implementeringsarbetets svårighetsgrad. Detta sattes sedan i relation till att istället installera en traditionell analog tryckgivare. Genom att göra en installation och konfiguration implementerades IO-linkgivaren och för kontroll av funktion genomfördes en provning mot befintlig mätutrustning som referenser. Resultatet visade på en relativt komplicerad implementering men ett noggrant mätvärde samt många möjligheter utöver det. / The Maritime Academy in Kalmar wanted to learn about how the implementation of IO-link sensors in a steam process could be used in teaching. The work aimed to investigate how an IO-link sensor works and provide input to develop the content of the school's programming courses. This was done by first implementing a new pressure sensor (IO-Link) in a steam process and then performing the electrical installation in the existing automatic cabinet. In the control cabinet, the existing PLC system was expanded with an IO link master for communication between sensor and PLC system. The result was a fully functional IO link sensor that transferred the vapor pressure in the system to the PLC system. As the IO link sensor for this purpose does not use many of the functions that may be sought in an IO link sensor, it becomes an expensive and complicated installation. If the teaching and course content are developed to use more of the IO link donor's competence, it can justify a higher purchase price and a more complicated implementation.

The implementation of embedded software applications is a complex process. The complexity arises from the intense time-to-market pressures; power and memory constraints. To deal with this complexity, an idea is to automatically construct the applications based on the high-level abstraction model. Synchronous data flow (SDF) is a high-level model of computation, and is used to model the embedded applications. Formal System Design (ForSyDe), developed by ForSyDe group at KTH Royal Institute of Technology, is a methodology for modeling and designing heterogeneous systems-on-chip. The aim of Formal System Design (ForSyDe) is to automatically generate the detailed software implementation or hardware implementation according to the high-level system specification. Formal System Design (ForSyDe) starts from the high-level system specification and specifies the system model in Haskell language. Synchronous data flow is supported by ForSyDe. ForSyDe IO is an intermediate representation of the high-level system specification. This master thesis focuses on the software synthesis of synchronous data flow models specified in ForSyDe IO, and aims to produce an automatic code generator that can generate software applications in C code for different platforms based on ForSyDe IO. In this project, a software synthesis method for ForSyDe IO was proposed. Then, based on the software synthesis method, a code generator, written in Java and Xtend, was designed. The derived code generator was tested on two examples. The experiment results show that the synchronous data flow models specified in ForSyDe IO are successfully synthesized into C code. The code is in the Github repository https://github.com/Rojods/CInTSyDe.git with MIT license. / Implementeringen av inbäddade mjukvaruapplikationer är en komplex process. Komplexiteten beror på det intensiva trycket på tid-till-marknad; kraft- och minnesbegränsningar. För att hantera denna komplexitet är en idé att applikationerna automatiskt kan konstrueras den högnivåabstraktionsmodellen. Synkront dataflöde (SDF) är en beräkningsmodell på hög nivå som används för att modellera inbäddade applikationer. Formell systemdesign (ForSyDe), utvecklad av ForSyDe-gruppen vid KTH, Kungliga Tekniska Högskolan , är en metodik för modellering och design av heterogena system på chipp. Syftet med formell systemdesign (ForSyDe) är att automatiskt generera den detaljerade mjuk- eller hårdvaruimplementationen enligt systemspecifikationen på hög nivå. Formell systemdesign (ForSyDe) utgår från systemspecifikationen på hög nivå och specificerar systemmodellen på Haskell-språket. Synkront dataflöde stöds av ForSyDe. ForSyDe IO är en mellanrepresentation av systemspecifikationen på hög nivå. Detta examensarbete fokuserar på mjukvarusyntesen av ForSyDe IO och synkront dataflöde, och syftar till att producera ett automatiskt verktyg som kan generera mjukvaruapplikation i C-kod för olika plattformar baserat på ForSyDe IO. I detta projekt föreslås en mjukvarusyntesmetod för ForSyDe IO. Sedan, baserat på mjukvarusyntesmetoden, designas en kodgenerator skriven i Java och Xtend. Den härledda kodgeneratorn testas på två exempel. Experimentresultaten visar att ForSyDe IO framgångsrikt har syntetiserats till C-kod.

This thesis is concerned with the measurement of physical quantities. Thesis describes sensors in general terms and requirements, which delivers latest trends in the field of automation. The main theme of this thesis is sensors for meassuring pressure, and their connection to the automation chain. In the next part thesis describes the design of the converter for connecting SMART sensors for pressure measuring, that use HART communication protocol, to the automation systems managed by a communication protocol IO-link. First will be described in detail various communication standards by their ISO OSI model, and on this theoretical basis will be based design of converter between communication protocol HART and communication protocol IO-Link. The last part will be Designed software for this converter.