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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
31

Eliminating inefficient cross-layer interactions in wireless networking

Ludwig, Reiner Eric. Unknown Date (has links) (PDF)
Techn. Hochsch., Diss., 2000--Aachen.
32

The Internet Protocol (IP) and Global Telecommunications Transformation

McGarty, Terrence January 1999 (has links)
No description available.
33

Webová aplikace zobrazující polohu IP stanic / Web application for getting location of IP nodes

Modrák, Zdeněk January 2015 (has links)
Thesis deal with geolocation in internet network. There are described possibilities of geolocation and thesis is mainly focused on passive geolocation methods. Under passive geolocation belongs location databases which there are described as in theoretical way as used in practical part of thesis. In practical part there is created complex system for geolocation in internet environment which used paid and free geolocation databases. Another used database is WHOIS. Data from paid databases is processed and accuracy of databases is evaluated.
34

IP Protocols in Telemetry Systems

Weaver, Robert Jr., Snyder, Ed 10 1900 (has links)
ITC/USA 2006 Conference Proceedings / The Forty-Second Annual International Telemetering Conference and Technical Exhibition / October 23-26, 2006 / Town and Country Resort & Convention Center, San Diego, California / This paper is intended to provide background into networking and IP protocols for non-IT personnel. It is not a study of networking and related protocols, as each of these topics would require a much longer period of time to explain. Addressed are considerations that should be required prior to locking a network design into a specific architecture. The systems available today, for the same cost as a good home PC, are becoming capable of performing critical tasks. It is highly recommended that the personnel who know the most about the data and how it will be used communicate with the personnel that know the network. Failing to explain or understand the networking nomenclature causes considerable wasted time and money. This paper is intended to encourage communications between the data creators and the data movers. We also want to demonstrate how new systems, hardware and software, designed to work with existing network devices used in non–telemetry applications, can make implementing IP in telemetry networks easier.
35

Network Design Considerations in Telemetry Systems

Grebe, Andy, Klein, Wayne 10 1900 (has links)
ITC/USA 2007 Conference Proceedings / The Forty-Third Annual International Telemetering Conference and Technical Exhibition / October 22-25, 2007 / Riviera Hotel & Convention Center, Las Vegas, Nevada / In today’s world, computer networking has become common place both in industry as well as home, however all networks are not the same! The Telemetry world, like with many industries, has critical design considerations that need to be evaluated when you begin a new system or just adding on to a current infrastructure. This paper is intended to outline needed considerations when planning or implementing a network design in Telemetry Systems. These applications can range from sensor data transport through High Definition/High Speed Video applications.
36

Convergence vers IP des systèmes de télécommunication par satellite / IP conververgence of satellite communication systems

Hobaya, Fabrice 30 September 2011 (has links)
Dans un contexte de convergence vers IP du monde des télécommunications, les systèmes de communication par satellite se doivent de suivre la tendance pour rester compétitifs et s'intégrer efficacement au monde Internet. Après avoir rappelé les enjeux d'une convergence dans les systèmes satellite et dressé un panorama des architectures de convergence envisageables, nous avons identifié les limites des systèmes actuels en termes de convergence vers IP. Notre choix se porte alors sur l'architecture IP/GSE pour la voie aller. Nous spécifions ensuite le protocole d'encapsulation GSE-Alt, inspiré de GSE mais adapté à la voie retour. Le déploiement de nouveaux services et l'évolution de services existants sont assurés et rendus plus aisés grâce à la couche IP. Les couches GSE et GSE-Alt optimisent le transport d'IP. Pour offrir un support de communication répondant à la diversité des exigences de qualité des services applicatif, nous définissons ensuite plusieurs mécanismes autorisant la mise en cohérence du traitement de la qualité de service (QoS) aux différents niveaux protocolaires dans les systèmes de communication par satellite. Enfin, pour permettre une interconnexion et une intégration du monde satellite au monde Internet, nous étudions les besoins en termes de déploiement du routage IP. Nous définissons alors une architecture permettant au satellite de réaliser de la commutation de niveau IP. Cette convergence vers un système « tout IP » du segment de communication par satellite est le fondement nécessaire à son insertion transparente au reste du monde des télécommunications. / The world of telecommunications converging towards IP, the telecommunication satellite systems have to follow the trend to stay competitive and to be integrated to the Internet world. We first remind the issues of convergence in satellite communications, then we list the different convergence architectures conceivable in satellite systems and describe the limits of current systems in term of IP convergence. Our choice is devoted to the IP/GSE architecture for the forward link. Then, we specify the GSE-Alt protocol, inspired from GSE but adapted to the return link. The deployment of new services and the evolution of existing services are possible and made easier thanks to the IP layer. Both layers GSE and GSE-Alt optimize the transport of the IP packets. In order to propose a communication support allowing various quality of service (QoS) needs, we specify several mechanisms allowing a great coherence of the quality of service treatments at the different protocol levels. Finally, to allow an interconnection and an integration of the satellite world to the Internet world, we study the requirements in term of IP routing deployment. Therefore, we specify an architecture allowing the satellite to make the switching at the IP level. This convergence of the satellite towards an "all IP" system is the base required to its transparent insertion to the rest of the telecommunication world.
37

Desenvolvimento de uma arquitetura parametrizável para processamento da pilha TCP/IP em hardware / Development of a customizable architecture to TCP/IP stack processing in hardware

Hamerski, Jean Carlo January 2008 (has links)
O aumento da popularidade da Internet e a criação de novos meios de transmissão estimulam um explosivo crescimento da taxa de transmissão de dados sobre a Internet. Assim, o processamento TCP/IP baseado em software torna-se um gargalo por não processar os pacotes na velocidade das linhas de transmissão, em especial os pacotes da camada de transporte. Conseqüentemente, surge a necessidade de implementação em hardware do processamento TCP/IP, o que traria vantagens como aceleração do processamento do fluxo de dados. Neste sentido, este trabalho apresenta a arquitetura do iNetCore, descrita em VHDL, para processamento dos protocolos das camadas de rede e transporte em hardware. Duas implementações desta arquitetura foram elaboradas, buscando explorar o espaço de projeto e analisar os resultados obtidos na síntese para a tecnologia ASIC e FPGA, e o desempenho no processamento de pacotes. Uma arquitetura HW/SW contendo o iNetCore foi prototipada sobre a placa Virtex- II Pro Development System. Em conjunto com essa arquitetura, foi implementada uma interface de comunicação com o barramento OPB, tornando possível a implementação de softwares da camada de aplicação que queiram usar a pilha TCP/IP desenvolvida em hardware. Por fim, foram efetuados experimentos para avaliar o desempenho da arquitetura HW/SW no processamento de segmentos TCP. A arquitetura HW/SW em conjunto com o iNetCore alcançou um throughput de até 1,45 Gbps, possibilitando o uso da arquitetura para processamento de pacotes TCP/IP na plenitude de banda disponíveis em redes gigabit. / The advent of new transmission lines stimulates an explosive increase of the Internet data-transmission rate. Thus, the TCP/IP processing based on software became a bottleneck, because it cannot reach the transmission line speed required, specially in the transmission of transport layer packets. This limitation brings the necessity of implementation of the TCP/IP processing in hardware, what it would bring advantages in the acceleration of data flow processing. In this way, this work presents the iNetCore architecture, described in VHDL, able to process the transport and network layers protocols in hardware. Two implementations of this architecture were implemented. The objective is to explore the design space and to analyze the results in ASIC and FPGA technology synthesis. Also, a simulation environment was built to analyze the performance in the packets computation. A HW/SW architecture containing the iNetcore was prototyped on Virtex-II Pro Development System board. In conjunction with this architecture, it was implemented a communication interface with OPB bus, which makes possible the development of application layer softwares that may use the hardware TCP/IP stack developed. Finally, experiments were realized in order to evaluate the HW/SW architecture performance in the TCP segments processing. The HW/SW architecture together with the iNetCore reached a throughput of about 1.45 Gbps in the TCP/IP packets processing. It proves its potential to use available bandwidth in gigabit networks.
38

Considerations for IP-Based Range Architectures

Kovach, Bob 10 1900 (has links)
ITC/USA 2013 Conference Proceedings / The Forty-Ninth Annual International Telemetering Conference and Technical Exhibition / October 21-24, 2013 / Bally's Hotel & Convention Center, Las Vegas, NV / In the past several years there has been a good amount of effort expended in migrating telemetry streams to IP-based infrastructure, especially in the area of ground-based transport. This has yielded a number of benefits, from leveraging the properties of IP transport to enable multicast transport, to the integration of the wide number of COTS equipment that also is IP-based, such as digital video encoder/decoders into range networks. This paper will provide a model for identifying areas to accelerate the integration of IP-based assets into the range infrastructure at the application level. In particular the integration of metadata between the telemetry and video application interfaces will be explored.
39

PCM vs. Networking: Spectral Efficiency Wars - A Pragmatic View

Araujo, Maria S., Abbott, Ben A. 10 1900 (has links)
ITC/USA 2012 Conference Proceedings / The Forty-Eighth Annual International Telemetering Conference and Technical Exhibition / October 22-25, 2012 / Town and Country Resort & Convention Center, San Diego, California / The expected efficiency of network-based telemetry systems vs. the tried and true PCM-based approaches is a debated topic. This paper chooses to use a lighthearted voice to pull the two sides of the "war" to a table of negotiation based on metrics. Ultimately, focusing on metrics that truly define efficiency is the key to understanding the varying points of view. A table of these metrics along with the "why and when" criteria for their use is presented based on historic mathematical information theory, true flight test data requirements, and lab analysis. With these metrics, the negotiation and reasonable compromises in the war may become clear. In other words, this paper attempts to provide a methodology that can be used by the community to aid in choosing the appropriate (or good enough) technologies for current and future telemetry testing demands.
40

Desenvolvimento de uma arquitetura parametrizável para processamento da pilha TCP/IP em hardware / Development of a customizable architecture to TCP/IP stack processing in hardware

Hamerski, Jean Carlo January 2008 (has links)
O aumento da popularidade da Internet e a criação de novos meios de transmissão estimulam um explosivo crescimento da taxa de transmissão de dados sobre a Internet. Assim, o processamento TCP/IP baseado em software torna-se um gargalo por não processar os pacotes na velocidade das linhas de transmissão, em especial os pacotes da camada de transporte. Conseqüentemente, surge a necessidade de implementação em hardware do processamento TCP/IP, o que traria vantagens como aceleração do processamento do fluxo de dados. Neste sentido, este trabalho apresenta a arquitetura do iNetCore, descrita em VHDL, para processamento dos protocolos das camadas de rede e transporte em hardware. Duas implementações desta arquitetura foram elaboradas, buscando explorar o espaço de projeto e analisar os resultados obtidos na síntese para a tecnologia ASIC e FPGA, e o desempenho no processamento de pacotes. Uma arquitetura HW/SW contendo o iNetCore foi prototipada sobre a placa Virtex- II Pro Development System. Em conjunto com essa arquitetura, foi implementada uma interface de comunicação com o barramento OPB, tornando possível a implementação de softwares da camada de aplicação que queiram usar a pilha TCP/IP desenvolvida em hardware. Por fim, foram efetuados experimentos para avaliar o desempenho da arquitetura HW/SW no processamento de segmentos TCP. A arquitetura HW/SW em conjunto com o iNetCore alcançou um throughput de até 1,45 Gbps, possibilitando o uso da arquitetura para processamento de pacotes TCP/IP na plenitude de banda disponíveis em redes gigabit. / The advent of new transmission lines stimulates an explosive increase of the Internet data-transmission rate. Thus, the TCP/IP processing based on software became a bottleneck, because it cannot reach the transmission line speed required, specially in the transmission of transport layer packets. This limitation brings the necessity of implementation of the TCP/IP processing in hardware, what it would bring advantages in the acceleration of data flow processing. In this way, this work presents the iNetCore architecture, described in VHDL, able to process the transport and network layers protocols in hardware. Two implementations of this architecture were implemented. The objective is to explore the design space and to analyze the results in ASIC and FPGA technology synthesis. Also, a simulation environment was built to analyze the performance in the packets computation. A HW/SW architecture containing the iNetcore was prototyped on Virtex-II Pro Development System board. In conjunction with this architecture, it was implemented a communication interface with OPB bus, which makes possible the development of application layer softwares that may use the hardware TCP/IP stack developed. Finally, experiments were realized in order to evaluate the HW/SW architecture performance in the TCP segments processing. The HW/SW architecture together with the iNetCore reached a throughput of about 1.45 Gbps in the TCP/IP packets processing. It proves its potential to use available bandwidth in gigabit networks.

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