Spin Torque Oscillator (STO) is a promising technology for microwave and radar applications due to its large tunability, miniature size, high operation frequency, high integration level, etc. However, the technology comes also with issues and challenges,such as low output power and spectrum impurity. For instance, in order to apply the STO technology into communication systems, an amplifier is required to compensate the STO’s low output power.     This thesis presents an amplifier for promising Magnetic Tunnel Junction (MTJ) STO devices. The motional resistance of different MTJ STO devices varies from several Ohms to hundreds Ohms, which makes the design challenging. This thesis focuses first on extracting the amplifier requirements using the state-of-the-art MTJ STO devices. The operation frequency of MTJ STO is in the range of 4-8GHzwith a -40～-60 dBm output power. Therefore, a wideband amplifier with 45-65 dB gain is required. Then based on the amplifier requirements, an amplifier topology is proposed, which is composed of two types of input balun-LNA stages depending onthe motional resistance of the STO, a broadband limiting amplifier and an outputbuffer. CG-CS architecture is suitable for the input balun-LNA in the small motional resistance case and cascoded-CS architecture is suitable for the large motional resistance case. The limiting amplifier and the output buffer are the common circuits shared by two cases via switches.     The wideband amplifier for STO is implemented using a 65nm CMOS process with 1.2 V supply and it exhibits 52.36 dB gain with 1.34-11.8 GHz bandwidth insmall motional resistance case and 59.29 dB gain with 1.171-8.178 GHz bandwidth in large motional resistance case. The simulation results show that the amplifier has very low power consumption and meets the linearity and noise performance requirements.

När tiden för utveckling av nya produkter kortas ner måste testning och verifiering utföras i ett tidigare utvecklingsstadie. Genom simulering av systemet kan tester utföras utan tillgång till det faktiska systemet och därmed kan utvecklingsprocessen accelereras. I BAE Systems Hägglunds stridsvagnar används en tröghetsnavigator som kan beräkna stridsvagnens position utan externa referenser. Test och verifiering av navigation med denna enhet i testbänk är ej fullt möjligt. Syftet med detta arbete är att kunna genomföra verklighetstrogna tester, i testbänk i utvecklingsfasen, genom att simulera navigatorns funktioner. Eftersom kommunikation med fordonssystemet ska ske i realtid samtidigt som navigationsdata läses från ett externt program, så ställs krav på att modellen har tillräcklig prestanda för att ge en verklighetstrogen simulering. Den övergripande frågeställningen i detta examensarbete är om en modell realiserad på en mikrokontroller (MCU) har tillräcklig prestanda för att användas vid simulering av en tröghetsnavigator. För att besvara frågeställningen har hårdvara för anpassning av gränssnittet mellan fordonssystem, MCU och externt program samt mjukvara för att simulera en tröghetsnavigator skapats. Därefter har modellen verifierats genom att mäta tiden för utvalda processer. Alla funktioner hos navigatorn har inte implementerats i simuleringsmodellen men resultaten visar att modellen kan användas för verklighetstrogna tester i testbänk. / When time for development of new products is shortened, testing and verification must be performed at an earlier stage of development. By simulating the system, tests can be performed without access to the actual system and thus the development process can be accelerated.  BAE Systems Hägglunds manufacture combat vehicles and use an Inertial Navigation System (INS) to calculate the combat vehicle’s position without external references. Testing and verification of navigation with this unit in the test bench is not entirely possible.  The aim of this thesis is to enable realistic tests, in a test bench in the development phase, by simulating the navigator’s functions. Since communication with the Vehicle Control System (VCS) must take place in real time at the same time as navigation data must be read from external program, the model is required to have sufficient performance to provide a realistic simulation.  The overall question in this thesis is whether a model realized on a microcontroller (MCU) has sufficient performance to be used for simulation of an INS. To answer the question at issue, hardware for adapting the interface between the VCS, MCU and external program as well as software for simulating an INS have been created. Thereafter, the model has been verified by measuring the time for selected processes.  Not all functions of the navigator have been implemented in the simulation model, but the results show that the model can be used for realistic tests in the test bench.

In the field of embedded systems, computers embedded into machines ranging from microwaveovensto assembly lines impact the physical world. They do so under tight real-time constraintswith ever-increasing demand for computing power and performance. Development of higher speedprocessors have been hampered by diminishing returns on power consumption as clock frequency isfurther increased. For this reason, today, embedded processor development is instead moving towardfurther concurrency with multi-core processors being considered more and more every day. Withparallelism comes challenges, such as interference caused by shared resources. Contention betweenprocessor cores, such as shared memory, result in inter-core interference which is potentially unpredictableand unbounded. The focus of this thesis is placed on minimizing inter-core interferencewhile meeting local task timing requirements by utilizing scheduling heuristics. A scheduling heuristicis designed and a prototype scheduler which implements this algorithm is developed. Thescheduler is evaluated on randomly generated test cases, where its ability to keep inter-core datapropagationdelays low across different core counts and utilization values was evaluated. The algorithmis also compared with constraint programming in a real world industrial test case. Theobtained results show that the algorithm can produce schedules with low inter-core delays in a veryshort time, although not being able to optimize them fully compared to constraint programming.

Musical Instrument Digital Interface(MIDI) is a technical standard that specifies acommunication protocol for digital instrument data and is mainly used by computers,synthesizers and electronic keyboards. A MIDI controller is any hardware or software that cangenerate and transfer MIDI data to a MIDI device, usually to play a sound or change controlparameters within a music software. An important property of a MIDI controller is to intuitively go from idea to execution withminimal effort. In this respect machine learning has really opened up for new musicalexpressions within musical devices. During this project a prototype with an implementedmachine learning algorithm which could deliver a wider array of functionality with a simplerinterface. The device developed should also be able to play Hi-Fi audio with at least 96 kHzsampling frequency and 24-bit bit-resolution. Without professional measurement equipment audio quality could not be completelymeasured. However, the development of the completed prototype as a whole was successful. Drawn symbols could be classified with a 70% accuracy, Hi-Fi audio could be played and MIDI-messages could be sent over USB to a music software.

This project aimed to create a simple open-source embedded graphical user interface library that could be used on more or less any microcontroller platform. The programming language was intended to be C++ for the GUI but as the project evolved C was chosen above C++. This was a decision based primarily on the fact that STM's development environment, STMCubeIDE, is less compatible with C++. The IDE offers great hardware support which in the end was more important than the advantages given by C++. The hardware used in this project was an STM32F469 microcontroller. It has an ARM CortexM4 processor core and 2 Mbyte of flash memory and 384 Kbytes of RAM. Wrapper functions for the Board Support Package, BSP, were written as a part of the library to allow easy access tothe BSP needed for the hardware configuration. The first part of the project goal was achieved, a simple GUI library was created. The resulting GUI library supports user interaction through buttons, it can display the current time andvisualizes given data in graphs. The graph function can display the data live, as a scatter plot, a bar plot and a line plot. The library also supports an alarm function that allows the user to decide what will happen after the alarm time is up. However, even though the GUI library was written to be device-independent, the product has not been tested on other platforms. For further development, this GUI library could be tested on another microcontroller. This would provide answers to how much software changes are needed to make the product as hardwareindependent as possible. To make the library lighter and faster, there is a possibility of optimizing the GUI core.

Energy-saving wireless sensors are increasingly used in the industry. Users can remotely monitor the status of the measured device and do not need to frequently replace the battery of the device. In this thesis, we studied a low-cost energy-independent wireless speed sensor system that can power itself by the rotation of the host. The BMG250 MEMS gyroscope is responsible for temperature and angular velocity measurement, and the nRF52832 SoC sends data to the remote monitoring terminal through BLE communication. This study aims to discover the energy consumption and energy saving methods of the entire process of data collection, data transfer, and data transmission. Finally, in order to meet the various test requirements, an energy consumption standard will be summed up to calculate the energy consumption of the entire system.

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Water is an important parameter for crop growth, and the information about the moisture content in soil at different depths is very useful for farmers to determine the best time to water the soil and to irrigate farmland so as to maximize their yield. This thesis project aims to develop a prototype of a multi-depth moisture sensor probe that is part of a large sensing system used in agriculture. The sensor probe has three sets and is required to last for 6-12 months of usage and to be reproduced at a low cost. The sensor probe consists of three sensor boards, on each of which has two different capacitive based sensors and one analog temperature sensor. The three boards are placed approximately 20 cm from each other in the probe. During this project, the two capacitive based sensors were developed, one with arc-shaped plates operating at a frequency less than 1 MHz, and one with electrodes in the form of annular rings operating at a high frequency, approximately 100 MHz. The moisture content in the soil is calculated based on the measurement of the frequency, which depends on the dielectric constant of the soil. For the implementation of the sensor probe, three printed circuit boards (PCBs) for the sensor boards were designed using Altium Designer and then ordered; an STM32 Nucleo board with low power microcontroller was used and the software was implemented in STM32CubeIDE. The lifetime of the sensor probe was calculated for different duty-cycles. With a duty-cycle of 15 minutes, where the sensor probe is active for 1 minute and in sleep mode for 14 minutes, the lifetime of the sensor probe would only be 16 days. With a duty-cycle of 120 minutes instead, with the sensor probe being active for 1 minute, the lifetime is increased to 130 days (less than4,5 months). Due to challenges with the high frequency capacitive sensor, the multi-depth sensor probe does not fully work, and thus cannot be tested with a large testbed. Further work needs to be conducted on the high frequency capacitive sensor and the communication with the gateway.

New and more capable electronics are required to push forward future space missions, and to pursue this goal the first step is the evaluation of novel technologies. The present thesis tackles the problem of evaluating new FPGA and memory technologies for spaceborne missions, while assessing its benefits and improvements. In this project, a novel soft SoC design based on the existing MDPA device was proposed and implemented. The new design includes a memory controller for the DDR3 technology, while targets a new radiation hardened FPGA technology. Additionally, the rad-hard FPGA is also assessed with the Cortex-R5 CPU to push its capabilities up to the limits. This latter, to find out how feasible is to use this FPGA to implement modern soft microprocessors. The thesis demonstrates that the new FPGA technology is able to match the current timing and resources requirements of the MDPA while improving its reliability. Also, it proves that the DDR3 technology has benefits over internal RAM in terms of bandwidth and capacity. Finally, it shows some problems when trying to use the FPGA technology to implement the Cortex-R5 CPU. / Ny och bättre elektronik behövs för att främja framtida rymduppdrag, och för att uppnå detta mål är ett första steg att utvärdera ny teknik. Denna avhandling behandlar problemet att utvärdera nya FPGAoch minnestekniker för uppdrag i rymden, och samtidigt avgöra vilka fördelar som finns med teknikerna och föreslå förbättringar. I detta projekt föreslogs och implementerades en ny mjuk SoCdesign baserad på den befintliga MDPA-enheten. Den nya designen inkluderar en minneskontroll för DDR3-tekniken, och är ämnad att byggas med hjälp av ny strålningshärdad FPGA-teknik. Dessutom testades den strålningshärdade FPGA-tekniken med Cortex-R5-CPU:n för att driva teknikens kapacitet till sin gräns. Detta för att avgöra om det är rimligt att använda denna FPGA för att implementera moderna mjuka mikroprocessorer. Avhandlingen visar att den nya FPGA-tekniken kan matcha de rådande tidsoch resurskraven på MDPA samtidigt som den förbättrar tillförlitligheten. Avhandlingen visar också att DDR3-tekniken har fördelar jämfört med intern RAM vad gäller bandbredd och kapacitet. Avhandlingen beskriver också några problem som uppstår när man försöker använda FPGA-tekniken för att implementera Cortex-R5-CPU:n.

Disc golf is one of the fastest growing sports in Sweden and the countrywide playerbase is steadily growing. In order to meet this increased demand, municipalities and sports associations alike have built new courses all around the country, which all require maintenence. Without an accurate way of determining course usage, it's difficult to guage how much money should be put towards maintaining and developing additional courses. The aim of this project was to design and test a people-counting system for disc golf couses which could provide this information to both players and course owners. Computer vision, wireless communication and sensor technologies were core topics explored during the development of the working prototype.