Thesis (Ph.D.)--University of Delaware, 2006. / Principal faculty advisor: Michael W. Haney, Dept. of Electrical and Computer Engineering. Includes bibliographical references.

A high-performance 2D or 3D integrated circuit typically has (i) ratio of delay of a 1mm wire to delay of a nMOS transistor > 500, (ii) target impedence of power delivery network < 1mΩ, (iii) clock frequency > 2GHz, and (iv) thermal resistance requirement of heat removal path < 0.6 degree C/W. This data illustrates the difficulty of obtaining high-quality signal, power, clock and thermal interconnect networks for gigascale 2D and 3D integrated circuits. Specific material, process, circuit, packaging, and architecture solutions to enhance these four types of interconnect networks are proposed and quantitatively evaluated. A microchannel-cooled 3D integrated circuit technology is developed to deal with thermal interconnect problems inherent to stacked dice. The benefits of carbon nanotube technology, improved repeater insertion techniques and parallel processing architectures for signal interconnect networks are evaluated. A circuit technique to periodically reverse current direction in power interconnect networks is proposed. It provides several orders of magnitude improvement in electromigration lifetimes. Methods to control power supply noise and reduce its impact on clock interconnect networks are investigated. Finally, a CAD tool to co-design signal, power, clock and thermal interconnect networks in high-performance 2D and 3D integrated circuits is developed.

Thesis (M.S.)--Materials Science and Engineering, Georgia Institute of Technology, 2005. / Suresh, Committee Member ; C.P. Wong, Committee Member ; Rao R. Tummala, Committee Chair. Includes bibliographical references.

Thesis (Ph. D.)--School of Electrical and Computer Engineering, Georgia Institute of Technology, 2005. Directed by Thomas Gaylord. / Glytsis, Elias, Committee Co-Chair ; Buck, John, Committee Member ; Kohl, Paul, Committee Member ; Adibi, Ali, Committee Member ; Gaylord, Thomas, Committee Chair. Vita. Includes bibliographical references.

Thesis (Ph.D.) - University of Queensland, 2004. / Includes bibliography.

No description available.

Polycrystalline films are used in a wide array of micro- and nano-scale devices, for electronic, mechanical, magnetic, photonic and chemical functions. Increasingly, the properties, performance, and reliability of films in these systems depend on nano-scale structure. In collaborative research with a number of SMA Fellows, Associates, and students, our group is carrying out research focused on probing, modeling and controlling nano-scale structural evolution during both vapor-phase and solid-phase polycrystalline film formation. In particular, high-sensitivity in-situ and real-time stress measurements are being used to study atomic scale forces and to characterize structure formation and evolution at the nano-scale. In other collaborative research, the affects of controlled structure and multi-film architectures on properties, such as piezoelectric characteristics and electromigration-limited reliability, are being explored. Through these interrelated activities, basic principles of the science and engineering of nano-scale materials are emerging. / Singapore-MIT Alliance (SMA)

Research on the processing, structure, properties and reliability of metal films and metallic microdevice elements is reviewed. Recent research has demonstrated that inelastic deformation mechanisms of metallic films and microelements are a function of temperature, encapsulation, and dimension. Reduced dimension can lead to strengthening or softening, depending on the temperature and strain rate. These results will help in the analysis and prediction of the stress state of films and microelements as a function of their thermal history. Experimental characterization and modeling of stress evolution during film formation has also been undertaken. New microelectromechanical devices have been developed for in situ measurements of stress during processing, and experiments relating stress and structure evolution are underway for electrodeposition and reactive film formation as well as vapor deposition. Experiments relating current-induced stress evolution (electromigration) to the reliability of Cu based interconnects are also being carried out. / Singapore-MIT Alliance (SMA)

Thesis (Ph. D.)--University of Texas at Austin, 2006. / Vita. Includes bibliographical references.

Not available / text