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Thesis (Ph. D.)--University of Texas at Austin, 2007. / Vita. Includes bibliographical references.

Thesis (Ph. D.)--University of Texas at Austin, 2000. / Vita. Includes bibliographical references (leaves 174-187). Available also in a digital version from Dissertation Abstracts.

Thesis (M. S.)--Chemical Engineering, Georgia Institute of Technology, 2009. / Committee Chair: Kohl, Paul; Committee Member: Bidstrup Allen, Sue Ann; Committee Member: Fuller, Thomas; Committee Member: Hesketh, Peter; Committee Member: Hess, Dennis; Committee Member: Meindl, James.

Thesis (doctoral)--University of Oulu, 2008. / Includes bibliographical references (p. 150-162). Also available on the World Wide Web.

Thesis (Ph. D.)--University of Texas at Austin, 2004. / Supervisor: Ray T. Chen. Vita. Includes bibliographical references.

The use of optical interconnects is a promising solution to the increasing demand for high speed mass data transmission used in integrated circuits as well as device to device data transfer applications. For the purpose, low cost polymer waveguides are a popular choice for routing signal between devices due to their compatibility with printed circuit boards. In optical interconnect, coupling from an external light source to such waveguides is a critical step, thus a variety of couplers have been investigated such as grating based couplers [1,2], evanescent couplers [3], and embedded mirrors [4–6]. These couplers are inherently micro-optical components which require fast and scalable fabrication for mass production with optical quality surfaces/structures. Low NA laser direct writing has been used for fast fabrication of structures such as gratings and Fresnel lenses using a linear laser direct writing scheme, though the length scale of such structures are an order of magnitude larger than the spot size of the focused laser of the tool. Nonlinear writing techniques such as with 2-photon absorption offer increased write resolution which makes it possible to fabricate sub-wavelength structures as well as having a flexibility in feature shape. However it does not allow a high speed fabrication and in general are not scalable due to limitations of speed and area induced by the tool’s high NA optics. To overcome such limitations primarily imposed by NA, we propose a new micro-optic fabrication process which extends the capabilities of 1D, low NA, and thus fast and scalable, laser direct writing to fabricate a structure having a length scale close to the tool's spot size, for example, a mirror based and 45 degree optical coupler with optical surface quality. The newly developed process allows a high speed fabrication with a write speed of 2600 mm²/min by incorporating a mask based lithography method providing a blank structure which is critical to creating a 45 degree slope to form the coupler surface. In this method, instead of using an entire exposure in a pixelated manner, only a portion of the Gaussian profile is used, allowing a reduced surface roughness and better control of the surface shape than previously possible with this low NA beam. The surface figure of the mirror is well controlled below 0.04 waves in root-mean-square (RMS) at 1.55 μm wavelength, with mirror angle of 45±1 degrees. The coupling efficiency is evaluated using a set of polymer waveguides fabricated on the same substrate as the complete proof of concept device. Device insertion loss was measured using a custom built optical test station and a detailed loss analysis was completed to characterize the optical coupling efficiency of the mirror. Surface roughness and angle were also experimentally confirmed. This process opens up a pathway towards large volume fabrication of free-form and high aspect ratio optical components which have not yet pursued, along with well-defined optical structures on a single substrate. In this dissertation, in Chapter 1, we provide an overview of optical surface fabrication in conjunction with current state of the art on fabrication of free form surfaces in macro and microscopic length scale. The need for optical interconnects is introduced and fabrication methods of micro-optical couplers are reviewed in Chapter 2. In Chapter 3, the complete fabrication process of a mirror based coupler is presented including a custom alignment procedure. In Chapter 4, we provide the integration procedure of the optical couplers with waveguides. In Chapter 5, the alignment of two-lithographic methods is discussed. In Chapter 6, we provide the fabrication procedure used for the waveguides. In Chapter 7, the experimental evaluation and testing of the optical coupler is described. We present a custom test station used for angle verification and optical coupler efficiency measurement. In Chapter 8, a detailed loss analysis of the device is presented including suggestions for future reductions in loss. Conclusions and future work considerations are addressed in Chapter 9.

Low-swing on-chip interconnect circuits have been viewed as alternative solutions to the problem of delay and power increase of on-chip interconnects. This thesis aims to characterize and optimize several basic low-swing interconnect circuits, by developing simple delay and power estimation methodologies. Accuracies of the proposed methods are validated against SPICE-based simulations on the 90nm technology node. Based on the delay and power estimation methods developed, optimum power-delay trade-off curves are obtained and directly used for comparison among different interconnect circuit strategies. Three low-swing techniques are included, i.e. conventional level converter (CLC), pseudodifferential interconnect circuit (PDIFF), and current-mode signaling (CM). These techniques represent significantly different driver and receiver topologies, where CLC uses lower supply voltage of a normal inverter driver, PDIFF uses NMOS only drivers, while CM has a low impedance termination at the receiving end. In addition, an optimized full-swing repeater-based technique is included as a baseline for comparison. A simplified repeater performance estimation technique considering ramp input signals is also proposed. The most important step in estimating delay of different driver circuits is the accurate estimation of transistor effective resistance, which considers velocity saturation effects and voltage transition patterns. Optimization for the CM circuit for on-chip interconnects requires completely different treatment than the voltage-mode circuits, due to the different and more complex effective driver resistance and termination resistance modeling. Sizing the driver and receiver transistors should be done simultaneously as their resistive values which affect its performance are dependent on each other. Optimum transistor sizing is very dependenton the required voltage swing chosen. Results of our comparisons show that optimized CLC (reduced voltage supply) repeaters appears to give the best general performance with a slight delay overhead compared to full-swing repeaters. The fact that CLC with repeaters has shorter delay than single-segment CM and PDIFF highlights the effectiveness of repeater structures in long wires. The inclusion of inductance and closed-form solutions to derive optimum transistor sizings for various low-swing interconnect circuits may be developed as a future work using delay and power estimation models presented in this thesis, which is a challenging task to do considering the non-linear equations involved.

Thesis (Ph.D.) - University of Queensland, 2006. / Includes bibliography.

As the circuit density and clock rate in SIP or SOC getting higher, the crosstalk interference between interconnects becomes more and more serious. This results in the degradation of signal integrity. Full wave simulation softwares such as HFSS are often used to analyze the characteristics of the transmission system, but the computation time is relatively long and it is difficult to integrate with active circuits. On the other hand, circuit simulation softwares such as ADS has the advantages of simplicity and needs less simulation time. The circuit simulation softwares is so far the best tool of designing high speed circuits. Usually obtain scalable equivalent macro-model in the existing literature with the technology of the frequency-domain, but using the technology of the time-domain to construct scalable equivalent macro-model have more direct, convenient and low-cost. Therefore, considering cost and practicability, this thesis develops a systematic method using the method of Pencil Matrix in time domain to obtain the scalable broadband equivalent macro-model of the components of high-speed interconnect structures. The developed macro-models can be applied to existing simulation softwares for a fast and accurate analysis of systems such as SIP.