Erlangen-Nürnberg, Univ., Diplomarb., 2008.

System-on-a-Chip (SoC) is a trend to achieve high performance, low cost, and low power in modern electronic devices. As the demand of functionality and performance increase, more IPs (Intellectual Property) are integrated into a modern SoC. Developing such a complex SoC is challenging since the SoC has limited observability; modern SoCs usually leave limited spared I/O pins for debugging purpose due to cost consideration, making it hard to analyze the internal activities via the limited I/O pins. This hampers the SoC development. To ease the difficulty, we have implemented the SYS-SIP (National Sun Yat-Sen university's SoC Infrastructure IP's) to enable the SoC development in terms of verification, debugging, monitor ing, and performance tuning. The SYS-SIP consists of five members: Processor External Interrupt Verification Module (PEVM), ICE, processor tracer, bus tracer, and protocol checker. Each of them serves specific purposes in verification, debugging, monitoring, and performance tuning. The SYS-SIP can be applied at diffierent design stages: RTL, FPGA, and chip level. The results show that SYS-SIP eases the SoC development and shortens the time-to-market significantly.

This thesis describes the design of a DSP based air detector system to prevent air embolism during Hemodialysis, which is a treatment option for kidney failure disease. Hemodialysis consists of removing blood from the body, filtering and treating the blood to remove toxic substances such as wastes and fluids, reestablishing proper chemical levels in the blood and returning the processed blood to the body. The functions of hemodialysis are performed through the use of a dialyzer, which is also known as an artificial kidney. During hemodialysis small air bubbles may infiltrate the tubing used during the therapy and combine to form larger air bubbles that are harmful to the patient. If an air bubble is large enough and enters the patient's circulatory system, the blood flow can be blocked and the patient can die by embolism. Most of the hemodialysis instruments in use today are equipped with air detection systems, which are based on analog design and digital microcontroll ers. This thesis presents a design method based strictly on DSP technology. The Motorola DSP 56824EVM was considered suitable for this biomedical application since its performance parameters include high-speed, multi-signal control capability, reliability and stability. These performance parameters are considered to be the most important when designing biomedical instruments dealing with human beings' life and safety. The objective of this research was the development and implementation of a DSP algorithm for the detection and measurement of the sizes of air bubbles in a fluid. In addition the algorithm had to possess the capability, when appropriate, to initiate protective and awareness measures such as triggering a tube clamp as well as activating visual and audio alarms. The air detection was accomplished by means of a commercial air detector module, which was based on piezo ceramic and ultrasound sensing. The function of the tubing clamp was to stop the fluid flow in the tubing and prevent an air bubble from entering the patient's circulatory system. A secondary goal of this research was to exploit the capability of the DSP 56824EVM and demonstrate its suitability for biomedical applications.

No description available.

The master thesis deals with the techniques to prevent computer system from computational overloading due to excessive frequency of interruptions. The goal is to document the effect of interupts on a selected computing platform containing the ARM Cortex-M4 processor core. The work describes and implements possible software techniques that reduce the impact of consequences of overload due to excessive interruption frequency. At the same time the work verifies and compares the effectiveness of the particular implemented techniques by appropriate set of experiments.

Em ambientes virtualizados, como nuvens computacionais, a capacidade efetiva de transmissão de dados via rede tende a ser inferior à de ambientes não virtualizados quando aplicações que fazem uso intensivo da rede são executadas. Uma das principais causas para essa diferença na capacidade de transmissão é a arquitetura da virtualização de rede, que adiciona passos para o sistema operacional transmitir e receber um pacote. Esses passos adicionais acarretam em maior utilização de memória e de processamento. Em ambientes virtualizados com o sistema operacional GNU/Linux, a New Application Programming Interface (NAPI) é utilizada para reduzir os impactos negativos da virtualização por meio de agregação de interrupções. Nesta dissertação de mestrado, são estudados mecanismos que modificam a configuração da NAPI. Experimentos mostram que esses mecanismos afetam o desempenho de máquinas virtuais e tem consequências diretas nas aplicações que fazem uso intensivo de rede e que são executadas em ambientes com os softwares de virtualização Xen, VMware e VirtualBox. / In virtualized environments, such as cloud computing, the effective capacity of data transmission via network cards tends to be lower than that in non-virtualized environments, when network intensive applications are executed. A major cause for this difference in the transmission capacity is the architecture of network virtualization, which adds some steps to be performed by the system when packets are transmitted or received. These additional steps cause more memory and processing usage. In virtualized environments with the GNU/Linux operating system, the New Application Programming Interface (NAPI) is used to reduce the negative impacts of virtualization through interrupt coalescence. In this dissertation, mechanisms that modify the configuration of NAPI are studied. Experiments show that these mechanisms affect the performance of virtual machines and have direct effects in applications that make intensive use of the network in environments with Xen, VMware and VirtualBox.

For improving the performance and application of microprocessor, it is necessary to integrate pipelined core, exception control unit, cache unit and memory management unit (MMU). The operating system is an effective way for microprocessor integration verification. However, it is not a feasible debugging methodology to detect the exact design bug while operating system booting crash. We found the main execution features of operating system are the data transfer and exception handling. We propose an integration verification methodology based on these execution features. The methodology is to verify concurrent cache transfer operation, consecutive cache transfer operation, external interrupt exception handling, page fault exception handling and multiple interrupt exception handling for microprocessor integration. We utilize ARM7-Like developed by our laboratory to do the experiment. It is effective to detect the design bugs in RTL simulation by the software-based verification methodology proposed by us. The modified ARM7-Like microprocessor is able to successfully boot Linux kernel and execute user applications in FPGA.

Em ambientes virtualizados, como nuvens computacionais, a capacidade efetiva de transmissão de dados via rede tende a ser inferior à de ambientes não virtualizados quando aplicações que fazem uso intensivo da rede são executadas. Uma das principais causas para essa diferença na capacidade de transmissão é a arquitetura da virtualização de rede, que adiciona passos para o sistema operacional transmitir e receber um pacote. Esses passos adicionais acarretam em maior utilização de memória e de processamento. Em ambientes virtualizados com o sistema operacional GNU/Linux, a New Application Programming Interface (NAPI) é utilizada para reduzir os impactos negativos da virtualização por meio de agregação de interrupções. Nesta dissertação de mestrado, são estudados mecanismos que modificam a configuração da NAPI. Experimentos mostram que esses mecanismos afetam o desempenho de máquinas virtuais e tem consequências diretas nas aplicações que fazem uso intensivo de rede e que são executadas em ambientes com os softwares de virtualização Xen, VMware e VirtualBox. / In virtualized environments, such as cloud computing, the effective capacity of data transmission via network cards tends to be lower than that in non-virtualized environments, when network intensive applications are executed. A major cause for this difference in the transmission capacity is the architecture of network virtualization, which adds some steps to be performed by the system when packets are transmitted or received. These additional steps cause more memory and processing usage. In virtualized environments with the GNU/Linux operating system, the New Application Programming Interface (NAPI) is used to reduce the negative impacts of virtualization through interrupt coalescence. In this dissertation, mechanisms that modify the configuration of NAPI are studied. Experiments show that these mechanisms affect the performance of virtual machines and have direct effects in applications that make intensive use of the network in environments with Xen, VMware and VirtualBox.

The content of this thesis is to create a detailed description of 32-bit ARM-based processors. Reader will be inform about the each one of the family of ARM-based processor, about the options of creating applications for these CPUs. The Applications are commonly developed by using the C/C++ language. This text also deal's with the development environments. These tools are making easier the development of new applications. This thesis also contains a complete design and description of development board with Atmel AT91SAM7S64 MCU (with sample of source code included).

Both real-time virtualization and recursive virtualization are desirable properties of a virtual machine monitor (or hypervisor). Although the prospect for virtualization and even recursive virtualization has become better as the PC hardware becomes faster, the real-time systems community so far has not been able to reap much benefits. This is because no existing virtualization mechanism can properly support the stringent timing requirements needed by real-time systems. It is hard to do real-time virtualization, and it is even harder to do it recursively. In this dissertation, we propose a framework whereby the hypervisor is capable of running real-time guests and participating in recursive virtualization. Such a hypervisor is called a real-time hierarchical hypervisor. We first look at virtualization of abstract resource types from the real-time systems perspective. Unlike the previous work on recursive real-time partitioning that assumes fully-preemptable resources, we concentrate on other and often more practical types of scheduling constraints, especially the non-preemptive and limited-preemptive ones. Then we consider the current x86 architecture and explore the problems that need to be addressed for real-time recursive virtualization. We drill down on the problem that affects timing properties the most, namely, the recursive forwarding and delivery of interrupts, exceptions and intercepts. We choose the x86 architecture because it is popular and readily available, but it is by no means the only architecture of choice for real-time recursive virtualization. We conclude the research with an architecture-independent discussion on future possibilities in real-time recursive virtualization. / text