Metal-Oxide-Silicon Field-Effect-Transistors with a layer of electrically isolated Si nanocrystals (NCs) embedded in the gate oxide are known to improve conventional floating gate flash memories. Data retention, program and erase speeds as well as the memory operation voltages can be substantially improved due to the discrete charge storage in the isolated Si NCs. Using ion beam synthesis, Si NCs can be fabricated along with standard CMOS processing. The optimization of the location and size of ion beam synthesized Si NCs requires a deeper understanding of the mechanisms involved, which determine (i) the built-up of Si supersaturation by high-fluence ion implantation and (ii) NC formation by phase separation. For that aim, process simulations have been conducted that address both aspects on a fundamental level and, on the other hand, are able to avoid tedious experiments. The built-up of a Si supersaturation by high-fluence ion implantation were studied using dynamic binary collision calculations with TRIDYN and have lead to a prediction of Si excess depth profiles in thin gate oxides of a remarkable quality. These simulations include in a natural manner high fluence implantation effects as target erosion by sputtering, target swelling and ion beam mixing. The second stage of ion beam synthesis is modeled with the help of a tailored kinetic Monte Carlo code that combines a detailed kinetic description of phase separation on atomic level with the required degree of abstraction that is necessary to span the timescales involved. Large ensembles of Si NCs were simulated reaching the late stages of NC formation and dissolution at simulation sizes that allowed a direct comparison with experimental studies, e.g. with electron energy loss resolved TEM investigations. These comparisons reveal a nice degree of agreement, e.g. in terms of predicted and observed precipitate morphologies for different ion fluences. However, they also point clearly onto impact of additional external influences as, e.g., the oxidation of implanted Si by absorbed humidity, which was identified with the help of these process simulations. Moreover, these simulations are utilized as a general tool to identify optimum processing regimes for a tailored Si NC formation for NC memories. It is shown that key properties for NC memories as the tunneling distance from the transistor channel to the Si NCs, the NC morphology, size and density can be adjusted accurately despite of the involved degree of self-organization. Furthermore, possible lateral electron tunneling between neighboring Si NCs is evaluated on the basis of the performed kinetic Monte Carlo simulations.

Metal-Oxide-Silicon Field-Effect-Transistors with a layer of electrically isolated Si nanocrystals (NCs) embedded in the gate oxide are known to improve conventional floating gate flash memories. Data retention, program and erase speeds as well as the memory operation voltages can be substantially improved due to the discrete charge storage in the isolated Si NCs. Using ion beam synthesis, Si NCs can be fabricated along with standard CMOS processing. The optimization of the location and size of ion beam synthesized Si NCs requires a deeper understanding of the mechanisms involved, which determine (i) the built-up of Si supersaturation by high-fluence ion implantation and (ii) NC formation by phase separation. For that aim, process simulations have been conducted that address both aspects on a fundamental level and, on the other hand, are able to avoid tedious experiments. The built-up of a Si supersaturation by high-fluence ion implantation were studied using dynamic binary collision calculations with TRIDYN and have lead to a prediction of Si excess depth profiles in thin gate oxides of a remarkable quality. These simulations include in a natural manner high fluence implantation effects as target erosion by sputtering, target swelling and ion beam mixing. The second stage of ion beam synthesis is modeled with the help of a tailored kinetic Monte Carlo code that combines a detailed kinetic description of phase separation on atomic level with the required degree of abstraction that is necessary to span the timescales involved. Large ensembles of Si NCs were simulated reaching the late stages of NC formation and dissolution at simulation sizes that allowed a direct comparison with experimental studies, e.g. with electron energy loss resolved TEM investigations. These comparisons reveal a nice degree of agreement, e.g. in terms of predicted and observed precipitate morphologies for different ion fluences. However, they also point clearly onto impact of additional external influences as, e.g., the oxidation of implanted Si by absorbed humidity, which was identified with the help of these process simulations. Moreover, these simulations are utilized as a general tool to identify optimum processing regimes for a tailored Si NC formation for NC memories. It is shown that key properties for NC memories as the tunneling distance from the transistor channel to the Si NCs, the NC morphology, size and density can be adjusted accurately despite of the involved degree of self-organization. Furthermore, possible lateral electron tunneling between neighboring Si NCs is evaluated on the basis of the performed kinetic Monte Carlo simulations.