Global ETD Search

31	Záznamového zařízení pro oblast civilního letectví / Data storage system for area of civil aviation Kotulič, Dominik January 2018 (has links) In the thesis the design of the Data Storage System (DSS) is proposed with the respect to the V-Model methodology. The design is based on users requirements, from which the system requirements are created and the technical specification of the DSS is developed. In the technical specifications the functionality of the DMM and HMI DSS subsystems are described and sub-system requirements are assigned to them, then they are subdivided and assigned to individual DMM (Data memory module) and HMI hardware items. Moreover, requirements are analyzed on hardware items, specific electronic components, are selected and implemented into the block design of the DMM hardware. Based on the block design of hardware, the hardware of the DMM subsystem is designed, selectively simulated and implemented along with the printed circuit board. On the implemented hardware of the DMM subsystems measurements are performed in order to verify the basic functionality of the hardware and the calculated, assimilated and measured values are compared as well. At the end of the thesis there is a short description of the implementation of the software design and its use for basic initialization of the selected processor, together with the verification of its basic function - measuring the frequency of the internal clock sources and the clock domains. The work is completed by sending a message of defined parameters to the selected communication line and sapling it by an oscilloscope, so that the basic function of the DMM subsystem is verified.
32	Řízení grafického OLED displeje mikrokontrolérem Atmel / Control of graphic OLED display with Atmel microcontroller Bartošík, Vladislav January 2010 (has links) This Master's thesis deals with design and a realisation of a device controlling an OLED display, Densitron DD-25664-1A. This display has a resolution of 256 x 64 pixels and allows displaying of 4-bit grayscale. The proposed utility software implements the initialization and termination functions, two sets of fonts { Latin and Greek letters and functions for rendering graphics and text. The result of the project is a device with the controlling software.
33	Telemetrie pro RC modely letadel / Radio Telemetry for RC Aircrafts Žák, Tomáš January 2014 (has links) Master‘s thesis is focused on problematic about state of RC plane model during the flight. Device is able to measure overload, height, position, pressure and velocity of the flight and store this measurement data to memory medium. The main aim of the master‘s thesis was to design a functional board, firmware for device and design simple program for evaluating of measured data. Involvement consists of five basic parts. First part is microcontroller, which processes measurement data and communicate with others parts. Next is accelerometer. Accelerometer is used for scanning overload of the plane. Barometer is used for measurement of height and pressure. For measuring position and velocity is used GPS module. Last part is memory medium. MicroSD is used as memory medium for storing measurement data. Evaluation of measured data is realized as simple program with base graphical user interface. Program was created in Matlab.
34	High-Speed Programmable FPGA Configuration Memory Access Using JTAG Gruwell, Ammon Bradley 01 April 2017 (has links) Over the past couple of decades Field Programmable Gate Arrays (FPGAs) have become increasingly useful in a variety of domains. This is due to their low cost and flexibility compared to custom ASICs. This increasing interest in FPGAs has driven the need for tools that both qualify and improve the reliability of FPGAs for applications where the reconfigurability of FPGAs makes them vulnerable to radiation upsets such as in aerospace environments. Such tools ideally work with a wide variety of devices, are highly programmable but simple to use, and perform tasks at relatively high speeds. Of the various FPGA configuration interfaces available, the Joint Test Action Group (JTAG) standard for serial communication is the most universally compatible interface due to its use for verifying integrated circuits and testing printed circuit board connectivity. This universality makes it a good interface for tools seeking to access FPGA configuration memory. This thesis introduces a new tool architecture for high-speed, programmable JTAG access to FPGA configuration memory. This tool, called the JTAG Configuration Manager (JCM), is made up of a large C++ software library that runs on an embedded micro-processor coupled with a hardware JTAG controller module implemented in programmable logic. The JCM software library allows for the development of custom JTAG communication of any kind, although this thesis focuses on applications related to FPGA reliability. The JCM hardware controller module allows these software-generated JTAG sequences to be streamed out at very high speeds. Together the software and hardware provide the high-speed and programmability that is important for many JTAG applications. FPGA JTAG scrubbing fault injection radiation testing laser testing C++ Python BYU configuration readback reliability SEU Xilinx bitstream upset mitigation hardware software high speed configuration memory CRAM SRAM Joint Test Action Group ionizing radiation space aerospace interface serial ARM processor architecture programmable logic MicroZed Zynq Linux Electrical and Computer Engineering

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