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The Global ETD Search service is a free service for researchers
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Networked Digital Library of Theses and Dissertations.
Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
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Showing 1 to 10 of 63 (0.113 seconds)Spelling suggestions: "subject:"1inear integrated circuits."" "subject:"alinear integrated circuits.""
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Test selection and fault simulation for analog integrated circuits /Devarayanadurg, Giri V. January 2001 (has links)
Thesis (Ph. D.)--University of Washington, 2001. / Vita. Includes bibliographical references (leaves 94-97).
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| 2 |
THE DESIGN OF LINEAR ELECTROTHERMAL INTEGRATED CIRCUITSLouw, Wynand Jakobus, 1935- January 1974 (has links)
No description available.
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| 3 |
A DIRECT APPROACH TO THE DESIGN OF LINEAR MULTIVARIABLE SYSTEMSAgrawal, B. L. (Bajarang L.), 1947- January 1974 (has links)
No description available.
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| 4 |
High speed high accuracy signal processing with parallel analog circuitsThomsen, Axel 12 1900 (has links)
No description available.
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| 5 |
High speed buffers for op-amp characterizationRangan, Giri N. K. 22 June 1993 (has links)
The feasibility of developing test circuits to perform in-circuit testing of analog
circuits is investigated in this thesis. A modular approach to analog testing has been
adopted. Accordingly, the testing of an operational amplifier, which is a basic building
block in analog circuits, is addressed. One convenient technique for measuring the frequency
response of an op-amp requires a unity gain buffer to be inserted into its feedback
loop. This buffer has to be simple in construction, small and accurate. Two buffer circuits
that satisfy these requirements are described in this thesis. Enhanced slewing techniques
are devised to achieve increased levels of performance. The buffers were integrated with
an op-amp into a test chip. Digital logic is used to provide controllability and accessibility
to each of the buffers and the op-amp so that they can characterized separately.
The performance of the enhanced slewing buffers was verified with measurements
performed on the test chip. The performance of the buffers conformed well with the simulated
values. The buffers exhibited excellent settling times even while driving large capacitive
loads. Their output swing and distortion performance were good for inputs as large as
2 V peak-to-peak values. / Graduation date: 1994
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| 6 |
A noniterative DC analysis program for analog integrated circuitsLi, Harry W. 08 1900 (has links)
No description available.
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| 7 |
Analog circuit design by nonconvex polynomial optimization two design examples /Lui, Siu-hong. January 2007 (has links)
Thesis (M. Phil.)--University of Hong Kong, 2008. / Also available in print.
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| 8 |
A fourth order current-mode sigma-delta modulator /Zhang, Yue, January 1997 (has links)
Thesis (Ph. D.)--University of Missouri-Columbia, 1997. / Typescript. Vita. Includes bibliographical references (leaves 127-128). Also available on the Internet.
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| 9 |
A fourth order current-mode sigma-delta modulatorZhang, Yue, January 1997 (has links)
Thesis (Ph. D.)--University of Missouri-Columbia, 1997. / Typescript. Vita. Includes bibliographical references (leaves 127-128). Also available on the Internet.
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| 10 |
Design and implementation of a four terminal floating amplifier and its application in analog electronics /García Rivera, José A. January 2005 (has links) (PDF)
Thesis (M.S.E.E.)--University of Puerto Rico, Mayagüez Campus, 2005. / Tables. Printout. Includes bibliographical references (leaves 135-138).
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