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Boolean and multiple-valued functions in combinational logic synthesisDubrova, Elena Vladimirovna 14 June 2017 (has links)
The subject of this dissertation is the theory of Boolean and multiple-valued functions.
The main areas considered are: functional completeness, canonical forms,
minimization of functions, discrete differences and functional decomposability. The
results obtained are used as a foundation for the development of several new algorithms
for logic synthesis of combinational logic circuits. These include an efficient
algorithm for three-level AND-OR-XOR minimization for Boolean functions, an algorithm
for generating the composition trees for Boolean and multiple-valued functions
in a certain class, and an algorithm for computing a new canonical form of multiple-valued
functions. Several other problems, related to logic synthesis, such as test
generation for combinational logic circuits and synthesis of easily testable circuits are also addressed. Possible directions for future research are discussed. / Graduate
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WinLogiLab - A Computer-Based Teaching Suite for Digital Logic DesignHacker, Charles Hilton, n/a January 2001 (has links)
This thesis presents an interactive computerised teaching suite developed for the design of combinatorial and sequential logic circuits. This suite fills a perceived gap in the currently available computer-based teaching software for digital logic design. Several existing digital logic educational software are available, however these existing programs were found to be unsuitable for our use in providing alternative mode subject delivery. This prompted the development of a Microsoft Windows TM tutorial suite, called WinLogiLab. WinLogiLab comprises of a set of tutorials that uses student provided input data, to perform the initial design steps for digital Combinatorial and Sequential logic circuits. The combinatorial tutorials are designed to show the link between Boolean Algebra and Digital Logic circuits, and follows the initial design steps: from Boolean algebra, truth tables, to Exact and the Heuristic minimisation techniques, to finally produce the combinatorial circuit. Similarly, the sequential tutorials can design simple State Machine Counters, and can model more complex Finite State Automata.
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Primitive interval labelled net model for logic simulation趙炳權, Chiu, Ping-kuen, Peter. January 1991 (has links)
published_or_final_version / Electrical and Electronic Engineering / Doctoral / Doctor of Philosophy
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A versatile platform for matrix converters for small scale wind integrationEhlers, Pieter Johannes January 2013 (has links)
M. Tech. Electrical Engineering. / A matrix converter is a direct AC-AC forced commutated converter which uses bidirectional switches to connect two voltage systems of different voltage and frequency. It does not contain any large energy storage elements as it has no DC link between the two systems. The output frequency is theoretically dependant on the switching algorithm and not the input frequency. A combination of bi-directional switches, controlled to obtain any desired output frequencies from a fixed or variable input frequency, will serve as a versatile platform, from which more specific applications could be researched.
Most literature uses simulations with ideal switches, or deal with theoretical studies of specific aspects or problems to be solved. A comprehensive study of matrix converters will include the construction of a real converter. The bi-directional switch is the cornerstone of any direct matrix converter. To be able to research matrix converters successfully, it is important to evaluate the bi-directional switch in operation, i.e. in real circuits. This study models, compares and evaluates a basic 3 to 1 matrix converter with various input and output frequencies. This is done for different input and output conditions such as different system frequencies and loads. Practical results with comments and conclusions are included.
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Simulation of digital circuitsMoen, Dennis Milton, 1947- January 1976 (has links)
No description available.
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COMPARISON OF SCIRTSS EFFICIENCY WITH D-ALGORITHM APPLICATION TO ITERATIVE NETWORKS (TEST).Chen, Daven, 1959- January 1986 (has links)
No description available.
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Current mode analog and digital circuit designLiang, Guojin 19 December 1990 (has links)
In this dissertation, two important current mode circuit design subjects have
been explored. In the first part, the switched-current circuit technique has been
investigated. The fundamental performance and limitations of this technique are
explored. One of the major limitations, the signal distortion caused by clock
feedthrough has been substantially reduced by a newly developed clock
feedthrough cancellation technique. In addition, a filter synthesis technique has
been developed by directly simulating the structure of digital filter. Several
experimental CMOS prototypes have been designed and fabricated. The measured
frequency and phase responses demonstrated the feasibility of this synthesis
technique. In the second part, a new logic family called current-steering logic has
been developed. The fundamental performance and characteristics of this technique
have been discussed including the basic inverter and NOR gate with DC analysis,
transient analysis and power-delay product. It has been shown that the current-steering
logic has, a much smaller current spike than conventional CMOS logic
circuits, which is especially desirable in mixed-mode applications. Several
experimental prototypes have verified the functionality and performance of this new
technique. / Graduation date: 1991
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An approach to unified methodology of combinational switching circuits /Cerny, Eduard. January 1975 (has links)
No description available.
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Delay-insensitive ternary logic (DITL)Parameswaran Nair, Ravi Sankar, January 2007 (has links) (PDF)
Thesis (M.S.)--University of Missouri--Rolla, 2007. / Vita. The entire thesis text is included in file. Title from title screen of thesis/dissertation PDF file (viewed November 27, 2007) Includes bibliographical references (p. 55-56).
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Generic algorithms and NULL Convention Logic hardware implementation for unsigned and signed quad-rail multiplicationMallepalli, Samarsen Reddy, January 2007 (has links) (PDF)
Thesis (M.S.)--University of Missouri--Rolla, 2007. / Vita. The entire thesis text is included in file. Title from title screen of thesis/dissertation PDF file (viewed November 27, 2007) Includes bibliographical references (p. 66-67).
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