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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Process integration and performance evaluation of Ge-based quantum well channel MOSFETs for sub-22nm node digital CMOS logic technology

Lee, Se-Hoon, 1981- 01 June 2011 (has links)
Since metal-oxide-semiconductor (MOS) device was first reported around 1959 and utilized for integrated circuits in 1961, complementary MOS technology has become the mainstream of semiconductor industry. Its performance has been improved based on scaling of dimensions of MOS field-effect-transistors (MOSFET) in accordance with Moore’s law, which states that the density of MOSFETs due to scaling approximately doubles every two years. Entering into sub-100nm regime caused a lot of challenges. Traditional way of scaling no longer provided performance enhancement of individual MOSFETs. Increased channel doping which is required to prevent degradation of device electrostatics from short channel effects caused carrier mobility degradation. New inventions needed to be incorporated to sustain performance enhancement trend with scaling. Implementation of process induced strained Si technology allowed mobility enhancement, and high-K/metal gate instead of conventional poly-Si/SiO2 allowed continuing electrical gate oxide thickness scaling, hence extending the life span of Moore’s law. As we are now moving toward 22nm logic technology and below, new concerns have been rapidly aroused. Controlling power consumption and performance variability are becoming as important as developing scaled devices with enhanced performance. Expandability of strained-Si channel technology via process induced strain also faces increasing complexity from ever tighter gate pitch and difficulties in controlling defect level with the channel stress enhancement techniques. At the same time, long-lasting planar MOSFET architecture also faces serious challenges due to the limits of controlling short channel effects. New paradigms and pathways for future technology seems to be required. As a result, new material sets, new device architectures and concepts are being vigorously explored in the literature. These new trends can be categorized into three groups: MOSFET structure with (non-Si) high mobility channel materials, advanced (non-planar) MOSFET structures, and MOSFET-type structures with new device operation concepts such as tunneling FETs. This dissertation presents research on high mobility channel MOSFET structures (planar and non-planar) using group IV material (mainly SiGe) for enhanced performance and reduced operating power. This work especially focuses on improving the performance of short channel device performance of SiGe channel pMOSFETs which has long been researched yet clearly demonstrated in literature only recently. To reach the goal, novel processing technologies such as millisecond flash source/drain anneal and high pressure hydrogen post-metal anneal are explored. Finally, performance dependence on channel and substrate direction has been analyzed to find the optimal use of these SiGe channels. This work describes an exciting opportunity of weighting the possibility of using high mobility channel MOSFETs for future logic technology. / text
2

Implementação de um nó IEEE 1451, baseado em ferramentas abertas e padronizadas, para aplicações em ambientes de instrumentação distribuída

Rossi, Silvano Renato [UNESP] 14 January 2005 (has links) (PDF)
Made available in DSpace on 2014-06-11T19:31:40Z (GMT). No. of bitstreams: 0 Previous issue date: 2005-01-14Bitstream added on 2014-06-13T18:42:30Z : No. of bitstreams: 1 rossi_sr_dr_ilha.pdf: 2325960 bytes, checksum: 7ef7ad22ede243a4f480a84cc0e63023 (MD5) / Universidad Nacional de Asuncion / Atualmente, as redes de transdutores inteligentes desempenham um papel de importância vital em sistemas de Medição e Controle Distribuído. Nesse contexto, o Padrão IEEE 1451 para interfaceamento de transdutores inteligentes tem como objetivo simplificar a conectividade de transdutores em ambientes de rede, fornecendo, para tal fim, um conjunto de interfaces padronizadas, aumentando a flexibilidade dos sistemas de instrumentação distribuída. Neste trabalho descreve-se a implementação de um nó de rede em conformidade com o padrão IEEE 1451. O nó foi completamente desenvolvido através do emprego de ferramentas padronizadas e sistemas abertos. O nó é composto por um Processador de Aplicação com Capacidade de Operar em Rede (NCAP), com base no padrão IEEE 1451.1 e um Módulo de Interface para Transdutores Inteligentes (STIM), em conformidade com o padrão IEEE 1451.2. A parte física do NCAP foi implementada através dos recursos de um Computador Pessoal (PC) e de um Dispositivo Lógico Programável (PLD) de uso geral. A parte lógica do NCAP foi desenvolvida através da tecnologia Java. O STIM foi implementado com dispositivos lógicos programáveis versáteis, de uso geral, e sua funcionalidade foi integralmente descrita em linguagem de descrição de hardware. O conjunto NCAP-STIM foi conectado a uma rede de área local, sob o modelo de comunicação cliente-servidor, sendo que várias aplicações clientes podem acessar as informações dos transdutores conectados ao STIM, através da rede, via intermediação do NCAP. O emprego de ferramentas padronizadas e abertas no desenvolvimento total do sistema IEEE 1451 é uma das contribuições mais importantes do presente trabalho. No entanto, há várias contribuições pontuais como: a maneira de descrever as Informações de Transdutores em Formato Eletrônico (TEDS), a implementação... . / Nowadays, smart transducer networks play an essential role in distributed measurement and control systems. In this context, the IEEE 1451 smart transducer interface standards aimed to simplify transducer connectivity, providing a set of common interfaces for connecting transducers in a networked fashion, increasing the flexibility of distributed instrumentation systems. In this work the implementation of a network node according to the IEEE 1451 standard is introduced. The node has been fully developed using open and standardized tools. A Network Capable Application Processor (NCAP) according to the IEEE 1451.1 Standard and a Smart Transducer Interface Module (STIM) comprises the node. The physical part of the NCAP has been implemented using the resources of a Personal Computer (PC) and a general-purpose Programmable Logic Device (PLD). The logical part of the NCAP has been developed using Java technology. The STIM module was implemented with versatile, general-purpose Programmable Logic Devices. STIM functionality has been fully developed in hardware description language. A network node (STIM-NCAP) was connected in a client-server modelbased local area network. Many client applications can access STIM transducers information, through the network with the NCAP as an intermediary. One of the most important contributions of this work is the employment of open and standardized tools for implementing the IEEE 1451 network node. However, there are many specific contributions such as: Transducer Electronic Data Sheet (TEDS’s) description method, programmable logic-based Protocol Manager implementation that allows the use of the parallel port without any modification, the employment of low-cost PLDs for implementing the STIM and the Protocol Manager, and Java-based NCAP software development. Through the implementation of the IEEE Standard, industries... (Complete abstract, click electronic address below).
3

Implementação de um nó IEEE 1451, baseado em ferramentas abertas e padronizadas, para aplicações em ambientes de instrumentação distribuída /

Rossi, Silvano Renato. January 2005 (has links)
Resumo: Atualmente, as redes de transdutores inteligentes desempenham um papel de importância vital em sistemas de Medição e Controle Distribuído. Nesse contexto, o Padrão IEEE 1451 para interfaceamento de transdutores inteligentes tem como objetivo simplificar a conectividade de transdutores em ambientes de rede, fornecendo, para tal fim, um conjunto de interfaces padronizadas, aumentando a flexibilidade dos sistemas de instrumentação distribuída. Neste trabalho descreve-se a implementação de um nó de rede em conformidade com o padrão IEEE 1451. O nó foi completamente desenvolvido através do emprego de ferramentas padronizadas e sistemas abertos. O nó é composto por um Processador de Aplicação com Capacidade de Operar em Rede (NCAP), com base no padrão IEEE 1451.1 e um Módulo de Interface para Transdutores Inteligentes (STIM), em conformidade com o padrão IEEE 1451.2. A parte física do NCAP foi implementada através dos recursos de um Computador Pessoal (PC) e de um Dispositivo Lógico Programável (PLD) de uso geral. A parte lógica do NCAP foi desenvolvida através da tecnologia Java. O STIM foi implementado com dispositivos lógicos programáveis versáteis, de uso geral, e sua funcionalidade foi integralmente descrita em linguagem de descrição de hardware. O conjunto NCAP-STIM foi conectado a uma rede de área local, sob o modelo de comunicação cliente-servidor, sendo que várias aplicações clientes podem acessar as informações dos transdutores conectados ao STIM, através da rede, via intermediação do NCAP. O emprego de ferramentas padronizadas e abertas no desenvolvimento total do sistema IEEE 1451 é uma das contribuições mais importantes do presente trabalho. No entanto, há várias contribuições pontuais como: a maneira de descrever as Informações de Transdutores em Formato Eletrônico (TEDS), a implementação... (Resumo completo, clicar acesso eletrônico abaixo). / Abstract: Nowadays, smart transducer networks play an essential role in distributed measurement and control systems. In this context, the IEEE 1451 smart transducer interface standards aimed to simplify transducer connectivity, providing a set of common interfaces for connecting transducers in a networked fashion, increasing the flexibility of distributed instrumentation systems. In this work the implementation of a network node according to the IEEE 1451 standard is introduced. The node has been fully developed using open and standardized tools. A Network Capable Application Processor (NCAP) according to the IEEE 1451.1 Standard and a Smart Transducer Interface Module (STIM) comprises the node. The physical part of the NCAP has been implemented using the resources of a Personal Computer (PC) and a general-purpose Programmable Logic Device (PLD). The logical part of the NCAP has been developed using Java technology. The STIM module was implemented with versatile, general-purpose Programmable Logic Devices. STIM functionality has been fully developed in hardware description language. A network node (STIM-NCAP) was connected in a client-server modelbased local area network. Many client applications can access STIM transducers information, through the network with the NCAP as an intermediary. One of the most important contributions of this work is the employment of open and standardized tools for implementing the IEEE 1451 network node. However, there are many specific contributions such as: Transducer Electronic Data Sheet (TEDS's) description method, programmable logic-based Protocol Manager implementation that allows the use of the parallel port without any modification, the employment of low-cost PLDs for implementing the STIM and the Protocol Manager, and Java-based NCAP software development. Through the implementation of the IEEE Standard, industries... (Complete abstract, click electronic address below). / Orientador: Aparecido Augusto de Carvalho / Coorientador: Alexandre César Rodrigues da Silva / Banca: Onofre Trindade Júnior / Banca: Edward David Moreno Ordonez / Banca: Cláudio Kitano / Banca: Ricardo Tokio Higuti / Doutor

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