With advancing technology, Chip Multi-processor (CMP) architectures have emerged as a viable solution for designing processors. Networks-On-Chip (NOCs) provide a scalable communication method for CMP architectures with increasing numbers of cores. Although there has been significant research on NOC designs for unicast traffic, the research on the multicast router design is still in its infant stage. Considering that one-to-many (multicast) and one-to-all (broadcast) traffic are more common in CMP applications, it is important to design a router providing efficient multicasting. In this thesis, a lookahead multicast routing algorithm with limited area overhead is proposed. This lookahead algorithm reduces network latency by removing the need for a separate routing computation (RC) stage. An efficient area optimization technique is put forward to achieve minimal area overhead for the lookahead RC stage. Also, a novel compression scheme is proposed for multicast packet headers to alleviate their big overhead in large networks. Comprehensive simulation results show that with the new route computation logic design and area overhead optimization, providing lookahead routing in the multicast router only costs less than 20 percent area overhead and this percentage keeps decreasing with larger network sizes. Compared with the basic lookahead routing design, our design can save area by over 50 percent. With header compression and lookahead multicast routing, the network performance can be improved on an average by 22 percent for a (16 x 16) network.

This thesis comprises two parts : the first one is the design and implementation of FlexRay automotive communication system physical layer; the second part is the design of a high speed pipelined tree-structured carry lookahead adder (CLA). The first part of this thesis is to introduce the physical layer specification of FlexRay automotive communication system. Then, it is realized in an SOC by a typical 0.18 um CMOS process. The second topic is to propose a novel CANT logic. By the CANT logic, a pipelined tree-structured carry lookahead adder is designed and implemented. The dynamic bulk biasing technique is utilized to increase the switching speed of inverting circuits such that the delays of the inverting and non-inverting circuit is very close. The proposed architecture can be easily expanded to long data words CLA. Post-layout simulations reveal that the 32-bit CLA using the proposed CANT logic can operate up to 7.2 GHz by using the UMC 90 nm process.

This thesis includes two topics. The first topic is a low power design of 8-bit ANT-based pipelining CLA. The second one is a small digital to analog converter (DAC) used in an implantable neural stimulator. An ANT-based low-power 8-bit pipelining carry-lookahead adder (CLA) using two-phase all-N-transistor (ANT) blocks which are arranged in a PLA design style with power-aware pipelining is presented. The pull-up charging and pull-down discharging of the transistor arrays of the PLA are accelerated by two feedback MOS transistors between the evaluation NMOS blocks and the outputs. Both the added power-aware clock control circuit and clock generation circuit detecting data transition take advantage of shutting down the processing stages given identical inputs in two consecutive operations by keeping high clock level. The design keeps the advantage of high speed while having the effect of low power dissipation. The implantable neural stimulator assists patients to reconstruct transmission paths of neural signals by current stimulation. The proposed small DAC not only decreases the chip area and power dissipation by reducing transistor count, but also improves the linearity with higher current output performance. All of measured performances of the proposed DAC make the chip worthy of being implemented in a field application.

Abstract The tremendous progress in all aspects of signal processing technology has naturally been accompanied by a corresponding development of arithmetic techniques to provide high-speed operations at reasonable complexity. In the past, many architectural design efforts have focused on maximizing performance for frequently executed simple arithmetic operations such as addition and multiplication while left other rarely used operations ignored. In this dissertation, we firstly propose two design approaches for 64-b carry-lookahead adders (CLA) using a two-phase clocking dynamic CMOS logic since fast adders are the key elements in many digital circuits. Secondly, we place emphasis on the inner product operation since it is one of the most frequently used mathematical operations in the computation of digital neural networks. A ratioed 3-2 compressor is also presented to resolve several physical design problems that are not fully considered or implemented in previous research works. Finally we propose several fast 64b/32b integer dividers because the integer division is unavoidable in many important signal-processing applications.

Discrete-Event systems (DES) is a framework in which problems are modelled as finite-state automata and a solution in the form of a supervisory control scheme can be automatically synthesized via an exhaustive search through the state space of the system. Various extensions to the standard DES framework have been introduced to allow it to be applied to a greater variety of problems. When the system in question is very large or varies with time, a limited lookahead policy can be adopted, in which control decisions are made on-the-fly by looking at finite-step projections of the behaviour of the system's underlying automata. This work presents a new approach to limited lookahead supervision which incorporates many of the extensions to DES that are already present in the literature, such as event probability and string desirability. When dealing with a limited lookahead technique, the projected system behaviour is represented as a lookahead tree with some depth limit decided on by the user. It can be difficult to strike a balance between the complexities associated with storing and analyzing the trees and the amount of information available to make decisions, both of which increase with depth. This work also presents a set of methods which are designed to aid in accurately estimating the state space of lookahead trees with the intent of simplifying the process of determining a favourable depth to use. Finally, the approaches introduced herein are applied to a simulation of an infectious disease outbreak, primarily to showcase them in action, but also for the possibility of illuminating any useful information for real-world health units. / Thesis (Master, Computing) -- Queen's University, 2012-01-20 19:35:58.007

Estudos de expressão gênica têm sido de extrema importância, permitindo desenvolver terapias, exames diagnósticos, medicamentos e desvendar uma infinidade de processos biológicos. No entanto, estes estudos envolvem uma série de dificuldades: grande quantidade de genes, sendo que geralmente apenas um pequeno número deles está envolvido no problema estudado; presença de ruído nos dados analisados; entre muitas outras. O projeto de pesquisa deste mestrado consiste no estudo de algoritmos de indução de árvores de decisão; na definição de uma metodologia capaz de tratar dados de expressão gênica usando árvores de decisão; e na implementação da metodologia proposta como algoritmos capazes de extrair conhecimento a partir desse tipo de dados. A indução de árvores de decisão procura por características relevantes nos dados que permitam modelar precisamente um conceito, mas tem também a preocupação com a compreensibilidade do modelo gerado, auxiliando os especialistas na descoberta de conhecimento, algo importante nas áreas médica e biológica. Por outro lado, tais indutores apresentam relativa instabilidade, podendo gerar modelos bem diferentes com pequenas mudanças nos dados de treinamento. Este é um dos problemas tratados neste mestrado. Mas o principal problema tratado se refere ao comportamento destes indutores em dados de alta dimensionalidade, mais especificamente dados de expressão gênica: atributos irrelevantes prejudicam o aprendizado e vários modelos com desempenho similar podem ser gerados. Diversas técnicas foram exploradas para atacar os problemas mencionados, mas este estudo se concentrou em duas delas: windowing, que foi a técnica mais explorada e para a qual este mestrado propôs uma série de alterações com vistas à melhoria de seu desempenho; e lookahead, que procura construir a árvore levando em considerações passos subsequentes do processo de indução. Quanto ao windowing, foram explorados aspectos relacionados ao procedimento de poda das árvores geradas durante a execução do algoritmo; uso do erro estimado em substituição ao erro de treinamento; uso de ponderação do erro calculado durante a indução de acordo com o tamanho da janela; e uso da confiança na classificação para decidir quais exemplos utilizar na atualização da janela corrente. Com relação ao lookahead, foi implementada uma versão de um passo à frente, ou seja, para tomar a decisão na iteração corrente, o indutor leva em consideração a razão de ganho de informação do passo seguinte. Os resultados obtidos, principalmente com relação às medidas de desempenho baseadas na compreensibilidade dos modelos induzidos, mostram que os algoritmos aqui propostos superaram algoritmos clássicos de indução de árvores. / Gene expression studies have been of great importance, allowing the development of new therapies, diagnostic exams, drugs and the understanding of a variety of biological processes. Nevertheless, those studies involve some obstacles: a huge number of genes, while only a very few of them are really relevant to the problem at hand; data with the presence of noise; among others. This research project consists of: the study of decision tree induction algorithms; the definition of a methodology capable of handling gene expression data using decision trees; and the implementation of that methodology as algorithms that can extract knowledge from that kind of data. The decision tree induction searches for relevant characteristics in the data which would allow it to precisely model a certain concept, but it also worries about the comprehensibility of the generated model, helping specialists to discover new knowledge, something very important in the medical and biological areas. On the other hand, such inducers present some instability, because small changes in the training data might produce great changes in the generated model. This is one of the problems being handled in this Master\'s project. But the main problem this project handles refers to the behavior of those inducers when it comes to high-dimensional data, more specifically to gene expression data: irrelevant attributes may harm the learning process and many models with similar performance may be generated. A variety of techniques have been explored to treat those problems, but this study focused on two of them: windowing, which was the most explored technique and to which this project has proposed some variations in order to improve its performance; and lookahead, which builds each node of a tree taking into consideration subsequent steps of the induction process. As for windowing, the study explored aspects related to the pruning of the trees generated during intermediary steps of the algorithm; the use of the estimated error instead of the training error; the use of the error weighted according to the size of the current window; and the use of the classification confidence as the window update criterion. As for lookahead, a 1-step version was implemented, i.e., in order to make the decision in the current iteration, the inducer takes into consideration the information gain ratio of the next iteration. The results show that the proposed algorithms outperform the classical ones, especially considering measures of complexity and comprehensibility of the induced models.

Estudos de expressão gênica têm sido de extrema importância, permitindo desenvolver terapias, exames diagnósticos, medicamentos e desvendar uma infinidade de processos biológicos. No entanto, estes estudos envolvem uma série de dificuldades: grande quantidade de genes, sendo que geralmente apenas um pequeno número deles está envolvido no problema estudado; presença de ruído nos dados analisados; entre muitas outras. O projeto de pesquisa deste mestrado consiste no estudo de algoritmos de indução de árvores de decisão; na definição de uma metodologia capaz de tratar dados de expressão gênica usando árvores de decisão; e na implementação da metodologia proposta como algoritmos capazes de extrair conhecimento a partir desse tipo de dados. A indução de árvores de decisão procura por características relevantes nos dados que permitam modelar precisamente um conceito, mas tem também a preocupação com a compreensibilidade do modelo gerado, auxiliando os especialistas na descoberta de conhecimento, algo importante nas áreas médica e biológica. Por outro lado, tais indutores apresentam relativa instabilidade, podendo gerar modelos bem diferentes com pequenas mudanças nos dados de treinamento. Este é um dos problemas tratados neste mestrado. Mas o principal problema tratado se refere ao comportamento destes indutores em dados de alta dimensionalidade, mais especificamente dados de expressão gênica: atributos irrelevantes prejudicam o aprendizado e vários modelos com desempenho similar podem ser gerados. Diversas técnicas foram exploradas para atacar os problemas mencionados, mas este estudo se concentrou em duas delas: windowing, que foi a técnica mais explorada e para a qual este mestrado propôs uma série de alterações com vistas à melhoria de seu desempenho; e lookahead, que procura construir a árvore levando em considerações passos subsequentes do processo de indução. Quanto ao windowing, foram explorados aspectos relacionados ao procedimento de poda das árvores geradas durante a execução do algoritmo; uso do erro estimado em substituição ao erro de treinamento; uso de ponderação do erro calculado durante a indução de acordo com o tamanho da janela; e uso da confiança na classificação para decidir quais exemplos utilizar na atualização da janela corrente. Com relação ao lookahead, foi implementada uma versão de um passo à frente, ou seja, para tomar a decisão na iteração corrente, o indutor leva em consideração a razão de ganho de informação do passo seguinte. Os resultados obtidos, principalmente com relação às medidas de desempenho baseadas na compreensibilidade dos modelos induzidos, mostram que os algoritmos aqui propostos superaram algoritmos clássicos de indução de árvores. / Gene expression studies have been of great importance, allowing the development of new therapies, diagnostic exams, drugs and the understanding of a variety of biological processes. Nevertheless, those studies involve some obstacles: a huge number of genes, while only a very few of them are really relevant to the problem at hand; data with the presence of noise; among others. This research project consists of: the study of decision tree induction algorithms; the definition of a methodology capable of handling gene expression data using decision trees; and the implementation of that methodology as algorithms that can extract knowledge from that kind of data. The decision tree induction searches for relevant characteristics in the data which would allow it to precisely model a certain concept, but it also worries about the comprehensibility of the generated model, helping specialists to discover new knowledge, something very important in the medical and biological areas. On the other hand, such inducers present some instability, because small changes in the training data might produce great changes in the generated model. This is one of the problems being handled in this Master\'s project. But the main problem this project handles refers to the behavior of those inducers when it comes to high-dimensional data, more specifically to gene expression data: irrelevant attributes may harm the learning process and many models with similar performance may be generated. A variety of techniques have been explored to treat those problems, but this study focused on two of them: windowing, which was the most explored technique and to which this project has proposed some variations in order to improve its performance; and lookahead, which builds each node of a tree taking into consideration subsequent steps of the induction process. As for windowing, the study explored aspects related to the pruning of the trees generated during intermediary steps of the algorithm; the use of the estimated error instead of the training error; the use of the error weighted according to the size of the current window; and the use of the classification confidence as the window update criterion. As for lookahead, a 1-step version was implemented, i.e., in order to make the decision in the current iteration, the inducer takes into consideration the information gain ratio of the next iteration. The results show that the proposed algorithms outperform the classical ones, especially considering measures of complexity and comprehensibility of the induced models.

Distributed Discrete Event Simulation (DDES) has received much attention in recent years, owing to the fact that uniprocessor based serial simulations may require excessive amount of simulation time and computational resources. It is therefore natural to attempt to use multiple processors to exploit the inherent parallelism in discrete event simulations in order to speed up the simulation process. In this dissertation we study the performance of distributed simulation of queueing networks, by analysing queueing models of message flows in distributed discrete event simulators. Most of the prior work in distributed discrete event simulation can be catego­rized as either empirical studies or analytic (or formal) models. In the empirical studies, specific experiments are run on both conservative and optimistic simulators to see which strategy results in a faster simulation. There has also been increasing activity in analytic models either to better understand a single strategy or to compare two strategies. Little attention seems to have been paid to the behaviour of the interprocessor message queues in distributed discrete event simulators. To begin with, we study how to model distributed simulators of queueing networks. We view each logical process in a distributed simulation as comprising a message sequencer with associated message queues, followed by an event processor. A major contribution in this dissertation is the introduction of the maximum lookahead sequencing protocol. In maximum lookahead sequencing, the sequencer knows the time-stamp of the next message to arrive in the empty queue. Maximum lookahead is an unachievable algorithm, but is expected to yield the best throughput compared to any realisable sequencing technique. The analysis of maximum lookahead, therefore, should lead to fundamental limits on the performance of any sequencing algorithm We show that, for feed forward type simulators, with standard stochastic assump-tions for message arrival and time-stamp processes, the message queues are unstable for conservative sequencing, and for conservative sequencing with maximum lookahead and hence for optimistic resequencing, and for any resequencing algorithm that does not employ interprocessor "flow control". It follows that the resequencing problem is fundamentally unstable and some form of interprocessor flow control is necessary in order to make the message queues stable (without message loss). We obtain some generalizations of the insta­bility results to time-stamped message arrival processes with certain ergodicity properties. For feedforward type distributed simulators, we study the throughput of the event sequencer without any interprocessor flow control. We then incorporate flow control and study the throughput of the event sequencer. We analyse various flow control mechanisms. For example, we can bound the buffers of the message queues, or various logical processes can be prevented from getting too far apart in virtual time by means of a mechanism like Moving Time Windows or Bounded Lag. While such mechanisms will serve to stabilize buffers, our approach, of modelling and analysing the message flow processes in the simulator, points towards certain fundamental limits of efficiency of distributed simulation, imposed by the synchronization mechanism. Next we turn to the distributed simulation of more general queueing networks. We find an upper bound to the throughput of distributed simulators of open and closed queueing networks. The upper bound is derived by using flow balance relations in the queueing network and in the simulator, processing speed constraints, and synchronization constraints in the simulator. The upper bound is in terms of parameters of the queueing network, the simulator processor speeds, and the way the queueing network is partitioned or mapped over the simulator processors. We consider the problem of choosing a mapping that maximizes the upper bound. We then study good solutions o! this problem as possible heuristics for the problem of partitioning the queueing network over the simulator processors. We also derive a lower bound to the throughput of the distributed simulator for a simple queueing network with feedback. We then study various properties of the maximum lookahead algorithm. We show that the maximum lookahead algorithm does not deadlock. Further, since there are no syn­chronization overheads, maximum lookahead is a simple algorithm to study. We prove that maximum lookahead sequencing (though unrealisable) yields the best throughput compared to any realisable sequencing technique. These properties make maximum lookahead a very useful algorithm in the study of distributed simulators of queueing networks. To investigate the efficacy of the partitioning heuristic, we perform a study of queue­ing network simulators. Since it is important to study the benefits of distributed simula­tion, we characterise the speedup in distributed simulation, and find an upper bound to the speedup for a given mapping of the queues to the simulator processors. We simulate distributed simulation with maximum lookahead sequencing, with various mappings of the queues to the processors. We also present throughput results foT the same mappings but using a distributed simulation with the optimistic sequencing algorithm. We present a num­ber of sufficiently complex examples of queueing networks, and compare the throughputs obtained from simulations with the upper bounds obtained analytically. Finally, we study message flow processes in distributed simulators of open queueing networks with feedback. We develop and study queueing models for distributed simulators with maximum lookahead sequencing. We characterize the "external" arrival process, and the message feedback process in the simulator of a simple queueing network with feedback. We show that a certain "natural" modelling construct for the arrival process is exactly correct, whereas an "obvious" model for the feedback process is wrong; we then show how to develop the correct model. Our analysis throws light on the stability of distributed simulators of queueing networks with feedback. We show how the stability of such simulators depends on the parameters of the queueing network.

Objective: This document is not an introduction to parser generators. Readers should rather have a good understanding of them, especially of LALR parser generators. This document merely describes the main aspects of the implementation of a LALR parser generator named wisent. It is divided into a concise description of the programming interface and an overview over the data structures and specifics of the implementation of the wisent parser generator.

Modern superscalar pipelines have tremendous capacity to consume the instruction stream. This has been possible owing to improvements in process technology, technology scaling and microarchitectural design improvements that allow programs to speculate past control and data dependencies in the superscalar architecture. However, the speed of the memory subsystem lags behind due to physical constraints in bringing in huge amounts of data to the processor core. Cache hierarchies have subdued the impact of this speed gap; however, there is much that can be still done in improving microarchitecture. Data prefetching techniques bring in memory content significantly before the instruction stream actually witnesses demand misses. However, a majority of the techniques proposed so far depend upon an initial demand miss that initiates a stream of previously identified prefetches. In this thesis, we propose a novel prefetching algorithm, which leverages branch prediction to facilitate deep memory system speculation. The branch predictor directed lookahead mechanism builds a speculative control flow path for the instruction stream about to be fetched by the main superscalar pipeline. Prefetches are generated along this speculative path from a condensed representation of the memory instructions, leveraging register index based correlation. The technique integrates eloquently with the main pipeline's branch predictor to filter out prefetches along invalid speculative paths. Impact of the prefetching scheme is analyzed using out- of-order model of the Gem5 cycle accurate simulator. Evaluation shows that on a set of 13 memory intensive SPEC CPU2006 benchmarks, our prefetching technique improves performance by an average of 5.6% over the baseline out-of-order processor.