Aplicações móveis que não podem ser recarregadas durante operação, como sensores biomédicos e aplicações da Internet das Coisas, dependem da extração de energia do próprio meio onde se encontram. Tensões de alimentação típicas são normalmente maiores que as disponiveis por métodos de extração de energia do meio e requerem uma conversão de nivel DC que invariavelmente resulta em perdas proporcionais ao fator de conversão. Consequentemente, aplicações projetadas para tensões de alimentação mais próximas da tensão nominal da fonte melhora a eficiência energética. Entretanto, topologias de circuitos elétricos para tensões típicas de alimentação sao impróprias para tensões extremamente baixas. Neste trabalho foram propostas topologias de amplificadores de saída unipolar e diferencial para tensões de alimentaçãoo na casa de centenas de milivolts. As técnicas propostas se baseiam no uso de pares pseudodiferenciais com terminais de corpo polarizados diretamente para vários propósitos, incluindo rejeição de modo comum e polarização de modo comum de saída e corrente DC. Adicionalmente, um oscilador baseado na mesmas técnicas de polarização foi proposto e projetado para duas classes de aplicações: um oscilador de referência intrinsicamente estável e um oscilador controlado por tensão para conversão analógica-digital com melhor linearidade. / Nomadic applications which cannot be recharged while at operation, such as biomedical sensors and Internet of Things applications, rely on energy harvesting from the environment. Typical supply voltages are usually higher than those achieved by energy harvesting methods and requires DC-DC conversion levels, which invariably results in energy loss proportionally to the step of voltage conversion. Consequently, designing at supply voltages closer to the nominal voltage of the energy source improves power efficiency. However, extremely low supply voltages bring design challenges, as circuit topologies for typical voltages employ techniques not suitable for extremely low supply voltages. In this work, single ended and fully differential amplifier topologies for voltage supplies in the range of few hundreds mV were proposed. The proposed approaches use the pseudo differential pairs with the transistor bulk terminals with forward biasing voltages for several purposes, including common mode rejection, output common mode voltage and DC current biasing. Additionally, a ring oscillator based in the same biasing techniques was proposed and designed for two main classes of applications: an intrinsically stable reference oscillator and a voltage controlled oscillator for analog-digital conversion with linearity improvements.

Charge-scaling (CS) successive approximation register (SAR) ADC's are widely used in the design of low power electronics. Significant portions of CS-SAR ADC power are consumed by CS capacitor arrays and comparator circuits. This Dissertation presents circuit techniques to reduce the power consumption of both CS capacitor array and the latch comparator during ADC operations. The impacts of the proposed techniques on ADC accuracies are analyzed and circuit techniques are presented to address the accuracy concerns. The dissertation also presents techniques to cope with capacitor mismatches, which becomes more significant with the use of very small unit capacitors in the CS array. These techniques rely on a novel programmable CS capacitor array that allow optimally grouping the unit capacitors. Based on a 0.13um CMOS technology the proposed techniques are verified with extensive circuit simulation. Post layout simulations are done to evaluate the proposed techniques for energy efficient CS capacitor array.

This dissertation presents the design and implementation of a 16-channel sinusoidal generator to stimulate microfluidic devices that use electrokinetic forces to manipulate particles. The generator has both, independent frequency and independent amplitude control for each channel. The stimulation system is based upon a CMOS application specific (ASIC) device developed using 0.35¦Ìm technology. Several generator techniques were compared based on frequency range, total harmonic distortion (THD), and on-chip area. The best alternative for the microfluidic applications is based in a triangle-to-sine converter and presents a frequency range of 8kHz to 21MHz, an output voltage range of 0V to 3.1VPP, and a maximum THD of 5.11%. The fabricated device, has a foot- print of 1560¦Ìm¡Á2030¦Ìm. The amplitude of the outputs is extended using an interface card, achieving voltages of 0V to 15VPP. The generator functionality was tested by performing an experimental set-up with particle trapping. The set-up consisted of a micromachined channel with embedded electrodes configured as two electrical ports located at different positions along the channel. By choosing specific amplitude and frequency values from the generator, different particles suspended in a fluid were simultaneously trapped at different ports. The multichannel stimulator presented here can be used in many microfluidic experiments and devices where particle trapping, separation and characterization is desired. / This dissertation presents the design and implementation of a 16-channel sinusoidal generator to stimulate microfluidic devices that use electrokinetic forces to manipulate particles. The generator has both, independent frequency and independent amplitude control for each channel. The stimulation system is based upon a CMOS application specific (ASIC) device developed using 0.35¦Ìm technology. Several generator techniques were compared based on frequency range, total harmonic distortion (THD), and on-chip area. The best alternative for the microfluidic applications is based in a triangle-to-sine converter and presents a frequency range of 8kHz to 21MHz, an output voltage range of 0V to 3.1VPP, and a maximum THD of 5.11%. The fabricated device, has a foot- print of 1560¦Ìm¡Á2030¦Ìm. The amplitude of the outputs is extended using an interface card, achieving voltages of 0V to 15VPP. The generator functionality was tested by performing an experimental set-up with particle trapping. The set-up consisted of a micromachined channel with embedded electrodes configured as two electrical ports located at different positions along the channel. By choosing specific amplitude and frequency values from the generator, different particles suspended in a fluid were simultaneously trapped at different ports. The multichannel stimulator presented here can be used in many microfluidic experiments and devices where particle trapping, separation and characterization is desired.

Due to rapid growth of home entertainment consumer market, video technology has been continuously pushed to deliver sharper pictures with higher resolution. This has brought about stringent requirements on the video analog front end, which often coupled with the low power and low voltage regulations had to deal with short channel effects of the deep submicron CMOS processes. This thesis presents the design of a fully differential programmable gain amplifier, as a subcircuit of a larger video digitizing IC designed at division of Electronic Systems. The switched capacitor architecture of the PGA does not only buffer the signal, but performs compensation for the sync-tip of analog video signal. The pseudo differential OTA eliminates tail current source and maintains high signal swing and has efficient common mode feedforward mechanism. When coupled with a similar stage provides inherent common moode feedback without using an additional SC-CMFB block. The PGA has been implemented using a 65 nm digital CMOS process. Expected difficulties in a 1.2 V OTA design make themselves evident in 65 nm, which is why cascaded OTA structures were inevitable for attaining gain specification of 60 dB. Nested Miller compensation with a pole shifting source follower, stabilizes the multipole system. The final circuit attains up to 200 MHz bandwidth and maintains high output swing of 0.85 V. High slew rate and good common mode and power supply rejection are observed. Noise requirements require careful design of input differential stage. Although output source follower stabilized the system, it reduces significant bandwidth and adds to second order non-linearity.

Aplicações móveis que não podem ser recarregadas durante operação, como sensores biomédicos e aplicações da Internet das Coisas, dependem da extração de energia do próprio meio onde se encontram. Tensões de alimentação típicas são normalmente maiores que as disponiveis por métodos de extração de energia do meio e requerem uma conversão de nivel DC que invariavelmente resulta em perdas proporcionais ao fator de conversão. Consequentemente, aplicações projetadas para tensões de alimentação mais próximas da tensão nominal da fonte melhora a eficiência energética. Entretanto, topologias de circuitos elétricos para tensões típicas de alimentação sao impróprias para tensões extremamente baixas. Neste trabalho foram propostas topologias de amplificadores de saída unipolar e diferencial para tensões de alimentaçãoo na casa de centenas de milivolts. As técnicas propostas se baseiam no uso de pares pseudodiferenciais com terminais de corpo polarizados diretamente para vários propósitos, incluindo rejeição de modo comum e polarização de modo comum de saída e corrente DC. Adicionalmente, um oscilador baseado na mesmas técnicas de polarização foi proposto e projetado para duas classes de aplicações: um oscilador de referência intrinsicamente estável e um oscilador controlado por tensão para conversão analógica-digital com melhor linearidade. / Nomadic applications which cannot be recharged while at operation, such as biomedical sensors and Internet of Things applications, rely on energy harvesting from the environment. Typical supply voltages are usually higher than those achieved by energy harvesting methods and requires DC-DC conversion levels, which invariably results in energy loss proportionally to the step of voltage conversion. Consequently, designing at supply voltages closer to the nominal voltage of the energy source improves power efficiency. However, extremely low supply voltages bring design challenges, as circuit topologies for typical voltages employ techniques not suitable for extremely low supply voltages. In this work, single ended and fully differential amplifier topologies for voltage supplies in the range of few hundreds mV were proposed. The proposed approaches use the pseudo differential pairs with the transistor bulk terminals with forward biasing voltages for several purposes, including common mode rejection, output common mode voltage and DC current biasing. Additionally, a ring oscillator based in the same biasing techniques was proposed and designed for two main classes of applications: an intrinsically stable reference oscillator and a voltage controlled oscillator for analog-digital conversion with linearity improvements.

Desde os anos 80 a evolução dos processos de fabricação de circuitos integrados MOS tem buscado a redução da tensão de alimentação, como forma de se reduzir o consumo de energia dos circuitos. Partiu-se dos antigos 5 V, padrão estabelecido pela lógica TTL nos anos 70, até os circuitos modernos que operam com alimentação pouco abaixo de 1 V. Entretanto, desde os primeiros anos da década de 2000, a tensão de alimentação está estabilizada neste patamar, devido a limitações tecnológicas que tem se mostrado difíceis de serem transpostas. Tal desafio tem sido estudado por grupos de pesquisa ao redor do mundo, e diversas estratégias tem sido propostas para se chegar a circuitos analógicos e digitais que operem sob tensão de alimentação bem inferior a 1 V. De fato estes grupos têm focado seus estudos em circuitos que operam com tensão de alimentação inferior a 0,5 V, alguns chegando à casa de 200 ou 100 mV, ou até menor. Dentre as diversas classes de circuitos, os conversores de dados dos tipos digital-analógico (DAC) e analógicodigital (ADC) são circuitos fundamentais ao processo de integração entre os módulos que processam sinais analogicamente e os que processam sinais digitalmente, sendo assim essenciais à implementação dos complexos SoCs (System-on-Chips) da atualidade. Este trabalho apresenta um estudo sobre o desempenho da configuração MOSFET em rede M-2M (similar à rede R-2R que emprega resistores), utilizada como circuito conversor digital-analógico, quando dimensionada para operar sob tensão de alimentação muito baixa, da ordem de 200 mV ou inferior. Tal estudo se baseia no emprego de um modelo para os MOSFETs que é contínuo desde a condição de inversão fraca (subthreshold) até a inversão forte, e inclui o uso de um modelo de descasamento entre MOSFETs que é válido para qualquer condição de operação. Com base neste estudo foi desenvolvida uma metodologia de projeto, capaz de estabelecer as relações de compromisso entre “tensão de alimentação”, “resolução efetiva” e “área ocupada em silício”, fundamentais para se atingir um circuito otimizado. Resultados de simulação elétrica são apresentados e confrontados com os resultados analíticos, visando a comprovação da metodologia. O circuito já foi enviado para fabricação, e deve começar a ser testado em breve.

abstract: For a (N+1)-bus power system, possibly 2N solutions exists. One of these solutions is known as the high-voltage (HV) solution or operable solution. The rest of the solutions are the low-voltage (LV), or large-angle, solutions. In this report, a recently developed non-iterative algorithm for solving the power- flow (PF) problem using the holomorphic embedding (HE) method is shown as being capable of finding the HV solution, while avoiding converging to LV solutions nearby which is a drawback to all other iterative solutions. The HE method provides a novel non-iterative procedure to solve the PF problems by eliminating the non-convergence and initial-estimate dependency issues appeared in the traditional iterative methods. The detailed implementation of the HE method is discussed in the report. While published work focuses mainly on finding the HV PF solution, modified holomorphically embedded formulations are proposed in this report to find the LV/large-angle solutions of the PF problem. It is theoretically proven that the proposed method is guaranteed to find a total number of 2N solutions to the PF problem and if no solution exists, the algorithm is guaranteed to indicate such by the oscillations in the maximal analytic continuation of the coefficients of the voltage power series obtained. After presenting the derivation of the LV/large-angle formulations for both PQ and PV buses, numerical tests on the five-, seven- and 14-bus systems are conducted to find all the solutions of the system of nonlinear PF equations for those systems using the proposed HE method. After completing the derivation to find all the PF solutions using the HE method, it is shown that the proposed HE method can be used to find only the of interest PF solutions (i.e. type-1 PF solutions with one positive real-part eigenvalue in the Jacobian matrix), with a proper algorithm developed. The closet unstable equilibrium point (UEP), one of the type-1 UEP’s, can be obtained by the proposed HE method with limited dynamic models included. The numerical performance as well as the robustness of the proposed HE method is investigated and presented by implementing the algorithm on the problematic cases and large-scale power system. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2015

Desde os anos 80 a evolução dos processos de fabricação de circuitos integrados MOS tem buscado a redução da tensão de alimentação, como forma de se reduzir o consumo de energia dos circuitos. Partiu-se dos antigos 5 V, padrão estabelecido pela lógica TTL nos anos 70, até os circuitos modernos que operam com alimentação pouco abaixo de 1 V. Entretanto, desde os primeiros anos da década de 2000, a tensão de alimentação está estabilizada neste patamar, devido a limitações tecnológicas que tem se mostrado difíceis de serem transpostas. Tal desafio tem sido estudado por grupos de pesquisa ao redor do mundo, e diversas estratégias tem sido propostas para se chegar a circuitos analógicos e digitais que operem sob tensão de alimentação bem inferior a 1 V. De fato estes grupos têm focado seus estudos em circuitos que operam com tensão de alimentação inferior a 0,5 V, alguns chegando à casa de 200 ou 100 mV, ou até menor. Dentre as diversas classes de circuitos, os conversores de dados dos tipos digital-analógico (DAC) e analógicodigital (ADC) são circuitos fundamentais ao processo de integração entre os módulos que processam sinais analogicamente e os que processam sinais digitalmente, sendo assim essenciais à implementação dos complexos SoCs (System-on-Chips) da atualidade. Este trabalho apresenta um estudo sobre o desempenho da configuração MOSFET em rede M-2M (similar à rede R-2R que emprega resistores), utilizada como circuito conversor digital-analógico, quando dimensionada para operar sob tensão de alimentação muito baixa, da ordem de 200 mV ou inferior. Tal estudo se baseia no emprego de um modelo para os MOSFETs que é contínuo desde a condição de inversão fraca (subthreshold) até a inversão forte, e inclui o uso de um modelo de descasamento entre MOSFETs que é válido para qualquer condição de operação. Com base neste estudo foi desenvolvida uma metodologia de projeto, capaz de estabelecer as relações de compromisso entre “tensão de alimentação”, “resolução efetiva” e “área ocupada em silício”, fundamentais para se atingir um circuito otimizado. Resultados de simulação elétrica são apresentados e confrontados com os resultados analíticos, visando a comprovação da metodologia. O circuito já foi enviado para fabricação, e deve começar a ser testado em breve.

Orientador: Fabiano Fruett / Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Elétrica e de Computação / Made available in DSpace on 2018-08-16T19:24:36Z (GMT). No. of bitstreams: 1 Camolesi_Alessandro_M.pdf: 2180894 bytes, checksum: c85cabaf810d1a57424f169a1f9b2f85 (MD5) Previous issue date: 2010 / Resumo: Apresentamos neste trabalho a fabricação e a caracterização de um sensor de pressão totalmente compatível com a tecnologia CMOS. Este sensor é constituído por quatro piezoresistores, implantados e dispostos em ponte de Wheatstone. Os processos de fabricação do sensor foram todos realizados no Centro de Componentes e Semicondutores (CCS) - Unicamp. A membrana do sensor foi obtida através de um processo de desbaste mecânico do die que foi colado em uma placa de alumina. O alinhamento da colagem foi baseado em um orifício central. O sensor encapsulado apresentou sensibilidade de 0.32mV/psi. Além disso, projetamos uma fonte de referência em tensão do tipo Bandgap. Nesta fonte de referência usamos uma técnica para minimizar os gradientes de estresse mecânico, a maior fonte de não-idealidade desta fonte de referência e permitiu estudarmos a deriva térmica da sensibilidade da ponte / Abstract: We presented in this work the fabrication and the characterization of a pressure sensor totally CMOS compatible. This sensor is arranged by four p-type silicon piezoresistive implanted in a Wheatstone bridge. The fabrication processes were all performed at the Center for Components and Semiconductors (CCS) - Unicamp. The membrane was obtained by a mechanical polishing process of the die that was attached by RTV (Room Temperature Vulcanization) on an alumina substrate. The attach alignment was based on the center of the vent hole. The packaged sensor showed a sensitivity amounts to 0.32mV/psi. Also, a Bandgap voltage reference was designed. In such voltage reference uses a technical to minimize gradients such as mechanical stress, the main non-ideality source to such voltage reference and it allowed the drift thermal analysis of the bridge sensitivity / Mestrado / Eletrônica, Microeletrônica e Optoeletrônica / Mestre em Engenharia Elétrica

Interest has been growing in the interaction of various power demand transformations, such as demand side management (DSM) and voltage control, with the power demand. Initial studies have highlighted the need for a better understanding of the power demand of low voltage (LV) residential networks. Furthermore, it is expected that future alteration of the residential appliance mixture, because of the advances in technology, will have an impact on both the demand curve as well as the electrical characteristics. This thesis presents a study of the impact of current and future household load on the power demand curve and the network operation. In order to achieve this, a bottom-up load modelling tool was developed to create LV detailed demand profiles that include not only the active and reactive power demand, but their electrical characteristics as well. The methodology uses a Markov chain Monte Carlo approach to generate residential LV demand profiles taking into account the user activity and behaviour to represent UK population. An appliance database has also been created which corresponds to the UK residential appliance mixture in order to calculate more accurately the power demand. The main advantages of the approach presented here are the flexibility in altering the type and number of the appliances that populate a household and how easily it can be adapted to a different population, location and climate. The tool is used to investigate the impact of scenarios that simulate future load replacement and the network behaviour under certain methods of demand control, implementation of DSM and control of voltage on the secondary of the LV transformer. The algorithm that was developed to apply the DSM actions on the power demand focused on the management of individual loads. The drivers used in this approach were the financial and environmental benefit of customers and the increase in the quality of the network operation. The control of the voltage as a method for power reduction takes into account the voltage dependence of the demand. The primary target is to quantify the benefits of this strategy either in combination with DSM for higher power reduction during the peak hours or on the current network as a quicker, easier and less expensive alternative to DSM. The study shows that there is a significant power reduction in both cases which is dependent on the time of day and not constant as expected from the literature. The results show that there are significant differences between current and future load demand characteristics that would be very difficult to acquire without the modelling technique presented. The alternative solution would require extensive local load and network modifications and a long period of expensive tests and measurements in the field.