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Carrier Lifetime Measurement for Characterization of Ultraclean Thin p/p+ Silicon Epitaxial LayersJanuary 2013 (has links)
abstract: Carrier lifetime is one of the few parameters which can give information about the low defect densities in today's semiconductors. In principle there is no lower limit to the defect density determined by lifetime measurements. No other technique can easily detect defect densities as low as 10-9 - 10-10 cm-3 in a simple, contactless room temperature measurement. However in practice, recombination lifetime τr measurements such as photoconductance decay (PCD) and surface photovoltage (SPV) that are widely used for characterization of bulk wafers face serious limitations when applied to thin epitaxial layers, where the layer thickness is smaller than the minority carrier diffusion length Ln. Other methods such as microwave photoconductance decay (µ-PCD), photoluminescence (PL), and frequency-dependent SPV, where the generated excess carriers are confined to the epitaxial layer width by using short excitation wavelengths, require complicated configuration and extensive surface passivation processes that make them time-consuming and not suitable for process screening purposes. Generation lifetime τg, typically measured with pulsed MOS capacitors (MOS-C) as test structures, has been shown to be an eminently suitable technique for characterization of thin epitaxial layers. It is for these reasons that the IC community, largely concerned with unipolar MOS devices, uses lifetime measurements as a "process cleanliness monitor." However when dealing with ultraclean epitaxial wafers, the classic MOS-C technique measures an effective generation lifetime τg eff which is dominated by the surface generation and hence cannot be used for screening impurity densities. I have developed a modified pulsed MOS technique for measuring generation lifetime in ultraclean thin p/p+ epitaxial layers which can be used to detect metallic impurities with densities as low as 10-10 cm-3. The widely used classic version has been shown to be unable to effectively detect such low impurity densities due to the domination of surface generation; whereas, the modified version can be used suitably as a metallic impurity density monitoring tool for such cases. / Dissertation/Thesis / M.S. Materials Science and Engineering 2013
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Estudo de camadas dielétricas para aplicação em capacitores MOS. / Study of dielectric layers for MOS capacitors.Kátia Franklin Albertin 04 October 2007 (has links)
Foram estudados filmes de oxinitreto de silício obtidos por PECVD à 320°C, a partir da mistura gasosa de N2O+SiH4+He, com diferentes valores de pressão e potência de deposição com o objetivo de produzir boa qualidade de interface deste material com o Si e de obter uma baixa densidade de carga efetiva visando a aplicação desses filmes em dispositivos semicondutores MOS. Os resultados mostraram que com uma pressão de deposição de 0,160 mbar e potências menores que 125 W/cm2 é possível obter um valor de densidade de estados de interface (Dit) de 4x1010 eV-1.cm-2, campo elétrico de ruptura (Ebd) de 13 MV/cm, valores comparáveis ao SiO2 térmico e uma densidade de carga efetiva (Nss) de 4x1011 cm-2. Segundo resultados experimentais esse valor de Nss é o mínimo possível que se pode atingir com a limpeza química utilizada em nosso laboratório. Pode-se dizer que estes são resultados bastante interessantes considerando que se trata de um material obtido por PECVD à baixa temperatura, porém viável para aplicação em dispositivos MOS. Iniciando os estudos com dielétricos de maiores valores de constante dielétrica optamos por estudar filmes de TiOx (k=40-100), obtidos por sputtering reativo, a partir da mistura gasosa de Ar+O2 e utilizando alvo de Ti. Foram fabricados capacitores MOS com estes filmes e obteve-se valores de constante dielétrica que variaram de 40-160. Porém esses materiais ainda apresentavam valores apreciáveis de corrente de fuga que foram minimizadas em ordens de grandeza quando utilizados dielétricos de dupla camada com SiO2 ou SiOxNy (otimizado neste trabalho) na interface, além de se observar uma melhora significativa da qualidade de interface. Utilizando dupla camada dielétrica com filmes de SiOxNy e SiO2, ainda espessos (³ 1nm) para camada intermediária, obteve-se uma constante dielétrica efetiva em torno de 20. Vale ressaltar que os dois filmes SiOxNy e TiOx, conseqüentemente a dupla camada, foram fabricados a baixas temperaturas. / Silicon oxynitride films obtained by the PECVD technique from N2O+SiH4+He gaseous mixtures, at 320°C, with different deposition pressure and RF power were studied intending to improve the interface quality with Si, decreasing the effective charge density and the interface state density in order to utilize them in MOS semiconductor devices. The results showed that with a deposition pressure of 0.160 mbar and a RF power density lower than 125 W/cm2 it is possible to obtain interface state density (Dit) values of 4x1010 eV-1.cm-2, Electrical Breakdown (Ebd) of 13 MV/cm, comparable with the obtained for thermally grown SiO2 , and an effective charge density (Nss) of 4x1011 cm-2. According with experimental results this Nss value is the minimum attainable with our chemical cleaning process. In this way it can be said that these results are very promising, considering that these materials were obtained by PECVD at low temperatures, but still viable for MOS devices application. In order to initiate studies with high dielectrics constant material, TiOx films (k= 40-180), obtained by reactive sputtering through the Ar+O2 gaseous mixture utilizing a Ti target, were chosen. MOS capacitors with these films were fabricated and dielectric constant values varying from 40 to 160 were obtained. However, until now, these materials have presented appreciable leakage current values, which were, minimize by orders of magnitude with the addition of a thin SiO2 or SiOxNy (optimized in this work) layer at the interface were utilized. This thin layer also resulted in a significant improvement of the interface quality. Utilizing double dielectric layer with SiOxNy or SiO2, still thick (³ 1nm) as intermediate layer a dielectric constant value of 20 was obtained. Its important to mention that the SiOxNy and TiOx films, and consequently the double layer, were deposited at low temperatures.
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Estudo de camadas dielétricas para aplicação em capacitores MOS. / Study of dielectric layers for MOS capacitors.Albertin, Kátia Franklin 04 October 2007 (has links)
Foram estudados filmes de oxinitreto de silício obtidos por PECVD à 320°C, a partir da mistura gasosa de N2O+SiH4+He, com diferentes valores de pressão e potência de deposição com o objetivo de produzir boa qualidade de interface deste material com o Si e de obter uma baixa densidade de carga efetiva visando a aplicação desses filmes em dispositivos semicondutores MOS. Os resultados mostraram que com uma pressão de deposição de 0,160 mbar e potências menores que 125 W/cm2 é possível obter um valor de densidade de estados de interface (Dit) de 4x1010 eV-1.cm-2, campo elétrico de ruptura (Ebd) de 13 MV/cm, valores comparáveis ao SiO2 térmico e uma densidade de carga efetiva (Nss) de 4x1011 cm-2. Segundo resultados experimentais esse valor de Nss é o mínimo possível que se pode atingir com a limpeza química utilizada em nosso laboratório. Pode-se dizer que estes são resultados bastante interessantes considerando que se trata de um material obtido por PECVD à baixa temperatura, porém viável para aplicação em dispositivos MOS. Iniciando os estudos com dielétricos de maiores valores de constante dielétrica optamos por estudar filmes de TiOx (k=40-100), obtidos por sputtering reativo, a partir da mistura gasosa de Ar+O2 e utilizando alvo de Ti. Foram fabricados capacitores MOS com estes filmes e obteve-se valores de constante dielétrica que variaram de 40-160. Porém esses materiais ainda apresentavam valores apreciáveis de corrente de fuga que foram minimizadas em ordens de grandeza quando utilizados dielétricos de dupla camada com SiO2 ou SiOxNy (otimizado neste trabalho) na interface, além de se observar uma melhora significativa da qualidade de interface. Utilizando dupla camada dielétrica com filmes de SiOxNy e SiO2, ainda espessos (³ 1nm) para camada intermediária, obteve-se uma constante dielétrica efetiva em torno de 20. Vale ressaltar que os dois filmes SiOxNy e TiOx, conseqüentemente a dupla camada, foram fabricados a baixas temperaturas. / Silicon oxynitride films obtained by the PECVD technique from N2O+SiH4+He gaseous mixtures, at 320°C, with different deposition pressure and RF power were studied intending to improve the interface quality with Si, decreasing the effective charge density and the interface state density in order to utilize them in MOS semiconductor devices. The results showed that with a deposition pressure of 0.160 mbar and a RF power density lower than 125 W/cm2 it is possible to obtain interface state density (Dit) values of 4x1010 eV-1.cm-2, Electrical Breakdown (Ebd) of 13 MV/cm, comparable with the obtained for thermally grown SiO2 , and an effective charge density (Nss) of 4x1011 cm-2. According with experimental results this Nss value is the minimum attainable with our chemical cleaning process. In this way it can be said that these results are very promising, considering that these materials were obtained by PECVD at low temperatures, but still viable for MOS devices application. In order to initiate studies with high dielectrics constant material, TiOx films (k= 40-180), obtained by reactive sputtering through the Ar+O2 gaseous mixture utilizing a Ti target, were chosen. MOS capacitors with these films were fabricated and dielectric constant values varying from 40 to 160 were obtained. However, until now, these materials have presented appreciable leakage current values, which were, minimize by orders of magnitude with the addition of a thin SiO2 or SiOxNy (optimized in this work) layer at the interface were utilized. This thin layer also resulted in a significant improvement of the interface quality. Utilizing double dielectric layer with SiOxNy or SiO2, still thick (³ 1nm) as intermediate layer a dielectric constant value of 20 was obtained. Its important to mention that the SiOxNy and TiOx films, and consequently the double layer, were deposited at low temperatures.
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LEAKAGE CURRENT REDUCTION OF MOS CAPACITOR INDUCED BY RAPID THERMAL PROCESSINGWang, Yichun 01 January 2010 (has links)
With the MOSFET scaling practice, the performance of IC devices is improved tremendously as we experienced in the last decades. However, the small semiconductor devices also bring some drawbacks among which the high gate leakage current is becoming increasingly serious.
This thesis work is focused on the of gate leakage current reduction in thin oxide semiconductor devices. The method being studied is the Phonon Energy Coupling Enhancement (PECE) effect induced by Rapid Thermal Processing (RTP). The basic MOS capacitors are used to check improvements of leakage current reduction after appropriate RTP process.
Through sets of experiments, it is found that after RTP in Helium environment could bring about four orders reduction in gate leakage current of MOS capacitors.
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Growth and doping of heteroepitaxial 3C-SiC layers on α-SiC substrates using Vapour-Liquid-Solid mechanism / La croissance et le dopage de couches 3C-SiC hétéroépitaxiales sur des substrats α-SiC en utilisant le mécanisme vapeur-liquide-solideDa Conceicao Lorenzzi, Jean Carlos 18 October 2010 (has links)
L'utilisation récente d'une voie originale de croissance cristalline basée sur les mécanismes vapeur-liquide-solide (VLS) à partir d'un bain Ge-Si a permis des améliorations importantes de la qualité cristalline des couches minces hétéroépitaxiales de SiC-3C sur substrats sur substrat α-SiC(0001). Ce travail a pour but d'approfondir les connaissances sur cette technique de croissance, d'améliorer le procédé et de déterminer les propriétés du matériau élaboré. La première partie est dédiée à la compréhension et la maîtrise des différents mécanismes impliqués dans la croissance de SiC-3C par VLS. Cela a notamment permis la détermination des paramètres limitant la taille des échantillons et la démonstration des avantages à utiliser des alliages fondus contant 50 at% de Ge au lieu de 75 at%. Une étude de la croissance latérale sur substrats patternés a donné des indications intéressantes pouvant être intégrées dans le modèle d'élimination des macles. L'incorporation intentionnelle et non intentionnelle de dopants de type n et p pendant la croissance VLS a été suivie. Pour le dopage n, nous avons démontré l'existence d'un lien clair entre l'impureté N et la stabilisation du polytype SiC-3C. En outre, nous avons réussi à abaisser le dopage résiduel n des couches en dessous de 1x1017 cm-3. Pour le dopage p, le meilleur élément n'est pas le Ga mais l'Al, même s'il doit être ajouté à un alliage de type Si-Ge pour éviter l'homoépitaxie. Enfin, ces couches ont été caractérisées optiquement et électriquement par différentes techniques. Les mesures C-V et G-V ont permis d'estimer une concentration très faible (7×109 cm-2) de charges fixes dans l'oxyde SiO2 ainsi qu'une densité d'états d'interface aussi basse que 1.2×1010 cm-2eV-1 à 0.63 eV sous la bande de conduction. Ces valeurs record sont une très bonne base pour le développement d'un composant de type MOSFET en SiC-3C / Recently, the use of an original growth approach based on vapour-liquid-solid (VLS) mechanism with Ge-Si melts has led to significant improvement of the crystalline quality of the 3C-SiC thin layers heteroepitaxially grown on α-SiC(0001) substrate. This work tries to deepen the knowledge of such specific growth method, to improve the process and to determine the properties of the grown material. The first part was dedicated to the understanding and mastering of the various mechanisms involved in 3C-SiC growth by VLS mechanism. This led to the determination of the parameters limiting sample size and the demonstration of the benefits of using 50 at% Ge instead of 75 at% Ge melts. A study of lateral enlargement on patterned substrates gave some interesting hints which can be integrated in the model of twin defect elimination. The incorporation of non intentional and intentional n- and p-type dopants during VLS growth was studied. For n-type doping, a clear link between N impurity and 3C polytype stability was demonstrated. Besides, high purity layers with residual n-type doping below 1x1017 cm-3 were achieved. For p-type doping, the best element was shown to be Al and not Ga, even if it has to be alloyed with Ge-Si melts to avoid homoepitaxial growth. Finally, these layers were characterised by several optical and electrical means like Raman spectroscopy, low temperature photoluminescence, deep leveltransient spectroscopy and MOS capacitors measurements. Very low concentrationsof fixed oxide charges estimated about 7×109 cm-2 and interface states densities Dit equal to 1.2×1010 cm-2eV-1at 0.63 eV below the conduction band have been achieved. These record values are a very good base toward 3C-SiC MOSFET
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