The project objective is to see how a pulse propagates along an optical fiber. This will take into account the linear effects of the fiber, as well as the nonlinear effects. Also be checked several commercial fiber types. And finally the propagation is carried to the limit to see how far it could spread without problems.

NTNU is aiming to build and launch a small student satellite compliant with thedouble CubeSat standard, by 2014. The NTNU Test Satellite (NUTS) will carrytwo radio tranceivers and a beacon transmitter, all located in the VHF and UHFamateur bands. The goal of this thesis was to build the whole antenna systems forthe spacecraft.Turnstile antennas were chosen both for UHF and VHF, since they yield thehighest received signal strength on ground throughout the whole pass of the satel-lite. In order to reach this conclusion, a study of how the choice of spacecraftantennas dynamically influence the link margin was carried out. Furthermore, theantennas was made by measuring tape, and is to be wrapped around the satelliteuntil deployment. This is for the satellite to be within the size constraints of adouble CubeSat during launch. The measuring tape will be tightened to the satel-lites body by nylon thread, which will be burnt off by Nichrome-wire to release themeasuring tape when the satellite is in-orbit. The measuring tape is mounted inbetween two circuit boards constituting the internal part of the antenna module.The feeding network is encapsulated by these two circuit boards. The module ismade such that the antenna complies with the CubeSat standard, and such that itcan be integrated with other modules on-board the satellite, such as the camera.Feeding the antennas turned out more difficult than first anticipated. Whereasconventional feeding networks for turnstile antennas typically comprises baluns andarrangements of coaxial cable comparable to the wavelength, such solutions are notfeasible within the satellite due to size constraints. As a result a lumped feedingnetwork was designed, that could be mounted on one of the circuit boards.Because of the many reactive components in the feeding network, it becamenecessary to determine how deviations in component values affect the performanceof the circuit. Statistical simulations was performed, and the deviations may causean unbalance between the amplitudes and phases of the outputs. But this resultsin less than half a dB additional losses in the link budget.A refinement of electromagnetic antenna simulations from previous work wasalso carried out. With this, the performance of the antennas was verified, andtheir lengths were optimized to yield the best possible match. The VHF antenna isnear-ideal both in terms of pattern and matching. The pattern of the UHF antennais somewhat distorted, but it is still considered to be the best suited antenna ofthose considered. The matching of the UHF antenna could have been better, butis considered acceptable. Moreover, the mutual coupling between the VHF andUHF antennas were studied, with the conclusion that the antennas may very wellco-exist on-board the satellite.Finally, both the feeding network and the VHF antenna were successfully builtand tested. The feeding network had an insertion loss of less than 2 dB, whereas thepattern of the antenna was measured to be near-ideal. Unfortunately, a fault hasoccurred on the UHF feeding network, which also prohibits the pattern for the UHFantenna to be measured. Nonetheless, all the parts constituting it has been built,and all the necessary simulations are done. Previous and future troubleshooting ofthe feeding network is also discussed.

This thesis has taken a closer look at the implementation of the back-end of a language recognition system. The front-end of the system is a Universal Attribute Recognizer (UAR), which is used to detect phonetic characteristics in an utterance. When a speech signal is sent through the UAR, it is decoded into a sequence of attributes which is used to generate a vector of term-count. Vector Space Modeling (VSM) have been used for training the language classifiers in the back-end. The main principle of VSM is that term-count vectors from the same language will position themselves close to eachother when they are mapped into a vector space, and this property can be exploited for recognizing languages. The implemented back-end has trained vectors space classifiers for 12 different languages, and a NIST recognition task has been performed for evaluating the recognition rate of the system. The NIST task was a verification task and the system achived a equal error rate (EER) of $6.73 %$. Tools like Support Vector Machines (SVM) and Gaussian Mixture Models (GMM) have been used in the implementation of the back-end. Thus, are quite a few parameters which can be varied and tweaked, and different experiments were conducted to investigate how these parameters would affect EER of the language recognizer. As a part test the robustness of the system, the language recognizer were exposed to a so-called out-of-set language, which is a language that the system has not been trained to handle. The system showed a poor performance at rejecting these speech segments correctly.

A complete analog front-end for portable ECG systems in 65nm technology was modeled and simulated using Cadence Virtuoso. All the required components for the AFE was incorporated into the continuous-time loop filter of a 10-bit ADC. By varying the effective transconductance of the input OTA, preamplification of the input signal was achieved. The required filtering is achieved through the ADC's own loop filter and through digital post-filtering. The ADC meets the IEC60601-2-47 standard. This simple, minimal and digitally assisted converter achieve some attractive features by dynamically adapting the programmable signal gain of the first integrator to keep the output signal range at a more constant level where the SNDR is sufficiently high.The ADC has a 100Hz bandwidth, achieves an ENOB of over 9.4 bits at a power consumption of 3.6 uWatts. The input referred noise ranges from 2.7uV(RMS) to 18.7uV(RMS) depending on gain setting. The estimated area consumption is about 0.2mm2.

Siden digital kommunikasjon krever raskere og raskere systemer for å kunne håndtere økende behov for båndbredde og samplingsrate, kan systemer med èn ADC være utilstrekkelig. En løsning på dette problemet er å bruke TIADC systemer, som kan eliminere nødvendigheten til å stadig utvikle raskere og mer nøyaktige ADCer. Dette siden den totale hastigheten til et TIADC system er lik summen av de individuelle ADCene.I denne oppgaven har signalrekonstruksjon av et båndbegrenset signal fra et 2-TIADC og et 4-TIADC system, med antakelsene ikke-uniform periodisk sampling og kjent tidsforskyvning blitt vist. Den valgte metoden er basert på multirate filterbanker, hvor filterkoeffisientene blir funnet via interpolasjoen med en raised cosine funksjon. Det valgte inngangssignalet er et sinus signal med frekvens på 350 MHz, og samplingsfrekvensen ble valgt til 1 GHz. Lengden på de digitale filtrene blir bestemt av k og intervallet definert som [-2k-1,2k].Simuleringsresultatene viste at inngangssignalet fra 2-TIADC systemet kan, med $k$ valgt mellom 10 til 45 avhengig av roll-off faktoren, rekonstrueres med feil innen den satte feilgrensen på -100dB (MSE). Resultatene for 4-TIADC systemet viste seg å ha større feil, og for å kunne oppnå en rekonstruksjon innen feilgrensen, må k økes til mellom 15 og 50 avhengig av roll-off faktoren.Systemet for 2-TIADC ble også testet for å se hvordan metoden håndterte en økende tidsforskyvning. Tidsforskyvningen varierte fra 0.1-0.99% av Ts, og verdiene av k som ble testet var 25, 50 og 100. Resultatene viste at inngangssignalet kan rekonstrueres med en tidsforskyvning på henholdsvis 0.7, 0.85 og 0.95 Ts med en feil innen den valgte grensen.

This project investigates the feasibility of automating the test of ΔΣ-modulators using circuitcomponents available on 8-bit microcontrollers, and by doing so reducing test costs.A Built-In-Self-Test (BIST) scheme, using a binary stream as stimuli and two differentsolutions for signal analysis is suggested and simulated in SPICE to investigate its suitability.The test can not lead to a large area increase, increasing area leads to an increase inproduction cost. The test has to reduce testing time. The extra area occupied by the testarchitecture has to be paid in shorter testing time and therefore a lower unit price. The test hasto remove or lower the requirements of the off-chip tester, and by doing so reducing cost.The proposed BIST requires a very small area and is capable of calculating offset, gain andSignal to Noise Ratio with a high degree of accuracy. The proposed solution enables on-chiptesting without the need for expensive external stimuli and signal analyzers, making testing onwafer possible thus improving production yield.The proposed test will not reduce test time by itself, however by integrating the test on-chipand allowing this to run in the background while other on-chip modules are tested total testtime can be reduced to the time required to shift the stimuli into the chip

In this report, a novel method for making single strings of particles is presented.These strings were characterized using diverse electromechanical methods

The main goal of this thesis is to establish a method and estimate the complex materialconstants for the radial and thickness mode. This has been done in two separate methods. For the thickness mode material constants, a optimization script in MATLAB has been developed, which is capable of directly optimizing all the input parameters for the xTrans, for both active and passive layers. The method has been evaluated, and the complex material constants describe behavior in accordance with measured data. For estimating the radial mode complex material constants, an evaluation a publish method by S.Sherrit has been done.

This Master's thesis is a continuation of the specialization project I did during the spring of 2011. The goal of said project was to set up a system for UV-photoluminescence experiments in the Nanophotonics laboratory at the Department of Electronics and Telecommunications at NTNU, and conduct photoluminescence spectroscopy measurements on different zinc oxide nanostructures, including GaAs/AlGaAs/ZnO core/multishell nanowires. This thesis involves studying zinc oxide nanowires using both a continuous wave and pulsed ultraviolet laser light, and the final goal is to optically excite these nanowires so they achieve lasing. Using a Tsunami Ti:sapph mode-locked tunable laser and a flexible harmonic generator, laser pulses with a pulse duration of 2 ps could be generated at wavelengths around 300 nm, at a power of around 5 mW. At this power, some of the wires showed possible signs of optical gain, but since it was not possible to apply more power to the wires, this could not be confirmed. If there had be enough time, both low temperature measurements and time-resolved spectroscopy, using a streak camera, would have been performed.

The linear FMCW radar has become more popular in recent years mainly due toadvances in digital signal processing and the good performance of the radar at closeranges. What puts limits to the performance is mainly phase noise. Because trans-mission and reception happen simultaneously, the phase noise will limit the maxi-mum power that should be used and hence also the ability to detect weak targets.By ensuring during the design process that the phase noise is low, the radar’s perfor-mance will thus get better. This thesis describes the construction of a FMCW radarfrequency synthesizer where the focus is mainly on phase noise. The functionalityof the circuit is shown to be successful, but there is more phase noise than what ispredicted. Several causes for this are discussed. Important background theory aboutradars, phase noise and phase-locked loops is presented and several simulations areperformed in order to get a better understanding. The conclusion of the work isthat it is not very hard to build a synthesizer, but in order to tweak the phase noiseperformance to be as good as the linear theory tells it to be, careful attention mustbe paid during all stages of the design.