A dissertation submitted to the Faculty of Engineering and the Built Environment, University of the Witwatersrand, Johannesburg, in fulfilment of the requirements for the degree of Master of Science in Engineering, 2017 / This research has considered an idealistic non-interleaved planar transformer wherein only the electromagnetic parasitic capacitive and inductive elements arising out of the transformer geometry are taken into account, without considering material limitations. A suitable model for the planar transformer is used to analyse its frequency and power transfer characteristics; this model was validated by three dimensional electromagnetic simulations of various planar transformer structures in FEKO simulation software. The capacitive and inductive parasitics in this model have been found to be functions of the dielectric thickness. The theoretical bandwidth for the planar transformer is defined in this research as a function of dielectric thickness. The effect of dielectric thickness of the transformer windings on the bandwidth of the transformer is analysed, based on the premise that the inherent parasitic capacitive and inductive elements would affect the transfer characteristics of the transformer. Upon conclusion of this analysis, it is found that the dielectric thickness of a planar transformer can be optimised such as to present an optimised bandwidth. A closed form analytic expression for the optimum dielectric thickness value is derived and presented in this research. In a design example of a 4:1 50W transformer presented in this research, it has been shown that the bandwidth can be improved by 384%, along with a power density improvement of 45%, upon choosing of an optimum dielectric thickness of 0.156mm to replace a standard 0.4mm thick dielectric. It should be noted that the results derived in this research are purely theoretical, justified by many idealisations and assumptions that are argued throughout the research. It is thus expected that practical results should at best approach the theoretical results, due to the known non-ideal nature of reality. / CK2018

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An Underwater Digital Signal Processor (UDSP) multichip module (MCM) was designed and fabricated according to specifications outlined by the Naval Surface Warfare Center (NSWC), Dahlgren Division. Specifications indicated that low temperature cofired ceramic (L TCC) technology be used to fabricate the MCM with surface dimensions of 2"x2". The top surface of the module was to be designed to enclose mounted components and bare dice, and the bottom surface was to be equipped with a 144 pin grid array (PGA). The LTCC technology selected for this application incorporated DuPont's 951 Green Tape™ and compatible materials and pastes. A mixed metal system using inner silver system and outer surface gold system was used. Harris Corporation's FINESSE MCMTM, a computer-aided design (CAD) tool, was used to design the surface components and produce the circuit layout. FREESTYLE MCM™, an autorouter, was used to accomplish the routing of the signal layers. The design information provided by FINESSE MCM™ and FREESTYLE MCM™ was utilized to produce the artwork necessary for fabrication. Fabrication of the module was accomplished in part using thick film processes to produce the conducting areas on each layer. The layers were stacked in a press, laminated, and fired. Conducting areas were screen printed on the top surface of the module for wire bonding and on the bottom surface of the module for pin attachment. The main objectives of this thesis work were to convert silicon UDSP MCM to ceramic using LTCC, learn a new tool in CAD design that incorporates an autorouter, apply the tool to design a MCM-C module, and to develop criteria to evaluate the MCM. Future research work includes conducting line continuity testing, materials evaluation to determine reactions at interfaces and via filling, and resistance and electrical crosstalk measurements on the module. / Master of Science

Indiana University-Purdue University Indianapolis (IUPUI) / The prevalent applications of energy storage devices have incited wide-spread efforts on production of thin, flexible, and light-weight lithium-ion batteries. In this work, lithium-ion batteries using novel flexible paper-based current collectors have been developed. The paper-based current collectors were fabricated from carbon nanotube (CNT)-coated wood microfibers (CNT-microfiber paper). This thesis presents the fabrication of the CNT-microfiber paper using wood microfibers, coating electrode materials, design and assemblies of battery, testing methodologies, and experimental results and analyses. Wood microfibers were coated with carbon nanotubes and poly(3,4-ethylenedioxythiophene) (PEDOT) through an electrostatic layer-by-layer nanoassembely process and formed into a sheet, CNT-microfiber paper. The CNT loading of the fabricated paper was measured 10.1 μg/cm2 subsequently considered. Electrode material solutions were spray-coated on the CNT-microfiber paper to produce electrodes for the half and full-cell devices. The CNT current collector consists of a network structure of cellulose microfibers at the micro-scale, with micro-pores filled with the applied conductive electrode materials reducing the overall internal resistance for the cell. A bending test revealed that the paper-based electrodes, compared to metal ones, incurred fewer damages after 20 bends at an angle of 300o. The surface fractures on the paper-based electrodes were shallow and contained than metallic-based electrodes. The micro-pores in CNT-microfiber paper structure provides better adherence to the active material layer to the substrate and inhibits detachment while bending. Half-cells and full-cells using lithium cobalt oxide (LCO), lithium titanium oxide (LTO), and lithium magnesium oxide (LMO) were fabricated and tested. Coin cell assembly and liquid electrolyte was used. The capacities of half-cells were measured 150 mAh/g with LCO, 158 mAh/g with LTO, and 130 mAh/g with LMO. The capacity of the LTO/LCO full-cell also was measured 126 mAh/g at C/5 rate. The columbic efficiency of the LTO/LCO full-cell was measured 84% for the first charging cycle that increased to 96% after second cycle. The self-discharge test of the full-cell after charging to 2.7 V at C/5 current rate is showed a stable 2 V after 90 hours. The capacities of the developed batteries at lower currents are comparable to the metallic electrode-based devices, however, the capacities were observed to drop at higher currents. This makes the developed paper-based batteries more suitable for low current applications, such as, RFID tags, flexible electronics, bioassays, and displays. The capacities of the batteries at higher current can be improved by enhancing the conductivity of the fibers, which is identified as the future work. Furthermore, fabrication of an all solid state battery using solid electrolyte is also identified as the future work of this project.