In this thesis, an interface passivation by a lattice matched atomic layer deposition (ALD) epitaxial magnesium calcium oxide (MgCaO) on wide-bandgap gallium nitride (GaN) has been applied for the first time and expensively studied via various characterization methods (including AC conductance methods, pulsed current-voltage, and single pulse charge pumping). Also, beta-Ga2O3 with a monoclinic crystal structure that offers several surface oriented channels has been demonstrated as potential beta-Ga2O3 FET. On the other hand, low frequency noise studies in 2-D MoS2 NC-FETs was reported for the first time. Low frequency noise of the devices is systematically studied depending on various interfacial oxides, different thicknesses of interfacial oxide, and ferroelectric hafnium zirconium oxide. Interestingly enough, the low frequency noise is found to decrease with thicker ferroelectric HZO in the subthreshold regime of the MoS2 NC-FETs, in stark contrast to the conventional high-k transistors. Also, the ferroelectric switching speed is found to be related with the maximum electric field applied during the fast gate voltage sweep, suggesting the internal ferroelectric switching speed can be even faster depending on the device’s electrical bias conditions and promises a high speed performance in our ferroelectric HZO

<div>Germanium-based MOS device which is considered as one of the promising alternative channel materials has been studied with well-known FinFET, nanowire structures and HKMG (High-k metal gate). Recent introduction of Ferroelectric (FE) Zr-doped HfO₂ (Hf_xZr_1-xO₂, HZO) has opened various possibilities both in memory and logic</div><div>applications.</div><div><br></div><div>First, integration of FE HZO into the conventional Ge platform was studied to demonstrate Ge FeFET. The FE oxide was deposited with optimized atomic layer deposition (ALD) recipe by intermixing HfO₂ and ZrO₂. The HZO film was characterized with FE tester, XRD and AR-XPS. Then, it was integrated into conventional gate stack of Ge devices to demonstrate Ge FeFETs. Polarization switching was measured with ultrafast measurement set-up down to 100 ps.</div><div><br></div><div>Then, HZO layer was controlled for the first demonstration of hysteresis-free Ge negative capacitance (NC) CMOS FinFETs with sub-60mV/dec SS bi-directionally at room temperature towards possible logic applications. Short channel effect in Ge NCFETs were compared with our reported work to show superior robustness. For smaller widths that cannot be directly written by the e-beam lithography tool, digital etching on Ge fins were optimized.</div><div>Lastly, Ge FeFET-based synaptic device for neuromorphic computing was demonstrated. Optimum pulsing schemes were tested for both potentiation and depression which resulted in highly linear and symmetric conductance profiles. Simulation was done to analyze Ge FeFET's role as a synaptic device for deep neural network.</div>