Human brains can complete numerous intelligent tasks, such as pattern recognition, reasoning, control and movement, with remarkable energy efficiency (20 W). In contrast, a typical computer only recognizes 1,000 different objects but consumes about 250 W power [1]. This performance significant differences stem from the intrinsic different structures of human brains and digital computers. The latest discoveries in neuroscience indicate the capabilities of human brains are attributed to three unique features: (1) neural network structure; (2) spike-based signal representation; (3) synaptic plasticity and associative memory learning [1, 2]. In this dissertation, the next-generation platform of artificial intelligence is explored by utilizing memristors to design a three-dimensional high-performance neuromorphic computing system. The low-variation memristors (fabricated by Virginia Tech) reduce the learning accuracy of the system significantly through adding heat dissipation layers. Moreover, three emerging neuromorphic architectures are proposed showing a path to realizing the next-generation platform of artificial intelligence with self-learning capability and high energy efficiency. At last, an Associative Memory Learning System is exhibited to reproduce an associative memory learning that remembers and correlates two concurrent events (pronunciation and shape of digits) together. / Doctor of Philosophy / In this dissertation, the next-generation platform of artificial intelligence is explored by utilizing memristors to design a three-dimensional high-performance neuromorphic computing system. The low-variation memristors (fabricated by Virginia Tech) reduce the learning accuracy of the system significantly through adding heat dissipation layers. Moreover, three emerging neuromorphic architectures are proposed showing a path to realizing the next-generation platform of artificial intelligence with self-learning capability and high energy efficiency. At last, an Associative Memory Learning System is exhibited to reproduce an associative memory learning that remembers and correlates two concurrent events (pronunciation and shape of digits) together.

The aggressive scaling of CMOS technology, to reduce device size while also increasing device performance, has reached a point where continuing improvement is becoming increasingly problematic and alternative routes for the development of future memory and processing devices may be necessary; in this thesis the use of phase-change and carbon based materials as one such alternative route is investigated. As pointed out by Ovshinsky [1, 2] some phase-change material should be capable of non-binary arithmetic processing, multi-value logic and biological (neuromorphic) type processing. In this thesis, generic, nanometre-sized, phase-change pseudodevices were fabricated and utilised to perform various types of computational operations for the first time, including addition, subtraction, division, parallel factorization and logic using a novel resistive switching accumulator-type regime in the electrical domain. The same accumulator response is also shown to provide an electronic mimic of an integrate-and-fire type neuron. The accumulator-type regime uses fast electrical pulses to gradually crystallize a phase-change device in a finite number of steps and does not require a multilevel detection scheme. The phase-change materials used in this study were protected by a capping layer of sputtered amorphous carbon. It was found that this amorphous carbon layer also underwent a form of resistive switching when subjected to electrical pulses. In particular, sputtered amorphous carbon layers were found to switch from an initially high resistivity state to a low resistivity state when a voltage pulse was locally applied using a Conductive Atomic Force Microscope (CAFM) tip. Further experiments on amorphous carbon vertical pseudo-devices and lithographically defined planar devices showed that it has potential as a new material for Resistive Random Access Memory (ReRam) applications. The switching mechanism was identified as clustering of the sp2 hybridized carbon sites induced by Joule heating. It was not possible to reset the devices back to their initial high resistivity state presumably due to the highly conductive nature of sputtered amorphous carbon.

Les réseaux de neurones artificiels constituent des systèmes alternatifs pour effectuer des calculs complexes, ainsi que pour contribuer à l'étude des systèmes neuronaux biologiques. Ils sont capables de résoudre des problèmes complexes, tel que la prédiction de signaux chaotiques, avec des performances à l'état de l'art. Cependant, la compréhension du fonctionnement des réseaux de neurones dans la résolution de problèmes comme la prédiction reste vague ; l'analogie avec une boîte-noire est souvent employée. En combinant la théorie des systèmes dynamiques non linéaires avec celle de l'apprentissage automatique (Machine Learning), nous avons développé un nouveau concept décrivant à la fois le fonctionnement des réseaux neuronaux ainsi que les mécanismes à l'œuvre dans leurs capacités de prédiction. Grâce à ce concept, nous avons pu imaginer un processeur neuronal hybride composé d'un réseaux de neurones et d'une mémoire externe. Nous avons également identifié les mécanismes basés sur la synchronisation spatio-temporelle avec lesquels des réseaux neuronaux aléatoires récurrents peuvent effectivement fonctionner, au-delà de leurs états de point fixe habituellement utilisés. Cette synchronisation a entre autre pour effet de réduire l'impact de la dynamique régulière spontanée sur la performance du système. Enfin, nous avons construit physiquement un réseau récurrent à retard dans un montage électro-optique basé sur le système dynamique d'Ikeda. Celui-ci a dans un premier temps été étudié dans le contexte de la dynamique non-linéaire afin d'en explorer certaines propriétés, puis nous l'avons utilisé pour implémenter un processeur neuromorphique dédié à la prédiction de signaux chaotiques. / Artificial neural networks are systems prominently used in computation and investigations of biological neural systems. They provide state-of-the-art performance in challenging problems like the prediction of chaotic signals. Yet, the understanding of how neural networks actually solve problems like prediction remains vague; the black-box analogy is often employed. Merging nonlinear dynamical systems theory with machine learning, we develop a new concept which describes neural networks and prediction within the same framework. Taking profit of the obtained insight, we a-priori design a hybrid computer, which extends a neural network by an external memory. Furthermore, we identify mechanisms based on spatio-temporal synchronization with which random recurrent neural networks operated beyond their fixed point could reduce the negative impact of regular spontaneous dynamics on their computational performance. Finally, we build a recurrent delay network in an electro-optical setup inspired by the Ikeda system, which at first is investigated in a nonlinear dynamics framework. We then implement a neuromorphic processor dedicated to a prediction task.

This work lays out the development of a reconfigurable electronic system, which is composed of biologically relevant circuits. This system has been termed a Field-Programmable Neuron Array (FPNA) and is analogous to the more familiar Field-Programmable Gate Array (FPGA) and Field-Programmable Analog Array (FPAA). At the core of the system is an array of output somas based on previously developed bio-physically based channel models. Linking them together is a complex 2D dendrite matrix, FPAA-like floating-gate routing, and associated support circuitry. Several levels of generality give this system unprecedented re-configurability. The dendrite matrix can be arbitrarily configured so that many different topologies of dendrites can be investigated. Different soma circuits can be connected / disconnected to / from the dendrite matrix. Outputs from the somas can be arbitrarily routed to input synapses that exist at each dendrite node as well as the soma nodes. Lastly, the dynamics of each node consist of a mixture of individually tunable parts and global biases. All of this can be configured in concert to investigate neural circuits that exist in biological systems. This chip will have a significant impact on research in many fields including neuroscience, neuromorphic engineering, and robotics. This chip will allow for rapid prototyping of spinal circuits. Since the fundamental circuits of the system are chosen to be biologically relevant, outputs from the various nodes should also be relevant, thus yielding itself to use by neuroscientists. This system also provides a tool by where biological systems can be emulated in real-world electronic systems. Solutions to many problems faced by roboticists (such as bi-pedal standing / walking / running / jumping / climbing and the transitions between states) are present in biology. By providing a chip that can duplicate the same neural circuits that are responsible for these processes in the biology, the hypothesis is that researchers can begin to solve some of the same types of problems in artificial systems.

Neuromorphic computing has many opportunities in future autonomous systems, especially those that will operate at the edge. However, there are relatively few demonstrations of neuromorphic implementations on real-world applications, partly because of the lack of availability of neuromorphic hardware and software, but also because of the lack of availability of an accessible demonstration platform. In this work, we propose utilizing the F1Tenth platform as an evaluation task for neuromorphic computing. F1Tenth is a competition wherein one tenth scale cars compete in an autonomous racing task; there are significant open source resources in both software and hardware for realizing this task. We present a workflow with neuromorphic hardware, software, and training that can be used to develop a spiking neural network for neuromorphic hardware deployment to perform autonomous racing. We present initial results on utilizing this approach for this small-scale, real-world autonomous vehicle task.

An extensive reliance on technology, an abundance of data, and increasing processing requirements have imposed severe challenges on computing and data processing. Moreover, the roadmap for scaling electronic components faces physical and reliability limits that hinder the utilization of the transistors in conventional systems and promotes the need for faster, energy-efficient, and compact nano-devices. This work thus capitalizes on emerging non-volatile memory technologies, particularly the memristor for steering novel design directives. Moreover, aside from the conventional deterministic operation, a temporal variability is encountered in the devices functioning. This inherent stochasticity is addressed as an enabler for endorsing the stochastic electronics field of study. We tackle this approach of design by proposing and verifying a statistical approach to modelling the stochastic memristors behaviour. This mode of operation allows for innovative computing designs within the approximate computing and beyond Von-Neumann domains. In the context of approximate computing, sacrificing functional accuracy for the sake of energy savings is proposed based on inherently stochastic electronic components. We introduce mathematical formulation and probabilistic analysis for Boolean logic operators and correspondingly incorporate them into arithmetic blocks. Gate- and system-level accuracy of operation is presented to convey configurability and the different effects that the unreliability of the underlying memristive components has on the intermediary and overall output. An image compression application is presented to reflect the efficiency attained along with the impact on the output caused by the relative precision quantification. In contrast, in neuromorphic structures the memristors variability is mapped onto abstract models of the noisy and unreliable brain components. In one approach, we propose using the stochastic memristor as an inherent source of variability in the neuron that allows it to produce spikes stochastically. Alternatively, the stochastic memristors are mapped onto bi-stable stochastic synapses. The intrinsic variation is modelled as added noise that aids in performing the underlying computational tasks. Both aspects are tested within a probabilistic neural network operation for a handwritten MNIST digit recognition application. Synaptic adaptation and neuronal selectivity are achieved with both approaches, which demonstrates the savings, interchangeability, robustness, and relaxed design space of brain-inspired unconventional computing systems.

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Today, there is an ever-growing demand for compact, and energy autonomous, implantable biomedical sensors. These devices, which continuously collect in vivo physiological data, are imperative in the next generation patient monitoring systems. One of the fundamental challenges in their implementation, besides the obvious size constraints and the tissue-to-electronics biocompatibility impediments, is the efficient means to wirelessly deliver power to them. This work addresses this challenge by demonstrating an energy-autonomous and fully-integrated implantable sensor chip which takes advantage of the existing on-chip photodiodes of a standard CMOS process as photovoltaic (PV) energy-harvesting cells. This 2.5 mm × 2.5 mm chip is capable of harvesting [mu]W’s of power from the ambient light passing through the tissue and performing real-time sensing. This system is also MRI compatible as it includes no magnetic material and requires no RF coil or antennae. In this dissertation, the optical properties of tissue and the capabilities of the CMOS integrated PV cells are studied first. Next, the implementation of an implantable sensor using such PV devices is discussed. The sensor characterizing and the in vitro measurement results using this system, demonstrate the feasibility of monolithically integrated CMOS PV-driven implantable sensors. In addition, they offer an alternative method to create low-cost and mass-deployable energy autonomous ICs in biomedical applications and beyond. / text

This work addresses neural and analog computation on reconfigurable mixed-signal platforms. Many engineered systems could gain tremendous benefits by emulating neural systems. For example, neural systems are incredibly power efficient and fault-tolerant. They are also capable of types of computation that we cannot yet match with conventional computers. Neuromorphic engineers typically implement neural computation using analog circuits because they are low-power and naturally model some aspects of neurobiology. One problem with analog circuits is that they are typically inflexible. To address this shortcoming, our lab has developed reconfigurable analog systems known as Field Programmable Analog Arrays (FPAAs). This dissertation consists of two main parts. The first is the implementation of neural and analog circuits on FPAAs. We first implemented an adaptive winner-take-all circuit, which could model attention in neural systems. Next, we modeled the dendrite, which is the conductive tissue that relays inputs from synapses to the neuron cell body. We also implemented a subtractive music synthesizer, perhaps providing the electronic music synthesis community with a good platform for experimentation. Finally, we conducted a number of neural learning experiments on a neuromorphic platform. The second part of this dissertation includes design aspects of new FPAAs, including configurable blocks that can be used as current-mode DACs in a digitally-enhanced FPAA, the RASP 2.9v. We also consider the design of a new neuromorphic platform containing 256 neurons and over 200,000 synapses, many with learning capability. We also created an active delay line that could be used for beamforming or FIR filter applications. In summary, this work adds to the field of reconfigurable systems by both showing how to implement circuits with them and creating new systems based on lessons learned while working with previous systems.

Path planning and image processing are critical signal processing tasks for robots, autonomous vehicles, animated characters, etc. The ultimate goal of the path planning problem being addressed in this dissertation is how to use a reconfigurable Analog Very Large Scale Integration (AVLSI) circuit to plan a path for a Micro Aerial Vehicle (MAV) (or similar power constrained ground or sea robot) through an environment in an effort to conserve its limited battery resources. Path planning can be summarized with the following three tasks given that states, actions, an initial state, and a goal state are provided. The robot should: 1) Find a sequence of actions that take the robot from its Initial state to its Goal state. 2) Find actions that take the robot from any state to the Goal state, and 3) Decide the best action for the robot to take now in order to improve its odds of reaching the Goal. Image processing techniques can be used to visually track an object. Segmenting the object from the background is one subtask in this problem. Digital image processing can be very computationally expensive in terms of memory and data manipulation. Path planning and image processing computations are typically executed on digital microprocessors. This dissertation explores an evolution of analog signal processing using Field Programmable Analog Arrays (FPAAs); it describes techniques for mapping different solutions onto the hardware, and it describes the benefits and limitations. The motivation is lower power, more capable solutions that also provide better algorithm performance metrics such as time and space complexity. This may be a significant advantage for MAVs, ocean gliders or other robot applications where the power budget for on-board signal processing is limited.