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Multilayer Dielectrics and Semiconductor Channels for Thin Film Transistor ApplicationsAlshammari, Fwzah 13 November 2018 (has links)
Emerging transparent conducting and semiconducting oxide (TCO) and (TSO) materials have achieved success in display markets. Due to their excellent electrical performance, TSOs have been chosen to enhance the performance of traditional displays and to evaluate their application in future transparent and flexible displays. This dissertation is devoted to the study ZnO-based thin film transistors (TFTs) using multilayer dielectrics and channel layers. Using multilayers to engineer transistor parameters is a new approach. By changing the thickness, composition, and sequence of the layers, transistor performance can be optimized.
In one example, Al2O3/Ta2O5 bilayer gate dielectrics, grown by atomic layer deposition at low temperature were developed. The approach combined high dielectric constant of
Ta2O5 and the excellent interface quality of Al2O3/ZnO, resulting in enhanced device performance.
Using zinc oxide (ZnO)/hafnium oxide (HfO2) multilayer stack as a TFT channel with tunable layer thicknesses resulted in significant improvement in TFT stability.
Atomic layer deposited SnO2 was developed as a gate electrode to replace ITO in thin film transistors and circuits. The SnO2 films deposited at 200 °C show low electrical resistivity of ~3.1×10-3 Ohm-cm with the high transparency of ~93%. TFT fabricated with SnO2 gate show excellent transistor properties.
Using results from the above experiments, we have developed a novel process in which thin film transistors (TFTs) are fabricated using one binary oxide for all transistor layers (gate, source/drain, semiconductor channel, and dielectric). In our new process, by simply changing the flow ratio of two chemical precursors, C8H24HfN4 and (C2H5)2Zn, in an ALD system, the electronic properties of the binary oxide HZO were controlled from conducting, to semiconducting, to insulating. A complete study of HZO thin films deposited by (ALD) was performed. The use of the multi-layer (HfO2/ZnO) channel layer plays a key role in improving the bias stability of the devices. The low processing temperature of all materials at 160 °C is an advantage for the fabrication of fully transparent and flexible devices. After precise device engineering, including growth temperature, gate dielectric, electrodes (S/D&G) and semiconductor thickness, TFT with excellent device performance are obtained.
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Electrical Characterization of Emerging Devices For Low and High-Power ApplicationsSami Saleh Alghamdi (7043102) 02 August 2019 (has links)
In this thesis, an
interface passivation by a lattice matched atomic layer deposition (ALD)
epitaxial magnesium calcium oxide (MgCaO) on wide-bandgap gallium nitride (GaN)
has been applied for the first time and expensively studied via various
characterization methods (including AC conductance methods, pulsed
current-voltage, and single pulse charge pumping). Also, beta-Ga2O3 with a monoclinic crystal
structure that offers several surface oriented channels has been demonstrated
as potential beta-Ga2O3 FET. On the other hand,
low frequency noise studies in 2-D MoS2 NC-FETs was reported for the first
time. Low frequency noise of the devices is systematically studied depending on
various interfacial oxides, different thicknesses of interfacial oxide, and ferroelectric
hafnium zirconium oxide. Interestingly enough,
the low frequency noise is found to decrease with thicker ferroelectric HZO in
the subthreshold regime of the MoS2 NC-FETs, in stark contrast to the
conventional high-k transistors. Also, the
ferroelectric switching speed is found to be related with the maximum electric
field applied during the fast gate voltage sweep, suggesting the internal
ferroelectric switching speed can be even faster depending on the device’s
electrical bias conditions and promises a high speed performance in our
ferroelectric HZO
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STRUCTURAL AND MATERIAL INNOVATIONS FOR HIGH PERFORMANCE BETA-GALLIUM OXIDE NANO-MEMBRANE FETSJinhyun Noh (10225202) 12 March 2021 (has links)
<p>Beta-gallium oxide (<i>β</i>-Ga<sub>2</sub>O<sub>3</sub>) is an emerging wide bandgap semiconductor for
next generation power devices which offers the potential to replace GaN and
SiC. It has an ultra-wide bandgap (UWBG) of 4.8 eV and a corresponding <i>E</i><sub>br </sub>of 8 MV/cm. <i>β</i>-Ga<sub>2</sub>O<sub>3 </sub>also possesses a decent intrinsic electron mobility limit of 250
cm<sup>2</sup>/V<i>·</i>s, yielding high Baliga’s figure of merit of 3444. In addition,
the large bandgap of <i>β</i>-Ga<sub>2</sub>O<sub>3 </sub>gives stability in harsh
environment operation at high temperatures. </p>
<p>Although low-cost
large-size <i>β</i>-Ga<sub>2</sub>O<sub>3 </sub>native bulk substrates
can be realized by melt growth methods, the unique property that (100) surface
of <i>β</i>-Ga<sub>2</sub>O<sub>3 </sub>has a large lattice constant of 12.23 Å allows it to be cleaved easily into thin and long
nano-membranes. Therefore, <i>β</i>-Ga<sub>2</sub>O<sub>3 </sub>FETs on foreign substrates
by transferring can be fabricated and investigated before <i>β</i>-Ga<sub>2</sub>O<sub>3 </sub>epitaxy technology becomes mature and economical viable. Moreover,
integrating <i>β</i>-Ga<sub>2</sub>O<sub>3 </sub>on high thermal
conductivity materials has an advantage in terms of suppressing self-heating effects.
</p><p>In this dissertation, structural and material
innovations to overcome and improve critical challenges are summarized as
follows: 1) Top-gate nano-membrane <i>β</i>-Ga<sub>2</sub>O<sub>3 </sub>FETs on a high thermal conductivity diamond
substrate with record high maximum drain current densities are demonstrated.
The reduced self-heating effect due to high thermal conductivity of the
substrate was verified by thermoreflectance measurement. 2) Local
electro-thermal effect by electrical bias was applied to enhance the electrical
performance of devices and improvements of electrical properties were shown
after the annealing. 3) Thin thermal bridge materials such as HfO<sub>2 </sub>and ZrO<sub>2 </sub>were inserted between <i>β</i>-Ga<sub>2</sub>O<sub>3 </sub>and
a sapphire substrate to reduce self heating effects without using a diamond
substrate. The improved thermal performance of the device was analyzed by
phonon density of states plots of <i>β</i>-Ga<sub>2</sub>O<sub>3 </sub>and the thin film materials. 4) Nano-membrane
tri-gate <i>β</i>-Ga<sub>2</sub>O<sub>3 </sub>FETs on SiO<sub>2</sub>/Si substrate fabricated via exfoliation have been demonstrated for the
first time. 5) Using the robustness of <i>β</i>-Ga<sub>2</sub>O<sub>3 </sub>in harsh environments, <i>β</i>-Ga<sub>2</sub>O<sub>3 </sub>ferroelectric
FETs operating as synaptic devices up to 400 °C were demonstrated. The result
offers the potential to use the novel device for ultra-wide bandgap logic
applications, specifically neuromorphic computing exposed to harsh
environments.<br></p>
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