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The polarization reversal in ferroelectric HfO₂ is adopted to store information in three distinct device classes - ferroelectric field effect transistors (FeFET), ferroelectric capacitors (FeCAP) and ferroelectric tunnel junctions (FTJ). Common to all three concepts is the adoption of a ferroelectric layer stack that acts either as gate dielectric in the FeFET or as the capacitor dielectric and tunneling barrier in the FeCAP or FTJ, respectively. A composite structure including an inevitably or purposefully formed dielectric layer is frequently adopted. In this work we report on the co-existence of all three memory concepts within one device structure and propose a 2T1C ferroelectric memory cell that allows the operation and comparative characterization of the trinity of ferroelectric memory devices.

During the last decade ferroelectrics based on doped hafnium oxide emerged as promising candidates for realization of ultra-low-power non-volatile memories. Two spontaneous polarization states occurring in the material that can be altered by applying electrical fields rather than forcing a current through and the materials compatibility to CMOS processing are the main benefits setting the concept apart from other emerging memories. 1T1C ferroelectric random access memories (FeRAM) as well as 1T FeFET concepts are under investigation. In this article the application of hafnium based ferroelectric memories in different flavours and their ranking in the memory landscape are discussed.

The ferroelectricity in fluorite structure based hafnium oxide (HfO2) material expanded the horizon for realizing nonvolatile ferroelectric memory concepts. Due to the excellent HfO2 ferroelectric film properties, CMOS compatibility, and scalability; the material is foreseen as a replacement of the lead based ferroelectric materials with a big game changing potential for the emerging ferroelectric memories. In this thesis, the development of novel memory concepts based on the ferroelectric or antiferroelectric HfO2 material is reported. The ferroelectric field effect transistor (FeFET) memory concept offers a low power, high-speed, nonvolatile, and one cell memory solution ideal for embedded memory realization. As an emerging concept based on a novel ferroelectric material, the FeFET is challenged with key performance aspects intrinsic to the underlying physics of the device. A central part of this thesis is the development of FeFET through material and gate stack engineering, in turn leading to innovative novel device concepts. The conceptual innovation, process development, and electrical assessment are explored for an ferroelectric or antiferroelectric HfO2 based nonvolatile memories with focus on the underlying device physics. The impact of the ferroelectric material on the FeFET physics is explored via the screening of different HfO2 based ferroelectric materials, thicknesses, and the film doping concentration. The impact of material interfaces and substrate doping conditions are explored on the stack engineering level to achieve a low power and reliable FeFET. The material optimization leads to the concept of ferroelectric lamination, i.e. a dielectric interlayer between multi ferroelectric ones, to achieve a novel multilevel data storage in FeFET at reduced device variability. Toward a low power FeFET, the stack structure tuning and dual ferroelectric layer integration are explored through an MFM and MFIS integration in a single novel FeFET stack. The charge trapping effect during the FeFET switching captures the dynamics of the hysteresis polarization switching inside the stack with direct impact on the interfacial layer field. Even though manifesting as a clear drawback in FeFET operation, it can be utilized in Flash, leading to a novel hybrid low power and high-speed antiferroelectric based charge trap concept. Furthermore, the FeFET reliability is studied covering the role of operating temperature and the ferroelectric wakeup phenomenon observed in the FeFET. The temperature modulated operation, role of the high-temperature pyroelectric effect, and the temperature induced endurance and retention reliability are studied.:Table of Contents Abstract Table of Contents 1. Introduction 2. Fundamentals 2.1. Basics of Ferroelectricity 2.2. The FeFET Operation Principle and Gate Stack Theory 2.3. Structure and Outline of the PhD Thesis 3. The Emerging Memory Optimization Cycle: From Conceptual Design to Fabrication 3.1. The FeFET Conceptual Design and Layout Implementation 3.2. Gate First FeFET Fabrication: Material and Gate Stack Optimization 3.3. Novel Gate First based Memory Concepts: Device Integration and Stack Optimization 3.4. Device Characterization: Electrical Testing Schemes 4. The Emerging FeFET Memory: Material and Gate Stack Optimization 4.1. Material Aspect of FeFET Optimization: Role of the FE Material Properties 4.2. The Stack Aspect of FeFET Optimization: Role of the Interface Layer Properties 4.3. The Stack Aspect of FeFET Optimization: Role of the Substrate Implant Doping 4.4. Summary 5. A Novel Multilevel Cell FeFET Memory: Laminated HSO and HZO Ferroelectrics 5.1. The Laminate MFM and Stack Characteristics 5.2. The Laminate based FeFET Memory Switching 5.3. The Laminate FeFET Multilevel Coding Operation (1 bit, 2 bit, 3 bit/cell) 5.4. The Maximum Laminate FeFET MW Dependence on FE Stack Thickness 5.5. The Role of Wakeup and Charge Trapping 5.6. The Laminate MLC FeFET Area Dependence 5.7. The Laminate MLC Retention and Endurance 5.8. Impact of Pass Voltage Disturb on Laminate based NAND Array Operation 5.9. The Laminate FeFET based Synaptic Device 5.10. Summary 6. A Novel Ferroelectric MFMFIS FeFET: Toward Low Power and High-Speed NVM 6.1. The MFMFIS FeFET P-E and FET Characteristics 6.2. The MFMFIS based Memory Characteristics 6.3. The Impact of MFMFIS Stack Structure Tuning 6.4. The Maximum MFMFIS FeFET Memory Window 6.5. The Role of Device Scalability and Variability 6.6. The MFMFIS Area Tuning for Low Power Operation 6.7. The MFMFIS based FeFET Reliability 6.8. The Synaptic MFMFIS based FeFET 6.9. Summary 7. A Novel Hybrid Low Power and High-Speed Antiferroelectric Boosted Charge Trap Memory 7.1. The Hybrid Charge Trap Memory Switching Characteristics 7.2. The Role of Polarization Switching on Optimal Write Conditions 7.3. The Impact of FE/AFE Properties on the Charge Trap Maximum Memory Window 7.4. The Hybrid AFE Charge Trap Multi-level Coding and Array Operation 7.5. The Global Variability and Area Dependence of the Charge Trap Memory Window 7.6. The AFE Charge Trap Reliability 7.7. The Hybrid AFE Charge Trap based Synapse 7.8. Summary 8. The Emerging FeFET Reliability: Role of Operating Temperature and Wakeup Effect 8.1. The FeFET Temperature Reliability: A Temperature Modulated Operation 8.2. The FeFET Temperature Reliability: Role of the Pyroelectric Effect 8.3. The FeFET Temperature Reliability: Endurance and Retention 8.4. The Impact of Ferroelectric Wakeup on the FeFET Memory Reliability 8.5. Summary 9. Closure: What this Thesis has Solved? 9.1. How material selection/development influence the FeFET? 9.2. Why the FeFET Still Operates at High Write Conditions? 9.3. Why the FeFET Endurance is still a Challenge? 9.4. Can the FeFET become Multi-bit Storage Memory? 9.5. How the Scalability Determine FeFET Chances? 10. Summary 11. Bibliography List of symbols and abbreviations List of Publications Acknowledgment Erklärung

With the discovery of the ferroelectric (FE) properties within HfO₂, the scaling gap between state-of-the-art technology nodes and non-volatile memories based on FE materials can be bridged. In addition to non-volatility, new memory concepts should guarantee sufficient endurance and operation stability. However, in contrast to optimized perovskite based FEs, binary oxide based FE memories still show changes in the memory window (MW) followed by either hard breakdown or closure of the MW. Recently, we have shown that anti-FE (AFE) materials exhibit very stable and significantly higher endurance with respect to the FE counterparts. Inspired by the robustness and remarkable cycling performance of the AFE materials, we analyze the remaining reliability aspects of these devices. By characterizing the pure film properties of capacitor stacks and switching performance when integrated into devices, we compare and investigate temperature stability, imprint, retention, and variability of both FE and AFE memories. We investigate if the lower energetic barrier to be overcome together with partial switching and lower switching induced stress are responsible for the higher endurance of the AFE with respect to the FE based memories. By utilizing charge trapping and charge pumping tests together with leakage current spectroscopy in combination with comprehensive modeling we check that assumption. Moreover, we identify the interfacial buffer layer as the weakest link of these devices.

This letter investigates the impact of self-heating on the post-cycling functionality of a scaled hafnium oxide-based ferroelectric field-effect transistor (FeFET). The full recovery of FeFET switching properties and data retention after the cycling endurance failure is reported. This is achieved by damage annealing through localized heating, which is intentionally induced by a large current flow through the drain (source)-body p-n junctions. The results highlight that the local thermal treatments could be exploited to extend the cycling endurance of FeFETs.

Ferroelectric materials have been extensively studied theoretically and experimentally for many decades. Their ferroelectric, piezoelectric, pyroelectric, dielectric and electro-optical properties offer great promise in various applications such as non-volatile random access memory devices, non linear optics, motion and thermal sensors, and tunable microwave devices. Advanced applications for high dielectric constant insulators and nonvolatile memories in semiconductor industry have led to a meteoric rise of interest in the ferroelectrics recently. As most studied and technically important ferroelectric materials, lead zirconate titanate (PZT) and barium strontium titanate (BST) are widely investigated to understand their properties for potential device applications. Using radio frequency magnetron sputtering, single crystalline PZT and BST thin films have been achieved on SrTiO3 substrates, and been characterized for their structural and electrical properties. Eyeing their different potential applications, ferroelectric, pyroelectric and dielectric properties of PZT and BST thin films were studied. In addition, the introduction of bridge layers (nucleation or buffer layers) grown by molecular beam epitaxy (MBE) has been employed to facilitate the heterostructure growth of PZT thin films on GaN and BST thin films on sapphire substrates. Highly (111)-oriented perovskite PZT thin films were achieved on silicon-doped GaN (0001)/c-sapphire with a PbTiO3/PbO oxide bridge layer. And (001)-oriented BST thin films were grown on a-plane sapphire with an MgO/ZnO bridge layer. This dissertation also discusses the realization of PZT ferroelectric field effect transistors (FeFET). Two different 1T FeFET structures were successfully fabricated and their electrical properties were examined. Ferroelectric behavior was observed in the plot of source-drain current versus gate voltage where it exhibited a large counterclockwise hysteresis with 50% current modulation.

L’intégration monolithique d’oxydes ferroélectriques sur substrats semi-conducteurs pourrait permettre l'ajout de nouvelles fonctionnalités sur puces de la nanoélectronique. L'utilisation d'un ferroélectrique est en particulier intéressante pour la réalisation de dispositifs à basse consommation d'énergie. Toutefois, leur intégration se heurte à un certain nombre de verrous scientifiques et technologiques tels que le contrôle de l'interface oxyde/semi-conducteur, l’instabilité de la polarisation ferroélectrique en couches minces ou encore la compatibilité de l'intégration avec les procédés industriels actuels. Les principaux objectifs de ma thèse ont été : l'optimisation de la croissance MBE de BaTiO3 épitaxié sur Si et Si1-xGex en termes de structure cristalline et de propriétés ferroélectriques, l’étude des effets de taille sur la ferroélectricité et le démarrage de l’intégration de BaTiO3 dans des dispositifs à effet de champ. Différentes conditions de croissance sur substrats de silicium, en particulier la température et la pression d'oxygène P(O2), ont été étudiées. Les analyses de diffraction des rayons X (XRD) combinées à des techniques avancées de microscopie électronique en transmission (STEM-HAADF, GPA, EELS) ont permis d'établir une corrélation, à l'échelle locale, entre l'orientation de la maille tétragonale et la composition cationique des films. La ferroélectricité de films orientés axe c, d'épaisseur 16-20 nm, préparés sous des pressions partielles P(O2) de 1-5 x 10-7 Torr, à 450-525°C, et avec un recuit post-dépôt sous oxygène, a été mise en évidence par microscopie à force atomique en mode piézoélectrique (PFM). Nous avons également démontré la ferroélectricité de couches ultra-minces (1.6, 2.0, 2.8, 3.2 et 4.0 nm) par PFM et par des mesures complémentaires de microscopie à force atomique en mode Kelvin (permettant d'exclure un mécanisme d'origine purement électrochimique). Pour 4, 5, 7 et 8 monocouches, l'amplitude de la polarisation pointant vers l'interface supérieure (Pup) est supérieure à celle de la polarisation Pdown. Ceci est attribué à des régions non ferroélectriques ou à des régions polaires dont la polarisation est ancrée aux interfaces. Nous avons ensuite étudié la croissance de BaTiO3 épitaxié sur substrats Si1-xGex, ce qui constitue une approche inédite, particulièrement intéressante pour moduler les contraintes, notamment en vue des futurs transistors. Afin de comprendre l'effet de la présence de Ge, la croissance de BaTiO3 sur Si0.8Ge0.2 contraint sur Si(001) a été étudiée. Le suivi de la croissance in-situ par spectroscopie de photoélectrons X et l’analyse de la structure cristalline et de l’interface par XRD et STEM-HAADF ont révélé l'importance de la préparation du substrat. La passivation de Si0.8Ge0.2 avec des atomes de Ba permet l’épitaxie directe d’un film de BaTiO3 orienté (112), ceci par l'intermédiaire d'une couche d'interface épitaxiée, identifiée comme étant le silicate de structure orthorhombique Ba2SiO4. Ce silicate est épitaxié selon deux orientations dans le plan de Si0.8Ge0.2, ce qui conduit aux deux orientations <110> et <111> observées pour BaTiO3 dans le plan du substrat. Enfin, en collaboration avec IBM Research, une voie d’intégration basse température « gate-last » a été développée pour intégrer les couches minces de BaTiO3 dans des dispositifs à effets de champ sur Si (condensateurs et transistors). Les films de BaTiO3 ont été déposés par MBE sur des substrats pré-structurés. Un procédé approprié a été choisi pour le dépôt de l'électrode TiN et pour la lithographie/gravure. Certains empilements, composés d'une matrice amorphe et de nano-grains dans les structures capacitives, présentent un comportement ferroélectrique (Tc~105°C). Cette première démonstration d’une capacité ferroélectrique de BaTiO3 "quasi-amorphe" sur Si à permittivité relative modérée (~25) et à faible courant de fuite est particulièrement intéressante. [...] / No abstract

Inspired by neurobiological systems, Spiking Neural Networks (SNNs) are gaining an increasing interest in the field of bio-inspired machine learning. Neurons, as central processing and short-term memory units of biological neural systems, are thus at the forefront of cutting-edge research approaches. The realization of CMOS circuits replicating neuronal features, namely the integration of action potentials and firing according to the all-or-nothing law, imposes various challenges like large area and power consumption. The non-volatile storage of polarization states and accumulative switching behavior of nanoscale HfO₂ - based Ferroelectric Field-Effect Transistors (FeFETs), promise to circumvent these issues. In this paper, we propose two FeFET-based neuronal circuits emulating the Integrate-and-Fire (I&F) behavior of biological neurons on the basis of SPICE simulations. Additionally, modulating the depolarization of the FeFETs enables the replication of a biology-based concept known as membrane leakage. The presented capacitor-free implementation is crucial for the development of neuromorphic systems that allow more complex features at a given area and power constraint.

The electric-field-driven and reversible polarization switching in ferroelectric materials provides a promising approach for nonvolatile information storage. With the advent of ferroelectricity in hafnium oxide, it has become possible to fabricate ultrathin ferroelectric films suitable for nanoscale electronic devices. Among them, ferroelectric field-effect transistors (FeFETs) emerge as attractive memory elements. While the binary switching between the two logic states, accomplished through a single voltage pulse, is mainly being investigated in FeFETs, additional and unusual switching mechanisms remain largely unexplored. In this work, we report the natural property of ferroelectric hafnium oxide, embedded within a nanoscale FeFET, to accumulate electrical excitation, followed by a sudden and complete switching. The accumulation is attributed to the progressive polarization reversal through localized ferroelectric nucleation. The electrical experiments reveal a strong field and time dependence of the phenomenon. These results not only offer novel insights that could prove critical for memory applications but also might inspire to exploit FeFETs for unconventional computing.