Philosophiae Doctor - PhD / Nanocrystalline silicon (nc-Si:H) is an interesting type of silicon with superior electrical properties that are more stable compared to amorphous silicon (a-Si:H). Silicon nitride (SiNₓ) thin films are currently the dielectric widely applied in the microelectronics industry and are also effective antireflective and passivating layers for multicrystalline silicon solar cells. Research into the synthesis and characterization of nc-Si:H and SiNₓ thin films is vital from a renewable energy aspect. In this thesis we investigated the film growth mechanisms and the filament stability during the hot-wire chemical vapour deposition (HWCVD) of nc-Si:H and SiNₓ thin films. During the HWCVD of nc-Si:H, electron backscatter diffraction (EBSD) revealed that the tantalum (Ta) filament aged to consists of a recrystallized Ta-core with Ta-rich silicides at the hotter centre regions and Si-rich Ta-silicides at the cooler ends nearer to the electrical contacts. The growth of nc-Si:H by HWCVD is controlled by surface reactions before and beyond the transition from a-Si:H to nc-Si:H. During the transition, the diffusion of hydrogen (H) within the film is proposed to be the reaction controlling step. The deposition pressure influenced the structural, mechanical and optical properties of nc-Si:H films mostly when the film thickness is below 250 nm. The film stress, optical band gap, refractive index and crystalline volume fraction approached similar values at longer deposition times irrespective of the deposition pressure. Filament degradation occurred during the HWCVD of SiNₓ thin films from low total flow rate SiH₄ / ammonia (NH₃) / H₂ gas mixture. Similar to the HWCVD of nc-Si:H, the Ta-core recrystallized and silicides formed around the perimeter. However, Tanitrides formed within the filament bulk. The extent of nitride and silicide formation, porosity and cracks were all enhanced at the hotter centre regions, where filament failure eventually occurred. We also applied HWCVD to deposit transparent, low reflective and hydrogen containing SiNₓ thin films at total gas flow rates less than 31 sccm with NH₃ flow rates as low as 3 sccm. Fluctuations within the SiNₓ thin film growth rates were attributed to the depletion of growth species (Si, N, and H) from the ambient and their incorporation within the filament during its degradation.

Hydrogenated amorphous silicon (a-Si:H) thin film transistor (TFT) has been used in active matrix liquid crystal displays (LCDs) and medical x-ray imagers, in which the TFT acts as pixel switches. However, instability of a-Si:H TFT is a major issue in applications where TFTs are also required to function as analogue circuit elements, such as in emerging organic light emitting diode (OLED) displays. It is known that a-Si:H TFT shows drain current degradation under electrical operation, due to two instability mechanisms: (i) defect creation in the a-Si:H active layer, and (ii) charge trapping in the gate dielectric. Nanocrystalline silicon (nc-Si) TFT has been proposed as a high performance alternative. Therefore, this thesis focuses on the design of nc-Si TFT and its outstanding issues, in the industry standard bottom-gate structure. The key for obtaining a stable TFT lies in developing a highly crystalline nc-Si active layer, without the so-called amorphous incubation layer. Therefore, processing of nc-Si by plasma enhanced chemical vapor deposition (PECVD) is studied and PECVD parameters are optimized. It is shown that very thin (15 nm) layers with crystallinity of around 60% can be obtained. Moreover, it is possible to eliminate the amorphous incubation layer, as transmission electron microscope (TEM) images showed that crystalline grains start growing immediately upon deposition at the gate dielectric interface. The nc-Si TFT reported in this work advances the state-of-the-art, by demonstrating that defect state creation is absent in the nc-Si active layer, which is deduced by performing several characterization techniques. In addition, with the proper design of the nitride gate dielectric, i.e. by using a nitrogen-rich nitride, the charge trapping instability can be minimized. Thus, it is shown that the nc-Si TFT is much more stable than the a-Si:H counterpart. Another issue with nc-Si TFT is its high drain leakage current, i.e. off-current. It is shown that off-current is determined by the conductivity of nc-Si active layer, and also affected by the quality of the silicon/passivation nitride interface. The off-current can be minimized by using a bi-layer structure so that a thin (15 nm) nc-Si is capped with a thin (35nm) a-Si:H, and values as low as 0.1 pA can be obtained. The low off-current along with superior stability of nc-Si TFT, coupled with its fabrication in the industry standard 13.56 MHz PECVD system, make it very attractive for large area applications such as pixel drivers in active matrix OLED displays and x-ray imagers.

Thin film transistors (TFTs), the heart of highly functional and ultra-compact active-matrix (AM) backplanes, have driven explosive growth in both the variety and utility of large-area electronics over the past few decades. Nanocrystalline silicon (nc-Si:H) TFTs have recently attracted attention as a high-performance and low-cost alternative to existing amorphous silicon (a-Si:H) and polycrystalline silicon (poly-Si) TFTs, in that they have the strong potentials which a-Si:H (low carrier mobility and poor device stability) and poly-Si (poor device uniformity and high manufacturing cost) counterparts do not have. However, the current nc-Si:H TFTs expose several challenging material and devices issues, on which the dissertation focuses. In our material study, the growth of gate-quality SiO2 films and highly conductive nc-Si:H contacts based on conventional plasma-enhanced chemical vapor deposition (PECVD) is systematically investigated, which can lead to high performance, reproducibility, predictability, and stability in the nc-Si:H TFTs. Particularly to overcome a low field effect mobility in the p-channel transistors, the possibility of B(CH3)3 as an alternative dopant source to current B2H6 is examined. The resultant p-doped nc-Si:H contacts demonstrate comparable performance to the state of the art with the maximum dark conductivity of 1.11 S/cm over 70% film crystallinity. Based on the highest-quality SiO2 and nc-Si:H contacts developed, complementary (n- and p-channel) top-gate nc-Si:H TFTs with a staggered source/drain geometry are designed, fabricated, and characterized. The n-channel TFTs demonstrate a threshold voltage VTn of 6.4 V, a field effect mobility of electrons μn of 15.54 cm2/Vs, a subthreshold slope S of 0.67 V/decade, and an on/off current ratio Ion/Ioff of 10^5, while the corresponding p-channel TFTs exhibit VTp of -26.2 V, μp of 0.24 cm2/Vs, S of 4.72 V/ decade, and Ion/Ioff of 10^4. However, the TFTs show significant non-ideal behaviors that considerably limit device performance: high leakage current in the off-state, transconductance degradation under high gate bias, and threshold voltage instability in time. Quantitative insight into each non-ideality is provided in this research. Our study on the off-state conduction in the nc-Si:H TFTs reveals that the responsible mechanism for high leakage current, particularly at a high bias regime, is largely due to Poole-Frenkel emission of trapped carriers in the reverse-biased drain depletion region. This could be effectively suppressed by proposed offset-gated structure without compromising the on-state performance. A numerical analysis of the transconductance degradation shows that the parasitic resistance components that are present in the nc-Si:H TFTs strongly degrade transconductance and thus a field effect mobility. Correspondingly, strategies for reduction in parasitic resistance of the TFT are presented. Lastly, the threshold voltage shift in the nc-Si:H TFT is attributed to the flatband voltage shift, which is mainly due to charge trapping in the PECVD SiO2 gate dielectric. Material and device study, and physical insight into non-ideal behaviors in the top-gate nc-Si:H TFTs reported in the dissertation constitute an arguably important step towards monolithic integration of pixels and peripheral driving circuits on a versatile active-matrix TFT backplane for high-performance and low-cost large-area electronics. However, the gate dielectric and the highly doped nc-Si:H contacts, still imposing considerable challenges, may require entirely new approaches.

Hydrogenated amorphous silicon (a-Si:H) thin film transistor (TFT) has been used in active matrix liquid crystal displays (LCDs) and medical x-ray imagers, in which the TFT acts as pixel switches. However, instability of a-Si:H TFT is a major issue in applications where TFTs are also required to function as analogue circuit elements, such as in emerging organic light emitting diode (OLED) displays. It is known that a-Si:H TFT shows drain current degradation under electrical operation, due to two instability mechanisms: (i) defect creation in the a-Si:H active layer, and (ii) charge trapping in the gate dielectric. Nanocrystalline silicon (nc-Si) TFT has been proposed as a high performance alternative. Therefore, this thesis focuses on the design of nc-Si TFT and its outstanding issues, in the industry standard bottom-gate structure. The key for obtaining a stable TFT lies in developing a highly crystalline nc-Si active layer, without the so-called amorphous incubation layer. Therefore, processing of nc-Si by plasma enhanced chemical vapor deposition (PECVD) is studied and PECVD parameters are optimized. It is shown that very thin (15 nm) layers with crystallinity of around 60% can be obtained. Moreover, it is possible to eliminate the amorphous incubation layer, as transmission electron microscope (TEM) images showed that crystalline grains start growing immediately upon deposition at the gate dielectric interface. The nc-Si TFT reported in this work advances the state-of-the-art, by demonstrating that defect state creation is absent in the nc-Si active layer, which is deduced by performing several characterization techniques. In addition, with the proper design of the nitride gate dielectric, i.e. by using a nitrogen-rich nitride, the charge trapping instability can be minimized. Thus, it is shown that the nc-Si TFT is much more stable than the a-Si:H counterpart. Another issue with nc-Si TFT is its high drain leakage current, i.e. off-current. It is shown that off-current is determined by the conductivity of nc-Si active layer, and also affected by the quality of the silicon/passivation nitride interface. The off-current can be minimized by using a bi-layer structure so that a thin (15 nm) nc-Si is capped with a thin (35nm) a-Si:H, and values as low as 0.1 pA can be obtained. The low off-current along with superior stability of nc-Si TFT, coupled with its fabrication in the industry standard 13.56 MHz PECVD system, make it very attractive for large area applications such as pixel drivers in active matrix OLED displays and x-ray imagers.

Thin film transistors (TFTs), the heart of highly functional and ultra-compact active-matrix (AM) backplanes, have driven explosive growth in both the variety and utility of large-area electronics over the past few decades. Nanocrystalline silicon (nc-Si:H) TFTs have recently attracted attention as a high-performance and low-cost alternative to existing amorphous silicon (a-Si:H) and polycrystalline silicon (poly-Si) TFTs, in that they have the strong potentials which a-Si:H (low carrier mobility and poor device stability) and poly-Si (poor device uniformity and high manufacturing cost) counterparts do not have. However, the current nc-Si:H TFTs expose several challenging material and devices issues, on which the dissertation focuses. In our material study, the growth of gate-quality SiO2 films and highly conductive nc-Si:H contacts based on conventional plasma-enhanced chemical vapor deposition (PECVD) is systematically investigated, which can lead to high performance, reproducibility, predictability, and stability in the nc-Si:H TFTs. Particularly to overcome a low field effect mobility in the p-channel transistors, the possibility of B(CH3)3 as an alternative dopant source to current B2H6 is examined. The resultant p-doped nc-Si:H contacts demonstrate comparable performance to the state of the art with the maximum dark conductivity of 1.11 S/cm over 70% film crystallinity. Based on the highest-quality SiO2 and nc-Si:H contacts developed, complementary (n- and p-channel) top-gate nc-Si:H TFTs with a staggered source/drain geometry are designed, fabricated, and characterized. The n-channel TFTs demonstrate a threshold voltage VTn of 6.4 V, a field effect mobility of electrons μn of 15.54 cm2/Vs, a subthreshold slope S of 0.67 V/decade, and an on/off current ratio Ion/Ioff of 10^5, while the corresponding p-channel TFTs exhibit VTp of -26.2 V, μp of 0.24 cm2/Vs, S of 4.72 V/ decade, and Ion/Ioff of 10^4. However, the TFTs show significant non-ideal behaviors that considerably limit device performance: high leakage current in the off-state, transconductance degradation under high gate bias, and threshold voltage instability in time. Quantitative insight into each non-ideality is provided in this research. Our study on the off-state conduction in the nc-Si:H TFTs reveals that the responsible mechanism for high leakage current, particularly at a high bias regime, is largely due to Poole-Frenkel emission of trapped carriers in the reverse-biased drain depletion region. This could be effectively suppressed by proposed offset-gated structure without compromising the on-state performance. A numerical analysis of the transconductance degradation shows that the parasitic resistance components that are present in the nc-Si:H TFTs strongly degrade transconductance and thus a field effect mobility. Correspondingly, strategies for reduction in parasitic resistance of the TFT are presented. Lastly, the threshold voltage shift in the nc-Si:H TFT is attributed to the flatband voltage shift, which is mainly due to charge trapping in the PECVD SiO2 gate dielectric. Material and device study, and physical insight into non-ideal behaviors in the top-gate nc-Si:H TFTs reported in the dissertation constitute an arguably important step towards monolithic integration of pixels and peripheral driving circuits on a versatile active-matrix TFT backplane for high-performance and low-cost large-area electronics. However, the gate dielectric and the highly doped nc-Si:H contacts, still imposing considerable challenges, may require entirely new approaches.

Cette thèse est consacrée au silicium polymorphe hydrogéné (pm-Si:H). Elle porte tout d'abord sur une étude du pm-Si :H puis sur une étude des cellules photovoltaïques fabriquées à partir de ce matériau. Le pm-Si:H est formé de couches minces nanostructurées et peut être déposé par PECVD conventionnelle. Les effets des différents paramètres de dépôt (mélanges gazeux, pression, puissance RF, température du substrat) sur les propriétés du matériau ont été étudiés pour optimiser sa qualité. La caractérisation des couches a été un enjeu primordial. Pour cela, nous avons choisi de combiner une palette très large de méthodes de caractérisation (ellipsomètrie spectroscopique, exodiffusion d'hydrogène, SIMS, FTIR, AFM, etc...). A cause de la contribution des nanoparticules de silicium dans le plasma, la nature du dépôt du pm-Si:H montre la différence contrairement au a-Si:H pour lequel le dépôt se fait par le biais de radicaux ionisés. L'étude des conditions du procédé nous a conduit à fabriquer des cellules solaires d'un rendement initial de 9.22 % avec un facteur de forme élevé (74.1), mais aussi de démontrer des effets de vieillissement inhabituels, tels que i) une dégradation initiale rapide, ii) une dégradation irréversible, et iii) de grands changements structuraux macroscopiques. Nous avons découvert que le principal problème se situe entre le substrat et la couche mince de silicium. L'hydrogène moléculaire diffuse et s'accumule à l'interface entre le substrat et la couche mince, ce qui introduit un délaminage local qui a pour conséquence une dégradation initiale rapide des performances des cellules. Nous avons trouvé que sous éclairement une structure PIN facilite l'accumulation d'hydrogène et le délaminage à l'interface entre le substrat et la couche dopée p. Cependant, l'utilisation d'une structure NIP empêche l'accumulation d'hydrogène et le délaminage. Cela nous a permis de fabriquer des cellules solaires pm-Si:H de structure NIP d'un rendement stable de 8.43 %, mais aussi de démontrer une degradation minimale (10 %) après un vieillissement de 500 heures.

Nanocrystalline silicon (nc-Si:H) is an attractive material for fabrication of low temperature, large area electronic devices due to superior properties versus the traditional amorphous silicon (a-Si:H) and polycrystalline silicon (polySi). Nanocrystalline silicon possess higher carrier mobility and better stability than a-Si:H and better device uniformity and lower fabrication cost than polySi. This thesis looks at the application of nc-Si:H material in fabricating two different diodes used for rectification and light generation. Optimization of n-type nc-Si:H deposited via plasma enhanced vapor chemical deposition (PECVD) was achieved through adjusting the concentration ratio of phosphine (PH3) dopant source gas versus silane (SiH4). Optimizing for dark conductivity, n+ nc-Si:H material with dark conductivity of 25.3 S/cm was deposited using a [PH3]/[SiH4] ratio of 2%. Using the optimized n+ nc-Si:H film, a p-n junction diode utilizing an undoped and an n+ nc-Si:H layers was fabricated designed for rectification use. The diode achieved a current density of 1 A/cm2, an ON/OFF current ratio of 106 and a non-ideality factor of 1.9. When the 200*200µm2 nc-Si:H diodes were employed in a full-wave bridge rectifier, a 2.6 V direct current voltage could be generated from an input sine wave signal with amplitude 2 VRMS and frequency of 13.56 MHz, thus demonstrating the feasibility of using nc-Si:H to fabricate diodes for using on radio frequency identification (RFID) tags. Nanocrystalline silicon was also applied in fabrication of a light emitting diode (LED), by utilizing the nanocrystals embedded inside nc-Si:H, inside which recombination of carriers could result in radiative recombination. By limiting the deposition time of the nc-Si:H, 10 – 20 nm thick films of nc-Si:H were used to fabrication a p-i-n structure LED with average crystallite size between 7.5 nm to 13.7 nm corresponding to an theoretical emission wavelengths in the near infrared region of 875 nm to 963 nm. Unfortunately, light emission from the nc-Si:H LED were not detected using two different methods. Undetectable emission could have been due to a combination of low recombination efficiency due to carriers recombining in defects in the a-Si:H matrix and majority of current travelling completely through the nc-Si:H films without recombining. A study of the thin intrinsic nc-Si:H films used in the LED was carried out. The thin films were found to be highly defected, with large variation in current-voltage relationship measured and hysteresis observed in the IV characteristic. Annealing the nc-Si:H films were found to cause a drop in conductivity explained through hydrogen effusion from the nc-Si:H film during annealing. Passivation of defects was achieved through the use of hydrogen plasma which resulted in a lowering of activation energy measured in the film. Oxygen plasma was also trialed for passivating the nc-Si:H film but the effect was only a temporary increase in current conduction attributed to oxygen ions chemisorbing temporarily at the film surface.

Nanocrystalline silicon (nc-Si:H) is an attractive material for fabrication of low temperature, large area electronic devices due to superior properties versus the traditional amorphous silicon (a-Si:H) and polycrystalline silicon (polySi). Nanocrystalline silicon possess higher carrier mobility and better stability than a-Si:H and better device uniformity and lower fabrication cost than polySi. This thesis looks at the application of nc-Si:H material in fabricating two different diodes used for rectification and light generation. Optimization of n-type nc-Si:H deposited via plasma enhanced vapor chemical deposition (PECVD) was achieved through adjusting the concentration ratio of phosphine (PH3) dopant source gas versus silane (SiH4). Optimizing for dark conductivity, n+ nc-Si:H material with dark conductivity of 25.3 S/cm was deposited using a [PH3]/[SiH4] ratio of 2%. Using the optimized n+ nc-Si:H film, a p-n junction diode utilizing an undoped and an n+ nc-Si:H layers was fabricated designed for rectification use. The diode achieved a current density of 1 A/cm2, an ON/OFF current ratio of 106 and a non-ideality factor of 1.9. When the 200*200µm2 nc-Si:H diodes were employed in a full-wave bridge rectifier, a 2.6 V direct current voltage could be generated from an input sine wave signal with amplitude 2 VRMS and frequency of 13.56 MHz, thus demonstrating the feasibility of using nc-Si:H to fabricate diodes for using on radio frequency identification (RFID) tags. Nanocrystalline silicon was also applied in fabrication of a light emitting diode (LED), by utilizing the nanocrystals embedded inside nc-Si:H, inside which recombination of carriers could result in radiative recombination. By limiting the deposition time of the nc-Si:H, 10 – 20 nm thick films of nc-Si:H were used to fabrication a p-i-n structure LED with average crystallite size between 7.5 nm to 13.7 nm corresponding to an theoretical emission wavelengths in the near infrared region of 875 nm to 963 nm. Unfortunately, light emission from the nc-Si:H LED were not detected using two different methods. Undetectable emission could have been due to a combination of low recombination efficiency due to carriers recombining in defects in the a-Si:H matrix and majority of current travelling completely through the nc-Si:H films without recombining. A study of the thin intrinsic nc-Si:H films used in the LED was carried out. The thin films were found to be highly defected, with large variation in current-voltage relationship measured and hysteresis observed in the IV characteristic. Annealing the nc-Si:H films were found to cause a drop in conductivity explained through hydrogen effusion from the nc-Si:H film during annealing. Passivation of defects was achieved through the use of hydrogen plasma which resulted in a lowering of activation energy measured in the film. Oxygen plasma was also trialed for passivating the nc-Si:H film but the effect was only a temporary increase in current conduction attributed to oxygen ions chemisorbing temporarily at the film surface.

A series of experiments was carried out to compare the structural and electronic properties of intrinsic nanocrystalline silicon (nc-Si:H) thin films deposited via continuous wave (cw) and pulsed (p)-PECVD at 150°C substrate temperature. Working at this temperature allows for the easy transfer of film recipes from glass to plastic substrates in the future. During the p-PECVD process the pulsing frequency was varied from 0.2 to 50 kHz at 50% duty cycle. Approximately 15% drop in the deposition rate was observed for the samples fabricated in p-PECVD compared to cw-PECVD. The optimum crystallinity and photo (σph) and dark conductivity (σD) were observed at 5 kHz pulsing frequency, with ~10% rise in crystallinity and about twofold rise in the σph and σD compared to cw-PECVD. However, for both the cw and p-PECVD nc-Si:H films, the observed σph and σD were one to two orders and three orders of magnitude higher respectively than those reported in literature. The average activation energy (EA) of 0.16 ∓ 0.01 eV for nc-Si:H films deposited using p-PECVD confirmed the presence of impurities, which led to the observation of the unusually high conductivity values. It was considered that the films were contaminated by the impurity atoms after they were exposed to air. Following the thin film characterization procedure, the optimized nc-Si:H film recipes, from cw and p-PECVD, were used to fabricate the absorber layer of thin film solar cells. The cells were then characterized for J-V and External Quantum Efficiency (EQE) parameters. The cell active layer fabricated from p-PECVD demonstrated higher power conversion efficiency (η) and a maximum EQE of 1.7 ∓ 0.06 % and 54.3% respectively, compared to 1.00 ∓ 0.04 % and 48.6% respectively for cw-PECVD. However, the observed η and EQE of both the cells were lower than a reported nc-Si:H cell fabricated via p-PECVD with similar absorber layer thickness. This was due to the poor Short-circuit Current Density (Jsc), Open-circuit Voltage (Voc), and Fill Factor (FF) of the cw and p-PECVD cells respectively, compared to the reported cell. The low Jsc resulted from the poor photocarrier collection at longer and shorter wavelengths and high series resistance (Rseries). On the other hand, the low Voc stemmed from the low shunt resistance (Rsh). It was inferred that the decrease in the Rsh occurred due to the inadequate electrical isolation of the individual cells and the contact between the n – layer and the front TCO contact at the edge of the p-i-n deposition area. Additionally, the net effect of the high Rseries and the low Rsh led to a decrease in the FF of the cells.

Im quaternären System Erdalkalimetall-Silicium-Chlor-Wasserstoff bildet sich bei der Umsetzung des Metalls mit einer SiCl4-H2-Atmosphäre eine quaternäre Phase. Diese metastabile Phase zerfällt beim Abkühlen in das Metallchlorid und Silicium in nanokristalliner Form. Die vorliegende Arbeit hat sich mit der tiefergehenden Charakterisierung der quaternären Phase beschäftigt. Dazu wurden die Eigenschaften des quaternären Systems aus den Eigenschaften der sechs binären und vier ternären Systemen abgeleitet. Die Oberfläche wurde erstmals mit Photoelektronenspektroskopie charakterisiert. Zusätzlich gelang erstmalig die Verfolgung der Bildungsreaktion durch Messung des Spannungsabfalls über das Reaktionssystem. Erste Ansätze zur Aufklärung des Bildungsmechanismus ausgehend von den Ergebnissen der Charakterisierung wurden zusätzlich aufgezeigt.