A series of experiments was carried out to compare the structural and electronic properties of intrinsic nanocrystalline silicon (nc-Si:H) thin films deposited via continuous wave (cw) and pulsed (p)-PECVD at 150°C substrate temperature. Working at this temperature allows for the easy transfer of film recipes from glass to plastic substrates in the future. During the p-PECVD process the pulsing frequency was varied from 0.2 to 50 kHz at 50% duty cycle. Approximately 15% drop in the deposition rate was observed for the samples fabricated in p-PECVD compared to cw-PECVD. The optimum crystallinity and photo (σph) and dark conductivity (σD) were observed at 5 kHz pulsing frequency, with ~10% rise in crystallinity and about twofold rise in the σph and σD compared to cw-PECVD. However, for both the cw and p-PECVD nc-Si:H films, the observed σph and σD were one to two orders and three orders of magnitude higher respectively than those reported in literature. The average activation energy (EA) of 0.16 ∓ 0.01 eV for nc-Si:H films deposited using p-PECVD confirmed the presence of impurities, which led to the observation of the unusually high conductivity values. It was considered that the films were contaminated by the impurity atoms after they were exposed to air. Following the thin film characterization procedure, the optimized nc-Si:H film recipes, from cw and p-PECVD, were used to fabricate the absorber layer of thin film solar cells. The cells were then characterized for J-V and External Quantum Efficiency (EQE) parameters. The cell active layer fabricated from p-PECVD demonstrated higher power conversion efficiency (η) and a maximum EQE of 1.7 ∓ 0.06 % and 54.3% respectively, compared to 1.00 ∓ 0.04 % and 48.6% respectively for cw-PECVD. However, the observed η and EQE of both the cells were lower than a reported nc-Si:H cell fabricated via p-PECVD with similar absorber layer thickness. This was due to the poor Short-circuit Current Density (Jsc), Open-circuit Voltage (Voc), and Fill Factor (FF) of the cw and p-PECVD cells respectively, compared to the reported cell. The low Jsc resulted from the poor photocarrier collection at longer and shorter wavelengths and high series resistance (Rseries). On the other hand, the low Voc stemmed from the low shunt resistance (Rsh). It was inferred that the decrease in the Rsh occurred due to the inadequate electrical isolation of the individual cells and the contact between the n – layer and the front TCO contact at the edge of the p-i-n deposition area. Additionally, the net effect of the high Rseries and the low Rsh led to a decrease in the FF of the cells.

Nanowires are high aspect ratio nanostructures with structural diameters on the order of nanometers to hundreds of nanometers. In this work, the optical properties of highly crystalline silicon nanowires grown by the Vapor-Liquid-Solid (VLS) method surrounded by a thin silicon shell are investigated for thin film solar cell applications. Crystalline core nanowires were surrounded by a conformal amorphous silicon shell and exhibited extremely high absorption of 95% at short wavelengths (??<550nm) and very low absorption of <2% at long wavelengths (??>780nm). Nanowires were disordered with average lengths ranging from 1.3 to 2.3 ??m. The absorption increased at longer wavelengths as a function of amorphous shell radial thickness, significantly higher than the absorption of a reference planar a-Si thin film. In addition, a new method to grow epitaxial silicon at low growth temperatures on glass substrates is demonstrated. Highly crystalline silicon nanowires with an average length of 800 nm were used as the seed crystal to grow an epitaxial silicon shell around, using a low temperature process. The nanowire core was grown at 400??C, and the shell was grown at about 150??C. Such epitaxial grown nanowire shells could be used as a building block for nanotechnology applications in which epitaxial silicon is required over large-area substrates such as glass. Furthermore, the epitaxial silicon shell nanowires exhibited absorption > 90% up to a wavelength of 600 nm, which was significantly higher than that of a planar 1 ??m nanocrystalline silicon film. The high absorption exhibited by nanowires with both amorphous and crystalline silicon shells makes them promising for use in photovoltaic and photodetector applications. Silicon nanowires were incorporated into thin film silicon n-i-p solar cells in two configurations: as a nanostructured back reflector, and in core-shell nanowire solar cells. First, domed-shaped nanostructures were fabricated by coating an array of silicon nanowires with a thick layer of amorphous silicon. After the nanostructures were coated with Ag and ZnO:Al, they were used as the backreflector in an n-i-p amorphous silicon solar cell. The nanostructured backreflector improved light scattering within the solar cell, leading to a short circuit current of 14.8mA/cm2, a 13% improvement over that of the planar device, which had a Jsc=13.1 mA/cm2. The overall conversion efficiency of nanostructured backreflector device was ?? = 8.87%, a strong improvement over that of the planar device (?? = 7.47%). Silicon nanowires were also incorporated into core-shell nanowire solar cells. The first device architecture investigated consisted of nanowires incorporated as the intrinsic absorption layer between a planar n+ layer and conformal p+ layer. However, the fabricated devices exhibited very low collection efficiencies of < 2% due to the presence of impurities incorporated by the catalyst used during nanowire growth. As a result, the device architecture was modified such that the nanowires provided high aspect ratio structure to enhance absorption in a shell material, but the nanowires themselves were not used as an active device component. Nanowire core-amorphous silicon shell solar cells, on average 525 nm long and about 350nm in total diameter, exhibited an impressive low total reflectance of <3% in the wavelength interval of 410 nm < ?? < 640nm and exceeded 10% only for ??>700 nm. As a result, the core-shell nanowire devices exhibited enhancement in quantum efficiency at low wavelengths, ?? < 500nm and high wavelengths, ?? > 600nm as compared to a planar device. The resulting short circuit current was 14.1 mA/cm2 compared to 12.3 mA/cm2 for the planar device, an improvement of ~15%. Nanowire core- nanocrystalline silicon shell solar cells were also fabricated using the same device architecture. Core-shell nanowires with an average length of 800 nm showed significant enhancement in quantum efficiency over all wavelengths as compared to a 1 ??m thick planar solar cell. The core-shell nanowire device had a short-circuit current of 16.2 mA/cm2 , a ~25% improvement over that of the planar thin film solar cell (Jsc=13.0 mA/cm2). Core-shell nanowire devices did, however, have lower open circuit voltage compared to the planar device. Non-conformal coverage was found to be a limiting factor in device performance, but further improvements can be expected with optimization of the n-i-p deposition conditions and nanowire density.

The instability under bias voltage stress and low mobility of hydrogenated amorphous silicon (a-Si:H) thin film transistor (TFT), produced by plasma enhanced chemical vapor deposition (PECVD) technique, are the main problems impeding the implementation of active matrix arrays for light emitting diode display panels and their peripheral circuitry. Replacing a-Si:H by hydrogenated nanocrystalline silicon film (nc-Si:H) seems a solution due to its higher mobility and better stability. Therefore nc-Si:H TFT was produced and investigated in this thesis. All TFT layers (doped nc-Si:H, intrinsic nc-Si:H and insulator films) were produced separately, characterized by optical (UV-visible and FTIR spectroscopies, XRD) and electrical (current-voltage, I-V) methods, and optimized for TFT application. Afterwards the non self-aligned bottom-gate TFT structure was fabricated by the photolithographic method using 2-mask set. The n+ nc-Si:H films, used for TFT drain/source ohmic contacts, were produced at high H2 dilution and at several RF power densities (PRF). The change of their lateral resistivity (rho) was measured by reducing the film thickness via reactive ion etching. The rho values rise below a critical film thickness, indicating the presence of the disordered and less conductive incubation layer. The optimum PRF for the lowest incubation layer was determined. Among the deposition parameters only increased NH3/SiH4 flow rate ratio improved the insulating properties of the amorphous silicon nitride (a-SiNx:H) films, chosen as the TFT gate dielectric. The electrical characteristics of two TFTs with a-SiNx:H having low leakage current, fabricated at different NH3/SiH4 ratios (~19 and ~28) were compared and discussed. The properties (such as crystallinity, large area uniformity, etc.) of the nc-Si:H film as TFT channel layer, were found to depend on PRF. For the films deposited at the center of the PECVD electrode the change from an amorphous dominant structure to a nanocrystalline phase took place with increasing PRF, whereas those at the edge had always nanocrystalline nature, independent of PRF. The two different TFTs produced at the center of the electrode with a-Si:H and nc-Si:H grown at low and high PRF, respectively, were compared through their I-V characteristics and electrical stability under the gate bias voltage stress. Finally, nc-Si:H TFT structure, produced and optimized in this work, was analyzed through gate-insulator-drain/source capacitor by capacitance-voltage (C-V) measurements within 106-10-2 Hz frequency (F) range. The inversion regime was detected at low F without any external charge injection. Besides, ac hopping conductivity in the nc-Si:H bulk was extracted from the fitting results of the C-F curves.

It has been debated that among all the renewable energy alternatives, only solar energy offers sufficient resources to meet energy demands. Silicon thin film solar cells are at the frontier of commercial solar technology. Hot wire chemical vapour deposition (HWCVD) is the technique of choice for silicon thin film deposition due to the absence of ion bombardment and its independence toward geometry or electromagnetic properties of the substrate, as seen by plasma enhanced chemical vapour deposition (PECVD). With the implementation of nanostructures in a multi-band gap tandem solar cell, considerable improvement has been achieved over the single junction solar cells. Defect assisted tunnelling processes at the junctions between individual solar cells in a tandem structure solar cell largely affect the efficiency of these solar cells. In this contribution, the investigation toward the improvement of silicon thin films for tandem solar cell application is initiated. This study reports on the effects of hydrogen dilution and deposition time on six silicon thin films deposited at six specific deposition regimes. The thin film properties are investigated via X-Ray diffraction analysis, Raman spectroscopy, Fourier transform infra-red spectroscopy, elastic recoil detection analysis, scanning and transmission electron microscopy and UV-visible spectroscopy. This investigation revealed the dominating etching effect of atomic hydrogen with the increase in hydrogen dilution and a bonded hydrogen content (CH) exceeding 10 at.% for each of the six thin films. The optically determined void volume fraction and static refractive index remain constant, for each thin film, with the change in CH. A new deposition procedure, utilising the deposition conditions of the previously investigated thin films, is performed by HWCVD to deposit two silicon thin films. This deposition procedure involved either increasing (protocol 1) or decreasing (protocol 2) hydrogen dilution during deposition. Structural and optical variation with depth was observed for the dynamically deposited silicon thin films, with nano-voids existing across the entire cross section and bond angle variations which are indicative of good structural order. The optical absorption curves differ for the two silicon thin films whereas the optical density remains constant for both. / >Magister Scientiae - MSc

>Magister Scientiae - MSc / This study reports on the effects of hydrogen dilution and deposition time on six silicon thin films deposited at six specific deposition regimes. The thin film properties are investigated via X-Ray diffraction analysis, raman spectroscopy, fourier transform infra-red spectroscopy, elastic recoil detection analysis, scanning and transmission electron microscopy and UV-visible spectroscopy. This investigation revealed the dominating etching effect of atomic hydrogen with the increase in hydrogen dilution and a bonded hydrogen content (CH) exceeding 10 at.% for each of the six thin films. The optically determined void volume fraction and static refractive index remain constant, for each thin film, with the change in CH

Im quaternären System Erdalkalimetall-Silicium-Chlor-Wasserstoff bildet sich bei der Umsetzung des Metalls mit einer SiCl4-H2-Atmosphäre eine quaternäre Phase. Diese metastabile Phase zerfällt beim Abkühlen in das Metallchlorid und Silicium in nanokristalliner Form. Die vorliegende Arbeit hat sich mit der tiefergehenden Charakterisierung der quaternären Phase beschäftigt. Dazu wurden die Eigenschaften des quaternären Systems aus den Eigenschaften der sechs binären und vier ternären Systemen abgeleitet. Die Oberfläche wurde erstmals mit Photoelektronenspektroskopie charakterisiert. Zusätzlich gelang erstmalig die Verfolgung der Bildungsreaktion durch Messung des Spannungsabfalls über das Reaktionssystem. Erste Ansätze zur Aufklärung des Bildungsmechanismus ausgehend von den Ergebnissen der Charakterisierung wurden zusätzlich aufgezeigt.

Hot-wire chemical vapour deposition (HWCVD) is a promising technique that permits polycrystalline silicon films with grain size of nanometers to be obtained at high deposition rates and low substrate temperatures. This material is expected to have better electronic properties than the commonly used amorphous hydrogenated silicon (a-Si:H).In this work, thin-film transistors (TFTs) were fabricated using nanocrystalline hydrogenated silicon film (nc-Si:H), deposited by HWCVD over thermally oxidized silicon wafer. The employed substrate temperature during the deposition process permits inexpensive materials as glasses or plastics to be used for various applications in large-area electronics. The deposition rate was about one order of magnitude higher than in other conventionally employed techniques. The deposited nc-Si:H films show good uniformity and reproducibility. The films consist of vertically grown columnar grains surrounded by amorphous phase. The columnar grains are thinner at the bottom (near the oxide interface) and thicker at the top of the film. Chromium layer was evaporated over the nc-Si:H in order to form drain and source contacts. Using photolithography techniques, two types of samples were fabricated. The first type (simplified) was with the chromium contacts directly deposited over the intrinsic nc-Si:H layer. No dry etching was involved in the fabrication process of this sample. The transistors on the wafer were not electrically separated from each other. Doped n+ layer was incorporated at the drain and source contacts in the second type of samples (complete samples). Dry etching was employed to eliminate the nc-Si:H between the TFTs and to isolate them electrically from each other.The electrical characteristics of both types of nc-Si:H TFTs were similar to a-Si:H based TFTs. Nevertheless, some significant differences were observed in the characteristics of the two types of samples. The increasing of the off-current in the simplified structure was eliminated by the n+ layer in the second type of samples. This led to the improving of the on/off ratio. The n+ layer also eliminated current crowding of the output characteristics. On the other hand, the subthreshold slope, the threshold voltage and the density of states were slightly deteriorated in the samples with incorporated n+ layer. Surface states created by the dry etching could be a possible reason. Other cause could be a bad quality of the nc-Si:H/SiO2 interface. The TFTs with incorporated n+ contact layer and electrically separated on the wafer were used in the further studies of stability and device modelling.The nc-Si:H TFTs were submitted under prolonged positive and negative gate bias stress in order to study their stability. We studied the influence of the stressing time and voltage on the transfer characteristics, threshold voltage, activation energy and density of states. The threshold voltage increased under positive gate bias stress and decreased under negative gate bias stress. After both positive and negative stresses, the threshold voltage recovered its initial values without annealing. This behaviour indicated that temporary charge trapping in the channel/gate insulator interface is the responsible process for the device performance under stress. Measurements of space-charge limited current confirmed that bulk states were not affected by the positive nor by negative stress.Analysis of the activation energy and the density of states gave more detailed information about the physical processes taking place during the stress. Typical drawback of the nc-Si:H films grown by HWCVD with tungsten (W) filament is the bad quality of the bottom, initially grown, interfacial layer. It is normally amorphous and porous. We assume that this property of the nc-Si:H film is determining for charge trapping and the consecutive temporary changes of the TFT's characteristics. On the other hand, the absence of defect-state creation during the gate bias stress demonstrates that the nc-Si:H films did not suffer degradation under the applied stress conditions. The electrical characteristics and the operational regimes of the nc-Si:H TFTs were studied in details in order to obtain the best possible fit using the Spice models for a-Si:H and poly-Si TFTs existing until now. The analysis of the transconductance gm showed behaviour typical for a-Si:H TFTs at low gate voltages. In contrast, at high gate voltages unexpected increasing of gm was observed, as in poly-Si TFTs. Therefore, it was impossible to fit the transfer and output characteristics with the a-Si:H TFT model neither with poly-Si TFT model.We performed numerical simulations using the Silvaco's Atlas simulator of semiconductor devices in order to understand the physical parameters, responsible for the device behaviour. The simulations showed that the reason for this behaviour is the density of acceptor-like states, which situates the properties of nc-Si:H TFTs between the amorphous and the polycrystalline transistors. Taking into account this result, we performed analysis of the concentrations of the free and the trapped carriers in nc-Si:H layer. It was found that nc-Si:H operates in transitional regime between above-threshold and crystalline-like regimes. This transitional regime was predicted earlier, but not experimentally observed until now. Finally, we introduced new equations and three new parameters into the existing a-Si TFTs model in order to account for the transitional regime. The new proposed model permits the shapes of the transconductance, the transfer and the output characteristics to be modelled accurately.

No description available.

Magister Scientiae - MSc (Physics) / An increasing energy demand and growing environmental concerns regarding the use of fossil fuels in South Africa has led to the challenge to explore cheap, alternative sources of energy. The generation of electricity from Photovoltaic (PV) devices such as solar cells is currently seen as a viable alternative source of clean energy. As such, crystalline, amorphous and nanocrystalline silicon thin films are expected to play increasingly important roles as economically viable materials for PV development. Despite the growing interest shown in these materials, challenges such as the partial understanding of standardized measurement protocols, and the relationship between the structure and optoelectronic properties still need to be overcome.