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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Low-Power, Stable and Secure On-Chip Identifiers Design

Vivekraja, Vignesh 09 September 2010 (has links)
Trustworthy authentication of an object is of extreme importance for secure protocols. Traditional methods of storing the identity of an object using non-volatile memory is insecure. Novel chip-identifiers called Silicon Physical Unclonable Functions (PUFs) extract the random process characteristics of an Integrated Circuit to establish the identity. Though such types of IC identifiers are difficult to clone and provide a secure, yet an area and power efficient authentication mechanism, they suffer from instability due to variations in environmental conditions and noise. The decreased stability imposes a penalty on the area of the PUF circuit and the corresponding error correcting hardware, when trying to generate error-free bits using a PUF. In this thesis, we propose techniques to improve the popular delay-based PUF architectures holistically, with a focus on its stability. In the first part, we investigate the effectiveness of circuit-level optimizations of the delay based PUF architectures. We show that PUFs which operate in the subthreshold region, where the transistor supply voltage is maintained below the threshold voltage of CMOS, are inherently more stable than PUFs operating at nominal voltage because of the increased difference in characteristics of transistors at this region. Also, we show that subthreshold PUF enjoys higher energy and area efficiency. In the second part of the thesis, we propose a feedback-based supply voltage control mechanism and a corresponding architecture to improve the stability of delay-based PUFs against variations in temperature. / Master of Science
2

A method for mapping XML-based specifications between development methodologies

Huang, Fei 17 April 2009
The Unified Modeling Language (UML) is widely used by software engineers as the basis of analysis and design in software development. However, UML ignores human factors in the course of software development because of its strong emphasis on the internal structure and functionality of the application. This thesis presents a method of mapping human-computer interaction (HCI) requirement specifications generated by usability engineering (UE) methodologies (e.g. Putting Usability First (PUF)) into UML specifications. These two sets of requirement specification are specified, using Extensible Markup Language (XML) so that HCI requirement specifications can be integrated into UML ones. A Mapping Tool was developed to facilitate the creation of mappings between PUF XML tags and XMI tags. The Mapping Tool was used to create mappings between PUF and UML requirement specifications. This mapping process and its outputs were evaluated to demonstrate that the tool worked. The results of the evaluation show that the HCI requirement specification represented by the PUF XML tags can improve the UML specification by adding them into the XMI tags.
3

A method for mapping XML-based specifications between development methodologies

Huang, Fei 17 April 2009 (has links)
The Unified Modeling Language (UML) is widely used by software engineers as the basis of analysis and design in software development. However, UML ignores human factors in the course of software development because of its strong emphasis on the internal structure and functionality of the application. This thesis presents a method of mapping human-computer interaction (HCI) requirement specifications generated by usability engineering (UE) methodologies (e.g. Putting Usability First (PUF)) into UML specifications. These two sets of requirement specification are specified, using Extensible Markup Language (XML) so that HCI requirement specifications can be integrated into UML ones. A Mapping Tool was developed to facilitate the creation of mappings between PUF XML tags and XMI tags. The Mapping Tool was used to create mappings between PUF and UML requirement specifications. This mapping process and its outputs were evaluated to demonstrate that the tool worked. The results of the evaluation show that the HCI requirement specification represented by the PUF XML tags can improve the UML specification by adding them into the XMI tags.
4

Ribonomic and Mechanistic Analysis of the Human Pum1 RNA Binding Protein

Morris, Adam Remy January 2010 (has links)
<p>Much of the regulation of gene expression occurs at the posttranscriptional level, and much of this regulation is controlled and coordinated by RNA binding proteins (RBPs). Many RBPs have multiple mRNA targets, and the proteins encoded by these targets often share functional relationships, forming posttranscriptional RNA operons. These operons often reflect the function of the RBP, thus determination of the genome-wide targets of RBPs allows insight into their functions.</p> <p>The PUF family of RBPs is characterized by the presence of an extremely well conserved RNA binding domain, typically consisting of 8 repeats of an RNA binding motif, with each repeat binding to one RNA base. PUF proteins are proposed to have an ancestral role in self-renewal of stem cells and have been shown to affect a number of developmental processes. Human and other vertebrate genomes contain two canonical PUF genes, Pum1 and Pum2, and at the outset of this study there was very little known about functions or targets of either protein, especially Pum1.</p> <p>In order to identify the genome-wide targets of human Pum1 we used RNA immunoprecipitation followed by microarray, or RIP-Chip, analysis. RIP-Chip allowed us to identify Pum1 target mRNAs in human HeLa cells. We found that there were numerous functional relationships among the proteins encoded by these mRNAs, forming putative RNA operons. Some of these potential operons are progression of cell cycle, cell differentiation and proliferation, and regulation of transcription. We were also able to find a consensus Pum1 binding motif, UGUAHAUA, in the 3' UTRs of Pum1 target mRNAs. </p> <p>The genome-wide targets of PUF proteins from other species have been previously identified, and by comparing the targets of human Pum1 to targets of Drosophila Pumilio and yeast Puf3, both of which bind to the same RNA sequence as Pum1, we determined that there has been evolutionary rewiring of regulation by Puf proteins. While the PUF RNA binding domain and consensus binding sequence have remained almost identical through evolution, the surrounding protein sequence and the mRNAs bound have changed dramatically, indicating that evolutionary rewiring is occurring in a modular fashion. </p> <p>After identifying Pum1 associated mRNAs, we went on the study the function of Pum1. Through Pum1 knockdown assays we found that Pum1 enhances decay of target mRNAs, and that this effect is likely due to Pum1 enhancing deadenylation of these mRNAs. We also showed by immunofluorescence that Pum1 protein has a cytoplasmic granular subcellular localization and upon oxidative stress relocates to stress granules but not processing bodies. We were, however, unable to detect any difference in Pum1 mRNA targeting after stress. We were also unable to detect any changes in progression through cell cycle after Pum1 knockdown. </p> <p>In this study we identified the genome-wide mRNAs associated with Pum1, determined functional relationships among these targets related to the proposed ancestral role of PUF proteins in self-renewal of stem cells, and identified a sequence motif to which Pum1 binds in these mRNAs. We also demonstrated that Pum1 enhances decay of associated mRNAs, and that this effect is likely due to Pum1 enhancing deadenylation of associated mRNAs. These results provide a description of mRNA targets and mechanisms of action of Pum1 proteins, which will provide a strong foundation for future experiments to further explore the functions of the Pum1, especially as they relate to human stem cells.</p> / Dissertation
5

Reliable SRAM fingerprinting

Kim, Joonsoo, Ph. D. 05 October 2012 (has links)
Device identification, as human identification has been, has become critical to mitigate growing security problems. In the era of ubiquitous computing, it is important to ensure universal device identities that are versatile in number of ways, for example, to enhance computer security or to enable large-scale data capture, management and analysis. For device identities, simple labeling works only if they are properly managed under a highly controlled environment. We can also impose hard-coded serial numbers into non-volatile memories but it is well known that this is expensive and vulnerable to security attacks. Hence, it is desirable to develop reliable and secure device identification methods using fingerprint-like characteristics of the electronic devices. As technology scales, process variation has become the most critical barrier to overcome for modern chip development. Ironically, there are some research works to exploit the aggressive process variation for the identification of individual devices. They find measurable physical characteristics that are unique to each integrated circuit. Among them, device identification using initial power-up values of SRAM cells, called SRAM fingerprints, has been emphasized lately in part due to the abundant availability of SRAM cells in modern microprocessors. More importantly, since the cross-coupled inverter structure of each SRAM cell amplifies even the small mismatches between two inverter nodes, it is thus very sensitive to and maximizes the effect of random process variation, making SRAM fingerprints to acquire great features as a naturally inherent device ID. Therefore, this work focuses on achieving reliable device identification using SRAM fingerprints. As of date, this dissertation shows the most comprehensive feature characterization of SRAM fingerprints based on the large datasets measured from the real devices under various environmental conditions. SRAM fingerprints in three different process technologies - IBM 32nm SOI technology, IBM 65nm bulk technology, and TSMC 90nm low-k dielectric technology - have been investigated across different temperatures or voltages. By using formal statistical tools, the required features for SRAM fingerprints necessary to be usable as device IDs - uniqueness, randomness, independence, reproducibility, etc. - have been empirically proven. As some of the previous works mentioned, there is an inherent unreliability of the initial states of SRAM cells so that there is always some chance of errors during identification process. It is observed that, under environmental variations, the instability aggravates even more. Most of the previous work, however, ignores the temperature dependence of the SRAM power-up values, which turns out to be critical against our past speculations and becomes a real challenge in realizing a reliable SRAM-based device identification. Note that temperature variation will not be negligible in many situations, for example, authentication of widely distributed sensors. We show that it is possible to achieve SRAM-based device identification system that reliably operates under a wide range of temperatures. The proposed system is composed of three major steps: enrollment, system evaluation, and matching. During the enrollment process, power-up samples of SRAM fingerprints are captured from each manufactured device and the feature information or characterization identifier (CID) is characterized to generate a representative fingerprint value associated with the product device. By collecting the samples and the CIDs, system database gets constructed before distributing devices to the field. During the matching process, we take a single sample fingerprint of a power-cycle experiment, the field identifier (FID), and perform a match against a repository of CID's of all manufactured devices. There is an additional monitoring subsystem, called system evaluation, that estimates the system accuracy with the system database. It controls the system parameters while maintaining the system accuracy requirement. This work delivers a total-package statistical framework that raises design issues of each step and provides systematic solutions to deal with these inter-related issues. We provide statistical methods to determine sample size for the enrollment of chip identities, to generate the representative fingerprint features with the limited number of test samples, and to estimate the system performance along with the proposed system parameter values and the confidence interval of the estimation. A novel matching scheme is proposed to improve the system accuracy and increase population coverage under environmental variations, especially temperature variation. Several advanced mechanisms to exploit the instability for our benefit is also discussed along with supporting state-of-the-art circuit technologies. All these pioneering theoretical frameworks have been validated by the comprehensive empirical analysis based on the real SRAM fingerprint datasets introduced earlier. This dissertation covers a wide range of multidisciplinary research areas including solid-state device physics, computer security, biometrics, statistics, and pattern matching. The main contribution here is that this work provides a comprehensive interdisciplinary framework to enable reliable SRAM fingerprinting, even if the fingerprint, depending on ambient conditions, exhibits nondeterministic behaviors. Furthermore, the interdisciplinary bases introduced in our work are expected to provide generic fundamental methodologies that apply to device fingerprints in general, not just to SRAM fingerprints. / text
6

Highly secure strong PUF based on nonlinearity of MOSFET subthreshold operation

Kalyanaraman, Mukund Murali 24 April 2013 (has links)
Silicon physical unclonable functions (PUFs) are security primitives relying on the intrinsic randomness of IC manufacturing. Strong PUFs have a very large input-output space which is essential for secure authentication. Several proposed strong PUFs use timing races to produce a rich set of responses. However, these PUFs are vulnerable to machine-learning attacks due to linear separability of the output function resulting from the additive nature of timing delay along timing paths. We introduce a novel strong silicon PUF based on the exponential current-voltage behavior in subthreshold region of FET operation. This behaviour injects strong nonlinearity into the response of the PUF. The PUF, which we term subthreshold current array (SCA) PUF, is implemented as a two-dimensional n x k transistor array with all devices subject to stochastic variability operating in subthreshold region. Our PUF is fundamentally different from earlier attempts to inject nonlinearity via digital control techniques like XORing the outputs of PUF and using feedforward structures, which could also be used with SCA-PUF. Voltages produced by nominally identical arrays are compared to produce a random binary response. SCA-PUF shows excellent security properties. The average inter-class Hamming distance, a measure of uniqueness, is 50.3%. The average intra-class Hamming distance, a measure of response stability, is 0.6%. Crucially, we demonstrate that the introduced PUF is much less vulnerable to modeling attacks. Using a machine-learning technique of support-vector machine with radial basis function kernel for optimum nonlinear learnability, we observe that the information leakage (rate of error reduction with learning) is much lower than for delay-based PUFs. Specifically, over a wide range of the number of observed challenge-response pairs, the error rate is 3-35x higher than for earlier designs. / text
7

A Study on Controlling Power Supply Ramp-Up Time in SRAM PUFs

Ramanna, Harshavardhan 29 October 2019 (has links)
With growing connectivity in the modern era, the risk of encrypted data stored in hardware being exposed to third-party adversaries is higher than ever. The security of encrypted data depends on the secrecy of the stored key. Conventional methods of storing keys in Non-Volatile Memory have been shown to be susceptible to physical attacks. Physically Unclonable Functions provide a unique alternative to conventional key storage. SRAM PUFs utilize inherent process variation caused during manufacturing to derive secret keys from the power-up values of SRAM memory cells. This thesis analyzes the effect of supply ramp-up times on the reliability of SRAM PUFs. We use SPICE simulations as the platform to observe the effect of supply ramp times at the circuit level using carefully controlled supply voltages during power-up. We also measure the effect of supply ramp times on commercially available SRAM ICs by performing reliability and uniqueness measurements on two commercial SRAM models. Finally, a hardware implementation is proposed in a commercial 16nm FinFET technology to establish the design flow for taping out a custom SRAM IC with separated peripheral and core power supplies that would allow for experimental evaluation of sequenced power supplies on the SRAM PUF.
8

A Robust Authentication Methodology Using Physically Unclonable Functions in DRAM Arrays

Hashemian, MaryamSadat 07 September 2020 (has links)
No description available.
9

PUF based FPGAs for Hardware Security and Trust

Mustapa, Muslim January 2015 (has links)
No description available.
10

SR Flip-Flop Based Physically Unclonable Function (PUF) for Hardware Security

Challa, Rohith Prasad 25 June 2018 (has links)
Physically Unclonable Functions (PUFs) are now widely being used to uniquely identify Integrated Circuits (ICs). In this work, we propose a novel Set-Reset (SR) Flip-flop based PUF design. For a NAND gate based SR flip-flop, the input condition S (Set) = 1 and R (Reset) = 1 must be avoided as it is an inconsistent condition. When S=R=1 is applied followed by S=R=0, then the outputs Q and Q' undergo race condition and depending on the delays of the NAND gates in the feedback path, the output Q can settle at either 0 or 1. Because of process variations in an IC, the NAND delays are statistical in nature. Thus, for a given SR FF based $n$-bit register implemented in an IC, when we apply S=R=1 to all flip-flops followed by S=R=0, then we obtain an $n$ bit string that can be interpreted as a signature of the chip. Due to process variations, the signature is highly likely to be unique for an IC. We validated the proposed idea by SPICE-level simulations for 90nm, 45nm, and 32nm designs for both intra- and inter-chip variations to establish the robustness of the proposed PUF. Experimental results for 16-, 32-, 64-, and 128-bit registers based on Monte-Carlo simulations demonstrate that the proposed PUF is robust. The main advantage of the proposed PUF is that there is very little area overhead as we can reuse existing registers in the design.

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