Distributed power system (DPS) is widely adopted in Power supplies for the telecom, computer and network applications. Constant on-time current mode control and V2 control are widely used as point-of-load (POL) converters and voltage regulators (VR) in DPS systems. Series resonant converters (SRC) are widely used in aerospace systems and LLC resonant converters are widely used as Front-end converters in DPS systems. The technological innovations bring increasing demand for optimizing the dynamic performance of the switching regulators in these applications. There has been a strong desire to develop simple and accurate equivalent circuit models to facilitate the design of these converters. Constant on-time current-mode control has been widely used in POL and VRM converters. For multi-phase application, external ramp is required to improve jittering performance using pulse distribution method. Chapter II analyzes the effect of external ramp on small-signal model of constant on-time current mode control. It is found that external ramp brings additional dynamics by introducing a moving pole and a static zero. Next, a three-terminal switch model is proposed based on non-ideal current source concept, where the non-idealness of the current source is presented by a Re2-Le2 branch. Based on the proposed model, design guidelines are proposed based on either worst case design strategy or auto-tuning strategy. V2 control has advantages of simple implementation and fast transient response and is widely used in industry for POL and VR applications. However, the capacitor voltage sideband effect, which casues the instability problem when ceramic capacitors are employed, also needs to be taken into consideration in modeling. Chapter III proposed a unified equivalent circuit model of V2 control, the model is built based on non-ideal voltage source concept. The model represents capacitor voltage sideband effect with a Re2-Le2 branch, which forms the double pole by resonating with power stage output capacitor. The equivalent circuit model is a complete model and can be used to examine all the transfer functions. Bsed on the unified equivalent circuit model, design guidelines for VR applications and general POL applications are provided in Chapter IV, for both constant on-time V2 control and constant frequency V2 control. For resonant converters, the small-sginal modelling is very challenging as some of the state variables do not have dc components but contain strong switching frequency component and therefore the average concept breaks down. For SRC, the equivalent circuit model proposed by E. Yang in [E26] based on the results by the extended describing function concept is the most successful model. However, the order of the equivalent circuit model is too high and the transfer functions are still derived based on numerical solution instead of analytical solutions. Chapter V proposes a methodology to simplify the fifth-order equivalent circuit of SRC to a third-order equivalent circuit. The proposed equivalent circuit model can be used to explain the beat frequency dynamics: when switching frequency is far away from resonant frequency, beat frequency will occur; when the two frequencies are close, beat frequency will disappear and another double pole which is determined by equivalent inductor and output capacitor will be formed. For the first time, analytical solutions are provided for all the transfer functions which are very helpful for feedback design. LLC resonant converters are widely adopted as front-end converter in distributed power system for the telecom, computer and network applications [F2]. Besides, LLC resonant converters are also very popular in other applications, such as LCD, LED and plasma display in TV and flat panels [F3]-[F6]; iron implanter arc power supply[F7]; solar array simulator in photovoltaic application[F8]; fuel cell applications[F9],and so on. For LLC, no simple equivalent circuit model is available and no analytical expressions of transfer functions are presented. Chapter VI proposes an equivalent circuit model for LLC resonant converter. When Fs ≥ Fo, Lm is clamped by the output voltage and LLC behaves very similar as SRC. As a result, the dynamic behavior is similar as SRC: when switching frequency is larger than resonant frequency, the beat frequency double pole show up and the circuit is third-order; when switching frequency is close to resonant frequency, beat frequency double pole disappear and a new double pole formed by equivalent inductor Le and equivalent output capacitor Cf show up. The circuit reduces to second order. When Fs<Fo, Lm participates in resonance during some time periods and the circuit is essentially a multiresonant structure. An approximated model is proposed where the equivalent resonant inductor is modified to include the effect of Lm. As a result, the double pole will move to a little lower frequency. For the first time, analytical solutions are provided for all the transfer functions which are very helpful for feedback design. In conclusion, the works shown in this dissertation focus on small-signal equivalent circuit modeling for Buck converters with advanced control schemes and also resonant converters. The models are simple and accurate up to very high frequency range (1/2 fsw). / Ph. D.

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / In the last decade, disturbances in the electrical system have been increased, mainly due to proliferation of nonlinear loads. As a result harmonic distortion, voltage unbalance and frequency variations are becoming a concern. These disturbances can produce distortions in the synchronization signals used by PWM converters connected to utility grid. Theses distortions in the synchronization signals, consequently, increase distortions in generated or drained currents by the three-phase PWM converters. Due these facts, several synchronization methods are developed with purpose to operate adequately to reduce the impacts of corrupting grid voltages on the synchronization signals. In this sense, synchronization methods that used closed loop and open loop algorithms are proposed in the literature. Although closed loop methods have low sensitivity to the frequency variations, a trade of between good transient response and good filtering characteristics must always be considered. Moreover, the algorithms developed to the closed loop methods on fixed point DSP, generally, present larger execution time those open loop synchronization methods.Open loop methods standout for their simplicity as compare closed loop methods. However, none of open loop methods reported, so far, have a good performance in terms of the distortion synchronization signals and consequently in the generated or drained currents in the three-phase PWM converters under unbalance, harmonics and frequency variations in the grid voltages. In this sense, this Doctor Thesis proposes a study, analysis and development of a new open loop synchronization method applied on three-phase three-wire and four-wire PWM converters connected to the utility grid. This method provides a good performance even in the presence of harmonics, severe voltage unbalance and frequency variations on grid voltages. Initially, it is presented an overview of open loop synchronization method applied to three-phase PWM converters. Then, have been situated the characteristics and limitations of the new method under grid voltages disturbances. In addition, the proposed method is implemented considering that two distinct cases. The first case describes the implementation of the new synchronization method to synchronized three-phase three-wire PWM rectifiers. The second case presents the implementation of the new synchronization method to generate reference currents to three-phase four-wire shunt active power filter. Furthermore, simulation and experimental results are obtained to demonstrate the good performance of the new open-loop synchronization method used in three-phase threewire and four-wire PWM converters along the Thesis. / Nas últimas décadas houve um aumento significativo de distúrbios nas tensões dos sistemas elétricos, tais como distorções harmônicas, desequilíbrios, variações de freqüência entre outros, devido principalmente, ao aumento da utilização de cargas não lineares. Estes distúrbios podem causar distorções nos sinais de sincronização gerados, os quais são usados para sincronizar conversores PWM com a rede elétrica. Estas distorções nos sinais de sincronismo podem, conseqüentemente, provocar o aumento de distorções nas correntes geradas ou drenas por conversores PWM trifásicos. Devido a estes fatos, vários métodos de sincronização foram desenvolvidos no intuito de operar adequadamente, reduzindo o impacto destes distúrbios sobre os sinais de sincronismo gerados. Neste sentido, métodos de sincronização que utilizam algoritmos em malha fechada e em malha aberta são propostos na literatura. Com relação aos métodos de malha fechada, estes apresentam baixa sensibilidade a variações de freqüência, entretanto, a relação entre uma adequada resposta transitória e uma boa característica de filtragem deve ser considerada. Além disso, os algoritmos desenvolvidos para os métodos em malha fechada e implementados em processadores digitais de sinais, apresentam um tempo de processamento, geralmente, maior que os métodos em malha aberta. Por sua vez, métodos em malha aberta destacam-se por sua simplicidade quando comparados aos métodos em malha fechada. Entretanto, nenhum método em malha aberta foi apresentado até o momento na literatura, que resulte em um bom desempenho com relação aos sinais de sincronização gerados quando se fazem presentes nas tensões da rede elétrica, conjuntamente, desequilíbrios, harmônicos e variações de freqüência. Neste sentido, a presente Tese de Doutorado trata do estudo, análise e desenvolvimento de um novo método de sincronização em malha aberta aplicado a conversores PWM trifásicos a três e a quatro fios conectados a rede elétrica. Este método possibilita um bom desempenho em termos redução da taxa de distorção harmônica nos sinais de sincronização mesmo na presença de distorções harmônicas, severos desequilíbrios de tensão e variações de freqüência da rede elétrica. Inicialmente, é apresentada uma visão geral sobre os métodos de sincronização em malha aberta aplicados a conversores PWM trifásicos. Em seguida, são abordadas as principais características e limitações do novo método de sincronização em malha aberta proposto. Posteriormente, o método de sincronização proposto é implementado considerando dois casos distintos. O primeiro caso se refere à aplicação do método de sincronização proposto a retificadores PWM trifásicos a três fios. O segundo caso, refere-se à aplicação do método para gerar as eferências de corrente de compensação para filtros ativos de potência paralelos trifásicos a quatro fios. Ao longo desta tese, resultados de simulações e experimentais são apresentados, a fim de que, seja demonstrada a aplicabilidade do método de sincronização em malha aberta proposto em sistemas trifásicos a três fios e a quatro fios.

Soft-switching techniques can significantly reduce the switching loss and switching stresses of the power semiconductor devices in a power converter. This work presents several soft-switching topologies for high power PWM converters. These new topologies achieve soft-switching functions with minimum increase of device voltage/current stresses and converter circulating energy, and thus have advantages over conventional techniques in efficiency, power density, reliability, and cost of power converters. The improved zero-current transition (ZCT) converters achieve zero-current switching at both turn-on and turn-off for all main switches and auxiliary switches. These converters significantly reduce the switching loss and stress of the power semiconductor devices, while have a voltage/current stress and circulating energy similar to a PWM converter’s. The analysis, design, and experimental verification are presented. The three-phase zero-voltage transition (ZVT) boost rectifiers/voltage source inverters are developed with simple auxiliary circuits. Unlike most existing three-phase soft-switching techniques, these new topologies achieve soft-switching functions without overcharging the resonant inductors, and realize the benefits of soft-switching operation with minimum extra main switch turn-offs and fixed auxiliary circuit control timing. The operation principles of the developed techniques are experimentally verified, and their efficiency performances are evaluated with experiments and computer simulation. The three-phase ZVT buck rectifier topologies developed in this work achieves zero-voltage turn-on for all main switches with an optimum modulation schemes and simple auxiliary circuits. The auxiliary circuits, which are connected directly to each main switch, can also absorb the parasitic resonance of the bridge arms, and keep the voltage stress of the power devices at the minimum. The analysis and simulation results are presented to verify the converter operation. New ZVT dc-link schemes for three-phase ac-dc-ac converters are investigated. With coordinated control of the ac-dc converter and the dc-ac converter, a set of simple auxiliary circuit can provide soft-switching function for all switches in both the ac-dc converter and the dc-ac converter. The power loss in the auxiliary circuit is also significantly lower than existing dc-link soft-switching schemes. Simulation with experimentally obtained device switching loss data proves that significant efficiency improvement can be achieved with the new ZVT dc-link techniques. New ZVT and ZCT techniques for three-level converters are also developed. The auxiliary circuits are not in the main power path, and allow the converters to be controlled with optimum PWM schemes. Analysis and simulation results are presented to demonstrate the operation principles and advantages of soft switching in three-level converters. / Ph. D.

Este trabalho apresenta o estudo, análise e a implementação de três topologias de condicionadores ativos de energia elétrica, utilizados para a melhoria da qualidade da energia em sistemas elétricos trifásicos a quatro fios. Estes condicionadores de qualidade de energia podem trabalhar tanto como um condicionador unificado de qualidade de energia (UPQC), bem como uma fonte de alimentação ininterrupta (UPS), permitindo: (i) a supressão das correntes harmônicas da carga; (ii) a compensação de energia reativa da carga; (iii) compensação dos desequilíbrios das correntes de carga; (iv) a compensação de desequilíbrios de tensão da rede; (v) supressão das tensões harmônicas da rede elétrica; (vi) a regulação das tensões de saída (tensões de carga); e (vii) fornecimento de energia ininterrupta para as cargas críticas (sistema UPS). Dentre as três topologias de UPQC/UPS estudadas, uma delas é proposta neste trabalho com o intuito de reduzir a tensão no barramento CC. Além disso, todas as topologias em estudo são constituídas por dois conversores PWM, nos quais é adotada uma estratégia de controle dual. Desse modo, o conversor colocado em paralelo com a carga, funciona como uma fonte de tensão senoidal, enquanto que o conversor colocado em série entre a rede elétrica e a carga, é controlado para operar como uma fonte de corrente senoidal. Tanto os controladores de tensão, quanto os de corrente são implementados no referencial síncrono dq0. Além disso, a técnica de modulação vetorial espacial tridimensional (3-D-SVM) é empregada nos conversores. Testes experimentais são apresentados para validar o desenvolvimento teórico e verificar o bom desempenho estático e dinâmico dos condicionadores ativos de energia elétrica, operando como UPQC, bem como sistema UPS. / This work presents the study, analysis and implementation of three topologies of active power conditioners, which are used to improve the power quality in three-phase four-wire systems. These power quality conditioner can work as unified power quality conditioner (UPQC), as well as an uninterruptible power supply (UPS) system allowing: (i) suppression of load harmonic currents; (ii) compensation of load reactive power; (iii) load unbalances compensation; (iv) utility voltage unbalances compensation; (v) utility voltage harmonics suppression; (vi) regulation of the output voltages (load voltages); and (vii) uninterruptible power for critical loads when working as UPS system. Among the three topologies of UPQC/UPS studied, one of them is proposed in this work in order to reduce the DC-bus voltage. Besides, all the topologies are comprised of two PWM converters, where a dual control strategy is adopted. The first converter, which is placed in parallel with the load, operates as a sinusoidal voltage source, while the second, which is placed in series between the utility grid and the load, is controlled to operate as a sinusoidal current source. Both the voltage and current controllers are implemented into the synchronous rotating reference frame (dq0-axes). In addition, the series and parallel converters use the three-dimensional space vector modulation (3-D-SVM) technique. The experimental tests are presented to validate the theoretical development and to verify the effective static and dynamic performance of the proposed active power conditioners, operating as UPQC and UPS.

Este trabalho apresenta o estudo, análise e a implementação de três topologias de condicionadores ativos de energia elétrica, utilizados para a melhoria da qualidade da energia em sistemas elétricos trifásicos a quatro fios. Estes condicionadores de qualidade de energia podem trabalhar tanto como um condicionador unificado de qualidade de energia (UPQC), bem como uma fonte de alimentação ininterrupta (UPS), permitindo: (i) a supressão das correntes harmônicas da carga; (ii) a compensação de energia reativa da carga; (iii) compensação dos desequilíbrios das correntes de carga; (iv) a compensação de desequilíbrios de tensão da rede; (v) supressão das tensões harmônicas da rede elétrica; (vi) a regulação das tensões de saída (tensões de carga); e (vii) fornecimento de energia ininterrupta para as cargas críticas (sistema UPS). Dentre as três topologias de UPQC/UPS estudadas, uma delas é proposta neste trabalho com o intuito de reduzir a tensão no barramento CC. Além disso, todas as topologias em estudo são constituídas por dois conversores PWM, nos quais é adotada uma estratégia de controle dual. Desse modo, o conversor colocado em paralelo com a carga, funciona como uma fonte de tensão senoidal, enquanto que o conversor colocado em série entre a rede elétrica e a carga, é controlado para operar como uma fonte de corrente senoidal. Tanto os controladores de tensão, quanto os de corrente são implementados no referencial síncrono dq0. Além disso, a técnica de modulação vetorial espacial tridimensional (3-D-SVM) é empregada nos conversores. Testes experimentais são apresentados para validar o desenvolvimento teórico e verificar o bom desempenho estático e dinâmico dos condicionadores ativos de energia elétrica, operando como UPQC, bem como sistema UPS. / This work presents the study, analysis and implementation of three topologies of active power conditioners, which are used to improve the power quality in three-phase four-wire systems. These power quality conditioner can work as unified power quality conditioner (UPQC), as well as an uninterruptible power supply (UPS) system allowing: (i) suppression of load harmonic currents; (ii) compensation of load reactive power; (iii) load unbalances compensation; (iv) utility voltage unbalances compensation; (v) utility voltage harmonics suppression; (vi) regulation of the output voltages (load voltages); and (vii) uninterruptible power for critical loads when working as UPS system. Among the three topologies of UPQC/UPS studied, one of them is proposed in this work in order to reduce the DC-bus voltage. Besides, all the topologies are comprised of two PWM converters, where a dual control strategy is adopted. The first converter, which is placed in parallel with the load, operates as a sinusoidal voltage source, while the second, which is placed in series between the utility grid and the load, is controlled to operate as a sinusoidal current source. Both the voltage and current controllers are implemented into the synchronous rotating reference frame (dq0-axes). In addition, the series and parallel converters use the three-dimensional space vector modulation (3-D-SVM) technique. The experimental tests are presented to validate the theoretical development and to verify the effective static and dynamic performance of the proposed active power conditioners, operating as UPQC and UPS.

This dissertation studies modeling and control issues of parallel three-phase pulse-width modulated (PWM) converters. The converters include three-phase boost rectifiers, voltage source inverters, buck rectifiers and current source inverters. The averaging of the parallel converters is performed based on a generic functional switching unit, which is called a phase leg in boost rectifiers and voltage source inverters, and a rail arm in buck rectifiers and current source inverters. Based on phase-leg and rail-arm averaging, the developed models are not only equivalent to the conventional three-phase converter models that are based on phase-to-phase averaging, but they also preserve common-mode information, which is critical in the analysis of the parallel converters. The models reveal such parallel dynamics as reactive power circulation and small-signal interaction. A unique feature of the parallel three-phase converters is a zero-sequence circulating current. This work proposes a novel zero-sequence control concept that uses variable zero-vectors in the space-vector modulation (SVM) of the converters. The control can be implemented within an individual converter and is independent from the other control loops for the converter. Therefore, it greatly facilitates the design and expansion of a parallel system. Proper operation of the parallel converters requires an explicit load-sharing mechanism. In order to have a modular design, a droop method is recommended. Traditionally, however, a droop method has to compromise between voltage regulation and load sharing. After parametric analysis, a novel droop method using a gain-scheduling technique is proposed. The numeric analysis shows that the proposed droop method can achieve both good voltage regulation and good load sharing. An interleaving technique is often used in parallel converter systems in order to reduce current ripples. Because of its symmetrical circuit structure, the parallel three-phase converter system can reduce both differential-mode and common-mode noise with a center-aligned symmetrical SVM. Based on the concept that a symmetrical circuit can reduce common-mode dv/dt noise, a conventional three-phase, four-leg inverter is modified so that its fourth leg is symmetrical to the other three legs. The common-mode dv/dt noise can be practically eliminated with a new modulation strategy. Meanwhile, with a modified control design, the new four-leg inverter still can handle low-frequency common-mode components that occur due to unbalanced and nonlinear load. / Ph. D.

A systematic and versatile method to derive accurate and efficient Circuit Oriented Large Signal Average Models (COLSAMs) that approximate the slow dynamics manifold of the moving average values of the relevant state variables for Pulse-Width Modulated (PWM) dc to dc and three-phase to dc power converters is developed. These COLSAMs can cover continuous conduction mode (CCM) as well as discontinuous conduction mode (DCM) of operation and they are over one order of magnitude cheaper, computation wise, than the switching models. This method leads primarily to simple and effective input-output oriented models that represent transfer as well as loading characteristics of the converter. Sine these models consist of time invariant continuous functions they can be linearized at an operating point in order to obtain small-signal transfer functions that approximate the dynamics of the original PWM system around an orbit. The models are primarily intended for software circuit simulators (i.e. Spice derived types, Saber, Simplorer, etc), to take advantage of intrinsic features such as transient response, linearization, transfer function, harmonic distortion calculations, without having to change simulation environment. Nevertheless, any mathematics simulator for ordinary differential equations can be used with the set of equations obtained through application of Kirchoff's laws to the COLSAMs. Furthermore, the COLSAMs provide physical insight to help with power stage and control design, and they allow easy interconnection among themselves, as well as with switching models, for complete analysis at different scales (time, signal level, complexity; interconnectivity). A new average model for the Zero-Voltage Switched Full-Bridge (ZVS-FB) PWM Converter is developed with the above method and its high accuracy is verified with simulations from a switching behavioral model for several circuit component values for both CCM and DCM. Intrinsic positive damping effects and special delay characteristics created by an energy holding element in a saturable reactor-based Zero-Voltage Zero-Current Switched Full-Bridge (ZVZCS-FB) PWM converter are explained for the first time by a new average model. Its large signal predictions match very well those from switch model simulations whereas its small-signal predictions are verified with experimental results from 3.5 kW prototype modules. The latter are used in a multi-module converter to supply the DC power bus in and aircraft. The design of control loops for the converter is based on the new model and its linearization. The ZVZCS-FB PWM converter's average model above is extended to deal with interconnection issues and constraints in a Quasi-Single Stage (QSS) Zero-Voltage Zero-Current Switched (ZVZCS) Three-Phase Buck Rectifier. The new model reveals strong nonlinear transfer characteristics for standard Space Vector Modulation (SVM), which lead to high input current distortion and output voltage ripple inadmissible in telecommunications applications. Physical insight provided by this average model led to the development of a combined modified SVM and feed-forward duty-cycle compensation scheme to reliably minimize the output voltage ripple. Experimental results from a 6 kW prototype validate large signal model for standard and modified SVM, with and without duty-cycle compensation scheme. / Ph. D.

No description available.

Experimental research on high-power converters, particularly in an academic environment, faces severe infrastructural constraints. Usually, power source and loads of required ratings are not available. Further, more importantly, the energy consumption is huge. One possibility is to establish an experimental research platform, comprising of a network of high-power converters, through which power is circulated and which draws only the losses from the mains. This work deals with the establishment of a circulating power test set-up, comprising of two line-side PWM converters, inclusive of control and modulation methods for the two converters. Two types of circulating power test setups are developed. In the first setup, the converters are connected in parallel, on ac as well as dc sides, such that real and/or reactive power is circulated between them. In the second test setup, the dc buses of the converters are separated; hence, only reactive power circulation is possible. These setups are used to conduct heat-run tests with low energy expenditure on the PWM converters at various operating conditions up to power levels of 150 kVA. Further, these are used to validate analytically-evaluated thermal characteristics of high-power PWM converters. A safe thermal limit is derived for such converters in terms of apparent power (kVA) handled, power factor and switching frequency. The effects of voltage sag and of unequal current sharing between parallel IGBT modules on the safe thermal limit are studied. While the power drawn by the circulating-power setup from the grid is much lower than the ratings of the individual converters, the harmonic injection into the mains by the setup could be significant since the harmonics drawn by both converters tend to add up. This thesis investigates carrier interleaving to improve the waveform quality of grid current, drawn by the circulating-power test setup. The study of carrier interleaving is quite general and covers various applications of parallel-connected converters such as unity power factor rectification, static reactive power compensation and grid-connected renewable energy systems. In literature, carrier interleaving has been employed mainly for unity power factor rectifiers, sharing a common dc load equally. In such case, the fundamental components of the terminal voltages of the parallel converters are equal. However, when the power sharing between the two converters is unequal, or when power is circulated between the two converters, the terminal voltages of the two converters are not equal. A method to estimate rms grid current ripple, drawn by parallel-connected converters with equal and/or unequal terminal voltages, in a synchronous reference frame is presented. Further, the influence of carrier interleaving on the rms grid current ripple is studied. The optimum interleaving angle, which minimizes the rms grid current ripple under various applications, is investigated. This angle is found to be a function of modulation index of the converters in the equal terminal voltages case. In the unequal terminal voltages case, the optimum interleaving angle is shown to be a function of the average modulation index of the two parallel converters. The effect of carrier interleaving is experimentally studied on the reactive power circulation setup at different values of kVA and different dc bus voltages. The grid current ripple is measured for different values of interleaving angle. It is found experimentally that the optimum interleaving angle reduces the rms grid current ripple by between 37% and 48%, as compared without interleaving, at various operating conditions. Further, the reactive power circulation test set-up is used to evaluate and compare power conversion losses corresponding to different PWM techniques such as conventional space-vector PWM (CSVPWM), bus-clamping PWM (BCPWM) and advanced bus-clamping PWM methods for static reactive power compensator (STATCOM) application at high power levels. It is demonstrated theoretically as well as experimentally that an advanced bus-clamping PWM method, termed minimum switching loss PWM (MSLPWM), leads to significantly lower power conversion loss than CSVPWM and BCPWM techniques at a given average switching frequency.