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A highly parallel image processing computer architecture suitable for implementation in nanotechnologyTomlinson, Christopher David January 1999 (has links)
No description available.
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Development of the Carpal Wrist; a Symmetric, Parallel-Architecture Robotic WristCanfield, Stephen L. 21 May 1997 (has links)
This dissertation summarizes the research effort to develop a novel, three degree-of-freedom device that is ideally suited as a robotic wrist or platform manipulator. Because of its similarity to the human wrist, this invention has been named the "Carpal Wrist." Much like its natural counterpart, the Carpal Wrist has eight primary links, corresponding to the eight carpal bones of the human wrist, a parallel actuation scheme, similar to the flexor and extensor carpi muscles along the forearm, and an open interior passage, which forms a protected tunnel for routing hoses and electrical cables, much like the well-known carpal tunnel. The Carpal Wrist also has the significant advantages of possessing closed-form forward and inverse kinematic solutions and a large, dexterous workspace that is free of interior singularities (either considered separately or as part of a manipulator arm). As a result of its symmetric parallel architecture, the Wrist can handle a large payload capacity and can easily be adapted to a variety of actuation schemes. While parallel-architecture manipulators have long been recognized for their high-rigidity and large payload-to-weight capacity, few have been developed for application, primarily because of complications in kinematic and dynamic modeling. The mathematical model of any manipulator must be developed in order to allow the necessary motion control of the device. The mathematical model provides a mapping from the input space (called joint space) to the output space (called tool space) of the manipulator. Given a desired task in terms of motion of the robot tool, the mathematical model determines the required motor input parameters. Advanced manipulator performance through automatic control becomes possible when the model includes inertial or dynamic effects of the manipulator and tool. The research leading to the development of the Carpal Wrist is significant because it presents a complete kinematic and dynamic model of a parallel-architecture manipulator, and thus will provide significant improvement over current serial robot technology. This research was funded in part by TRIAD Investors Corporation (University Partners), Baltimore MD. / Ph. D.
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General Purpose Parallel Computation on a DNA SubstrateBlumberg, Andrew Justin 01 December 1996 (has links)
In this paper I describe and extend a new DNA computing paradigm introduced in Blumberg for building massively parallel machines in the DNA-computing models described by Adelman, Cai et. al., and Liu et. al. Employing only DNA operations which have been reported as successfully performed, I present an implementation of a Connection Machine, a SIMD (single-instruction multiple-data) parallel computer as an illustration of how to apply this approach to building computers in this domain (and as an implicit demonstration of PRAM equivalence). This is followed with a description of how to implement a MIMD (multiple-instruction multiple-data) parallel machine. The implementations described herein differ most from existing models in that they employ explicit communication between processing elements (and hence strands of DNA).
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Parallel Function Application on a DNA SubstrateBlumberg, Andrew Justin 01 December 1996 (has links)
In this paper I present a new model that employs a biological (specifically DNA -based) substrate for performing computation. Specifically, I describe strategies for performing parallel function application in the DNA-computing models described by Adelman, Cai et. al., and Liu et. al. Employing only DNA operations which can presently be performed, I discuss some direct algorithms for computing a variety of useful mathematical functions on DNA, culminating in an algorithm for minimizing an arbitrary continuous function. In addition, computing genetic algorithms on a DNA substrate is briefly discussed.
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Hybrid Electric Vehicle Control Strategy Based on Power Loss CalculationsBoyd, Steven J. 13 November 2006 (has links)
Defining an operation strategy for a Split Parallel Architecture (SPA) Hybrid Electric Vehicle (HEV) is accomplished through calculating powertrain component losses. The results of these calculations define how the vehicle can decrease fuel consumption while maintaining low vehicle emissions. For a HEV, simply operating the vehicle's engine in its regions of high efficiency does not guarantee the most efficient vehicle operation. The results presented are meant only to define a literal strategy; that is, an understanding as to why the vehicle should operate in a certain way under the given conditions. The literature review gives a background of hybrid vehicle control publications, and without the SPA HEV addressed or a hybrid analysis based on loss calculations between engine only and hybrid modes, there is a need for this paper. Once the REVLSE architecture and components are understood, the hybrid modes are explained. Then the losses for each hybrid mode are calculated, and both the conversion and assist efficiencies are detailed. The conversion efficiency represents the amount of additional fuel required to store a certain amount of energy in the battery, and this marginal efficiency can be higher than peak engine efficiency itself. This allows electric only propulsion to be evaluated against the engine only mode, and at low torques the electric motor is more efficient despite the roundtrip losses of the hybrid system. / Master of Science
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APPLYING PC-BASED EMBEDDED PROCESSING FOR REAL-TIME SATELLITE DATA ACQUISITION AND CONTROLForman, Michael L., Hazra, Tushar K., Troendly, Gregory M., Nickum, William G. 10 1900 (has links)
International Telemetering Conference Proceedings / October 25-28, 1993 / Riviera Hotel and Convention Center, Las Vegas, Nevada / The performance and cost effectiveness of em bedded processing has greatly enhanced the personal
computer's (PC) capability, particularly when used for real-time satellite data acquisition, telemetry
processing, command and control operations. Utilizing a transputer based parallel architecture, a
modular, reusable, and scalable control system is attainable. The synergism between the personal
computer and embedded processing results in efficient, low cost desktop workstations up to 1000
MIPS of performance.
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Arquiteturas para dilatação exata / Architectures for exact dilationLuppe, Maximiliam 14 March 2003 (has links)
A Transformada Distância é uma importante ferramenta para o processamento de imagens digitais. A partir dela podemos calcular a dimensão fractal e obter o esqueleto de um objeto. Estas operações são muito importantes na análise de formas e no reconhecimento de padrões. Porém poucas são as implementações em hardware específico para este processamento. Neste trabalho apresentamos a implementação de arquiteturas paralelas para a determinação da Transformada Distância e para a geração de esqueletos baseados no algoritmo de Dilatação Exata e Propagação de Rótulos. Propomos também uma implementação do algoritmo utilizando a biblioteca MPI para o processamento paralelo. / Distance Transform is an important tool for digital imaging processing. Using the Distance Transform it is possible to evaluate the fractal dimension and skeletons of objects. Fractal dimension and skeletons are very important in shape analysis and pattern recognition operations, few are the hardware implementation for these operations. In this work we present a parallel implementation based on the exact dilation and label propagation for the evaluation of the Distance Transform and skeletons generation. We also propose an algorithm implementation using the MPI library for parallel processing.
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Exploring vectorisation for parallel breadth-first search on an advanced vector processorParedes Lopez, Mireya January 2017 (has links)
Modern applications generate a massive amount of data that is challenging to process or analyse. Graph algorithms have emerged as a solution for the analysis of this data because they can represent the entities participating in the generation of large scale datasets in terms of vertices and their relationships in terms of edges. Graph analysis algorithms are used for finding patterns within these relationships, aiming to extract information to be further analysed. The breadth-first search (BFS) is one of the main graph search algorithms used for graph analysis and its optimisation has been widely researched using different parallel computers. However, the BFS parallelisation has been shown to be chal- lenging because of its inherent characteristics, including irregular memory access patterns, data dependencies and workload imbalance, that limit its scalability. This thesis investigates the optimisation of the BFS on the Xeon Phi, which is a modern parallel architecture provided with an advanced vector processor using a self-created development framework integrated with the Graph 500 benchmark. As a result, optimised parallel versions of two high-level algorithms for BFS were created using vectorisation, starting with the conventional top-down BFS algorithm and, building on this, leading to the hybrid BFS algorithm. The best implementations resulted in speedups of 1.37x and 1.33x, for a one million vertices graph, compared to the state-of-the-art, respectively. The hybrid BFS algorithm can be further used by other graph analysis algorithms and the lessons learned from vectorisation can be applied to other algorithms targeting the existing and future models of the Xeon Phi and other advanced vector architectures.
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FPGA BASED PARALLEL IMPLEMENTATION OF STACKED ERROR DIFFUSION ALGORITHMKora Venugopal, Rishvanth 01 January 2010 (has links)
Digital halftoning is a crucial technique used in digital printers to convert a continuoustone image into a pattern of black and white dots. Halftoning is used since printers have a limited availability of inks and cannot reproduce all the color intensities in a continuous image. Error Diffusion is an algorithm in halftoning that iteratively quantizes pixels in a neighborhood dependent fashion. This thesis focuses on the development and design of a parallel scalable hardware architecture for high performance implementation of a high quality Stacked Error Diffusion algorithm. The algorithm is described in ‘C’ and requires a significant processing time when implemented on a conventional CPU. Thus, a new hardware processor architecture is developed to implement the algorithm and is implemented to and tested on a Xilinx Virtex 5 FPGA chip. There is an extraordinary decrease in the run time of the algorithm when run on the newly proposed parallel architecture implemented to FPGA technology compared to execution on a single CPU. The new parallel architecture is described using the Verilog Hardware Description Language. Post-synthesis and post-implementation, performance based Hardware Description Language (HDL), simulation validation of the new parallel architecture is achieved via use of the ModelSim CAD simulation tool.
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Arquiteturas para dilatação exata / Architectures for exact dilationMaximiliam Luppe 14 March 2003 (has links)
A Transformada Distância é uma importante ferramenta para o processamento de imagens digitais. A partir dela podemos calcular a dimensão fractal e obter o esqueleto de um objeto. Estas operações são muito importantes na análise de formas e no reconhecimento de padrões. Porém poucas são as implementações em hardware específico para este processamento. Neste trabalho apresentamos a implementação de arquiteturas paralelas para a determinação da Transformada Distância e para a geração de esqueletos baseados no algoritmo de Dilatação Exata e Propagação de Rótulos. Propomos também uma implementação do algoritmo utilizando a biblioteca MPI para o processamento paralelo. / Distance Transform is an important tool for digital imaging processing. Using the Distance Transform it is possible to evaluate the fractal dimension and skeletons of objects. Fractal dimension and skeletons are very important in shape analysis and pattern recognition operations, few are the hardware implementation for these operations. In this work we present a parallel implementation based on the exact dilation and label propagation for the evaluation of the Distance Transform and skeletons generation. We also propose an algorithm implementation using the MPI library for parallel processing.
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