O desenvolvimento de programas paralelos e distribuídos encontra na programação baseada em passagem de mensagens uma abordagem eficaz para explorar adequadamente as características das máquinas de memória distribuída. Com o uso de clusters e de bibliotecas de suporte às trocas de mensagens, como o padrão MPI (Message Passing Interface), aplicações eficientes e economicamente viáveis podem ser construídas. Em tais sistemas, o tempo despendido nas comunicações constitui um importante fator de desempenho a ser considerado e requer a utilização de procedimentos e cuidados para a sua correta caracterização. Neste trabalho, modelos analíticos de primitivas de comunicação bloqueante MPI são desenvolvidos segundo uma metodologia de análise e predição apropriada. São tratadas algumas das principais operações ponto-a-ponto e coletivas e, utilizando técnicas de ajuste de curvas e tempos experimentais, o comportamento das primitivas de comunicação é representado em equações, possibilitando ainda a realização de análises e predições de desempenho em função do tamanho das mensagens e do número de processos envolvidos. Através de testes em um cluster de estações de trabalho, a precisão dos modelos elaborados é comprovada. Sendo a maioria dos erros percentuais inferiores a 8%, os resultados obtidos confirmam a validade do processo de modelagem. Além disso, o trabalho apresenta um conjunto de funções construídas com o objetivo de oferecer suporte a atividades de análise e predição, procurando facilitar e automatizar sua execução. / The development of parallel and distributed programs finds at message-passing programming a powerful approach to explore properly the distributed memory machines issues. Using clusters and message-passing libraries, as MPI standard (Message Passing Interface), efficient and cost effective applications can be constructed. In these systems, the time spent with communications means a important performance factor to be considered and its correct characterization requires procedures and cautions. In this work, analytic models for MPI blocking communication primitives are developed according one appropriate methodology for analysis and prediction. Some of the main peer-to-peer and collective operations are treated, and through curve fitting techniques and experimental times the behavior of the communication primitives is represented in equations, allowing also the accomplishment of performance analysis and prediction in function of the message length and the number of processes. Tests realized in a cluster of workstations prove the accuracy of the elaborated models. With most of errors within 8%, the obtained results show the validity of the modeling process. Also, the work presents a set of functions constructed with the purpose of support analysis and prediction activities, in order to facilitate and automate them.

A temática envolvendo o processamento de grandes quantidades de dados é um tema amplamente discutido nos tempos atuais, envolvendo seus desafios e aplicabilidade. Neste trabalho é proposta uma ferramenta de programação para desenvolvimento e um ambiente de execução para aplicações com grandes quantidades de dados. O uso da ferramenta visa obter melhor desempenho de aplicações neste cenário, explorando o uso de recursos físicos como múltiplas linhas de execução em processadores com diversos núcleos e a programação distribuída, que utiliza múltiplos computadores interligados por uma rede de comunicação, de forma que estes operam conjuntamente em uma mesma aplicação, dividindo entre tais máquinas sua carga de processamento. A ferramenta proposta consiste na utilização de blocos de programação, de forma que tais blocos sejam compostos por tarefas, e sejam executados utilizando o modelo produtor consumidor, seguindo um fluxo de execução definido. A utilização da ferramenta permite que a divisão das tarefas entre as máquinas seja transparente ao usuário. Com a ferramenta, diversas funcionalidades podem ser utilizadas, como o uso de ciclos no fluxo de execução ou no adiantamento de tarefas, utilizando a estratégia de processamento especulativo. Os resultados do trabalho foram comparados a duas outras ferramentas de processamento de grandes quantidades de dados, Hadoop e que o uso da ferramenta proporciona aumento no desempenho das aplicações, principalmente quando executado em clusters homogêneos. / The topic involving the processing of large amounts of data is widely discussed subject currently, about its challenges and applicability. This work proposes a programming tool for development and an execution environment for applications with large amounts of data. The use of the tool aims to achieve better performance of applications in this scenario, exploring the use of physical resources such as multiple lines of execution in multi-core processors and distributed programming, which uses multiple computers interconnected by a communication network, so that they operate jointly in the same application, dividing such processing among such machines. The proposed tool consists of the use of programming blocks, so that these blocks are composed of tasks, and the blocks are executed using the producer consumer model, following an execution flow. The use of the tool allows the division of tasks between the machines to be transparent to the user. With the tool, several functionalities can be used, such as cycles in the execution flow or task advancing using the strategy of speculative processing. The results were compared with two other frameworks, Hadoop and Spark. These results indicate that the use of the tool provides an increase in the performance of the applications, mostly when executed in homogeneous clusters.

Parmi les cibles architecturales susceptibles d'être utilisées pour réaliser un système de traitement sur puce (SoC), les architectures reconfigurables dynamiquement (ARD) offrent un potentiel de flexibilité et de dynamicité intéressant. Cependant ce potentiel est encore difficile à exploiter pour réaliser des applications massivement parallèles sur puce. Dans nos travaux nous avons recensé et analysé les solutions actuellement proposées pour utiliser les ARD et nous avons constaté leurs limites parmi lesquelles : l'utilisation d'une technologie particulière ou d'architecture propriétaire, l'absence de prise en compte des applications parallèles, le passage à l'échelle difficile, l'absence de langage adopté par la communauté pour l'utilisation de la flexibilité des ARD, ...Pour déployer une application sur une ARD il est nécessaire de considérer l'hétérogénéité et la dynamicité de l'architecture matérielle d'une part et la parallélisation des traitements d'autre part. L'hétérogénéité permet d'avoir une architecture de traitement adaptée aux besoins fonctionnels de l'application. La dynamicité permet de prendre en compte la dépendance des applications au contexte et de la nature des données. Finalement, une application est naturellement parallèle.Dans nos travaux nous proposons une solution pour le déploiement sur une ARD d'une application parallèle en utilisant les flots de conception standard des SoC. Cette solution est appelée MATIP (MPI Application Task Integreation Platform) et utilise des primitives du standard MPI version 2 pour effectuer les communications et reconfigurer l'architecture de traitement. MATIP est une solution de déploiement au niveau de la conception basée plate-forme (PBD).La plateforme MATIP est modélisée en trois couches : interconnexion, communication et application. Nous avons conçu chaque couche pour que l'ensemble satisfasse les besoins en hétérogénéité et dynamicité des applications parallèles . Pour cela MATIP utilise une architecture à mémoire distribuée et exploite le paradigme de programmation parallèle par passage de message qui favorise le passage à l'échelle de la plateforme.MATIP facilite le déploiement d'une application parallèle sur puce à travers un template en langage Vhdl d'intégration de tâches. L'utilisation des primitives de communication se fait en invoquant des procédures Vhdl.MATIP libère le concepteur de tous les détails liés à l'interconnexion, la communication entre les tâches et à la gestion de la reconfiguration dynamique de la cible matérielle. Un démonstrateur de MATIP a été réalisée sur des FPGA Xilinx à travers la mise en oe{}uvre d'une application constituée de deux tâches statiques et deux tâches dynamiques. MATIP offre une bande passante de 2,4 Gb/s et une la latence pour le transfert d'un octet de 3,43 µs ce qui comparée à d'autres plateformes MPI (TMD-MPI, SOC-MPI, MPI HAL) met MATIP à l'état de l'art. / Among the architectural targets that could be buid a system on chip (SoC), dynamically reconfigurable architectures (DRA) offer interesting potential for flexibility and dynamicity . However this potential is still difficult to use in massively parallel on chip applications. In our work we identified and analyzed the solutions currently proposed to use DRA and found their limitations including: the use of a particular technology or proprietary architecture, the lack of parallel applications consideration, the difficult scalability, the lack of a common language adopted by the community to use the flexibility of DRA ...In our work we propose a solution for deployment on an DRA of a parallel application using standard SoC design flows. This solution is called MATIP ( textit {MPI Application Platform Task Integreation}) and uses primitives of MPI standard Version 2 to make communications and to reconfigure the MP-RSoC architecture . MATIP is a Platform-Based Design (PBD) level solution.The MATIP platform is modeled in three layers: interconnection, communication and application. Each layer is designed to satisfies the requirements of heterogeneity and dynamicity of parallel applications. For this, MATIP uses a distributed memory architecture and utilizes the message passing parallel programming paradigm to enhance scalability of the platform.MATIP frees the designer of all the details related to interconnection, communication between tasks and management of dynamic reconfiguration of the hardware target. A demonstrator of MATIP was performed on Xilinx FPGA through the implementation of an application consisting of two static and two dynamic hardware tasks. MATIP offers a bandwidth of 2.4 Gb / s and latency of 3.43 microseconds for the transfer of a byte. Compared to other MPI platforms (TMD-MPI, SOC-MPI MPI HAL), MATIP is in the state of the art.

Esta dissertação apresenta o PMPI, uma implementação do padrão MPI em plataformas heterogêneas. Diferentemente de outras implementações de MPI, o PMPI permite que a aplicação paralela seja realizada num sistema multi-plataforma, e que programas em linguagens de programação diferentes participem da mesma computação. PMPI é construído sobre o Dotnet Framework. Com o PMPI, os nós de processamento chamam funções MPI que são executadas transparentemente em outros nós participantes da computação paralela pela rede de comunicação. O PMPI pode atravessar múltiplos domínios administrativos distribuídos geograficamente. Para os programadores, o grid se parece como uma computação MPI local. O modelo de computação é indistinguível da computação MPI padrão. Esta dissertação estuda a implementação de PMPI com o Microsoft Dotnet Framework e com o MONO para prover uma biblioteca que suporta ambiente de multi-linguagens de programação e multi-plataformas. São analisados os resultados obtidos dos testes executados em sistemas heterogêneos usando PMPI. Os resultados obtidos mostram que a implementação PMPI é uma solução viável, possuindo várias vantagens que ainda podemos explorar melhor. / This dissertation describes PMPI, an implementation of the MPI standard on a heterogeneous platform. Unlike other MPI implementations, PMPI permits MPI computation to run on a multiplatform system. In addition, PMPI permits programs executing on different nodes to be written in different programming languages. PMPI is build on the top of Dotnet framework. With PMPI, nodes call MPI functions that are transparently executed on the participating nodes across the network. PMPI can span multiple administrative domains distributed geographically. To programmers, the grid looks like a local MPI computation. The model of computation is indistinguishable from that of standard MPI computation. This dissertation studies the implementation of PMPI with Microsoft Dotnet framework and MONO Dotnet framework to provide a common layer for a multiprogramming language multiplatform MPI library. Results obtained from tests running PMPI on a heterogeneous system are analyzed. The obtained results show that PMPI implementation is feasible and has many advantages that can be explored.

Esse trabalho propõe uma solução de um Data Warehouse distribuído para implementação de um sistema de CRM, Customer Relationship Management, com o objetivo de uso no ambiente bancário possibilitando que ações de relacionamento com clientes sejam planejadas e implementadas. É proposta uma arquitetura para implementação de um Data Warehouse em ambiente distribuído, utilizando programação paralela. Com o aumento no volume de dados armazenados nos Data Warehouse, as arquiteturas tradicionais exigem processadores e sistemas de entrada e saída cada vez mais robustos em termos de desempenho. Isso fica mais bem caracterizado quando são executadas procuras complexas (Ad hoc). A utilização de ambientes distribuídos em conjunto com programação paralela é uma alternativa para redução de custo e aumento de desempenho. É apresentada, aqui, uma proposta de arquitetura de Data Warehouse distribuído, integrado ao uso de programação paralela. / This lecture proposes a solution for Data Warehouse in an distributed environment for implementation of a CRM, Customer Relationship Management in a banking system. It\'s possible to create, plan and implement relationship actions with clients. Architecture is proposed for implementation of a Data Warehouse in a distributed environment, using parallel programming. With the increase of volume of data stored in Data Warehouse, the traditional architectures needs high performance in terms of processors and input and output systems. This kind of problem is well characterized when high complex queries (Ad hoc) is performed. Using distributed environment, together with parallel programming is a good choice to increase the performance and reduce cost. It\'s presented, here, a proposal for architecture of distributed Data Warehouse, integrated with the use of parallel programming.

O Tanque de Provas Numérico (TPN) é um laboratório pioneiro em hidrodinâmica aplicada e fruto de uma colaboração entre a indústria brasileira de petróleo (PETROBRAS S.A.) e as principais instituições de pesquisa do país. Seu principal objetivo é atuar como parceiro da indústria offshore e de petróleo, colaborando para a obtenção da autossuficiência da produção nacional de petróleo como uma poderosa ferramenta para projeto e análise de sistemas flutuantes de produção de óleo e gás. O coração do TPN é um cluster de computadores SMP que é hoje um dos maiores agrupamentos do Brasil para fins de pesquisa. Um dos focos de atenção do TPN é a aplicação do Moving Particles Semi-implicit Method (MPS) na exploração de soluções para muitos problemas de Engenharia. Por trabalhar sem a necessidade do uso de malhas (método tradicional Euleriano), o método tem diversas aplicações na simulação de corpos flutuantes e na hidrodinâmica aplicada, sendo atualmente utilizado para realização de estudos sobre a influência do movimento de ondas em navios; simulações de fenômenos que envolvem fragmentações; superfícies livres; grandes deformações; dinâmica de fluidos em condições extremas, como é o caso em processos prospecção do petróleo onde muitas vezes é difícil e economicamente inviável fazer ensaios físicos. Devido ao grande número de partículas utilizadas na simulação de sistemas complexos pelo método MPS, é necessário aproveitar de forma eficiente os recursos computacionais disponíveis para a análise de modelos com o refinamento adequado às aplicações práticas. Com tera-FLOPS disponíveis na rede cluster do TPN para modelagem computacional, há uma grande necessidade de uma solução computacional paralela altamente escalonável que, além disto, seja fácil de manutenção e extensibilidade. Dentro desta linha de pesquisa, foi desenvolvida uma solução com essas características através do emprego de modernas técnicas de engenharia de software. / The Numerical Offshore Tank (TPN) is a pioneer laboratory in applied hydrodynamics and result of collaboration between the Brazilian oil (Petrobras SA) and the major research institutions in the country. Its main purpose is to act as a partner of industry and offshore oil, contributing to the achievement of self-sufficiency of domestic oil production as a powerful tool for design and analysis of floating production systems for oil and gas. The heart of TPN is a cluster of SMP computers that is now one of the largest groupings of Brazil for research purposes. One focus of attention of TPN is the application of Moving Particles Semi-implicit Method (MPS) in exploring solutions to many engineering problems. By working without the use of mesh (Eulerian traditional method), the method has several applications in the simulation of floating bodies and applied hydrodynamics, currently being used for studies on the influence of the movement of ships in waves; simulations of phenomena involving fragmentation; free surfaces, large deformations; fluid dynamics in extreme conditions, as is the case in processes where petroleum exploration is often difficult and uneconomical to do physical tests. Due to the high number of particles used in the simulation of complex systems by the MPS method, it is necessary to efficiently take advantage of the computational resources available for the analysis of models with the refinement suitable for practical applications. With tera-FLOPS available in the TPN network cluster for computational modeling, there is a great need for a parallel highly scalable solution which, moreover, must be easy maintenance and extensibility. Within this line of research, we developed a solution with these characteristics through the use of modern software engineering techniques.

Empresas estão procurando reduzir seus custos e aumentar seu desempenho e competitividade. Neste cenário de redução de custos, a logística colaborativa pode ser uma aliada. Numa rede complexa, onde embarcadores muitas vezes nem sabem da existência de outros embarcadores com demandas complementares, existe um potencial de sinergia e redução de custos através da diminuição de deslocamentos de veículos sem carga, ou seja, deslocamentos para reposicionar os veículos. Visando essa redução, o Problema de Cobertura de Rotas (PCR), que tem como objetivo cobrir rotas no mínimo custo, une as demandas de frete de vários embarcadores e tenta minimizar os deslocamentos sem cargas (reposicionamentos), reduzindo assim o custo total de toda a rede dos embarcadores envolvidos. Esta pesquisa propõe um modelo e uma heurística para resolver, em grande escala através de programação paralela, uma expansão do PCR. / Companies are looking to reduce costs and improve performance and competitiveness. In this cost-cutting scenario, collaborative logistics can be an ally. In a complex network where shippers often do not know of the existence of other shippers with complementary demands, there is potential for synergy and cost savings by reducing unloaded travelling of vehicles, i.e, the distance and time to reposition the vehicles\'. Towards that reduction, the Lane Covering Problem (LCP), which aims to cover at least cost routeslinks the various shippers\' demands of freight and tries to minimize operations without loads (repositioning), thus reducing the total cost of the entire network for involved shippers. This research proposes a model and an heuristic to solve, in large-scale through parallel programming, an expansion of the PCR.

Este trabalho aborda alguns conceitos e definições de processamento paralelo, que são aplicados a paralelização automática, e também às análises e condições para as dependências dos dados, de modo a aplicarmos os métodos de paralelização: Hiperplano, Transformação Unimodular, Alocação de Dados Sem Comunicação e Particionamento & Rotulação. Desta forma, transformamos um programa seqüencial em seu equivalente paralelo. Utilizando-os em um sistema de memória distribuída com comunicação através da passagem de mensagem MPI (Message-Passing Interface), e obtemos algumas métricas para efetuarmos as avaliações/comparações entre os métodos. / This work invoke some concepts and definitions about parallel processing, applicable in the automatic parallelization, and also the analysis and conditions for the data dependence, in order to apply the methods for parallelization: Hyperplane, Unimodular Transformation, Communication-Free Data Allocation and Partitioning & Labeling. On this way, transform a sequential program into an equivalent parallel one. Applying these programs on the distributed-memory system with communication through message-passing MPI (Message-Passing Interface), and we obtain some measurements for the evaluations/comparison between those methods.

by Kei-Fu Mak. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1995. / Includes bibliographical references (leaves 103-108). / Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Flynn's Classification --- p.1 / Chapter 1.2 --- Parallel Computation Approaches --- p.2 / Chapter 1.3 --- Architecture Issues --- p.2 / Chapter 1.4 --- Communications --- p.3 / Chapter 1.5 --- Object Oriented Models --- p.4 / Chapter 1.6 --- Parallel Objects --- p.5 / Chapter 1.7 --- Related Works --- p.6 / Chapter 1.7.1 --- Actor Model --- p.6 / Chapter 1.7.2 --- Nested Object --- p.7 / Chapter 1.7.3 --- Nested Transaction --- p.7 / Chapter 1.7.4 --- C++* --- p.8 / Chapter 1.8 --- Summary --- p.8 / Chapter 2 --- Design Issues --- p.10 / Chapter 2.1 --- Goals --- p.11 / Chapter 2.1.1 --- Parallel Model --- p.11 / Chapter 2.1.2 --- Portability --- p.11 / Chapter 2.1.3 --- Class Extension --- p.12 / Chapter 2.2 --- Arguments --- p.12 / Chapter 2.2.1 --- Single versus Multiple Thread Objects --- p.12 / Chapter 2.2.2 --- Active versus Passive Objects --- p.13 / Chapter 2.2.3 --- Synchronous versus Asynchronous Communications --- p.13 / Chapter 2.2.4 --- Architecture Dependence versus Independence --- p.13 / Chapter 2.3 --- Class Structure --- p.14 / Chapter 2.3.1 --- Kernel Class --- p.14 / Chapter 2.3.2 --- Concurrent Class --- p.15 / Chapter 2.3.3 --- Share Class --- p.15 / Chapter 3 --- Execution Model --- p.17 / Chapter 3.1 --- Parallel Objects --- p.19 / Chapter 3.1.1 --- Initialization Phase --- p.19 / Chapter 3.1.2 --- Communication System --- p.21 / Chapter 3.1.3 --- Phase Transition --- p.22 / Chapter 3.1.4 --- Outstanding Requests --- p.24 / Chapter 3.2 --- Concurrent Object --- p.25 / Chapter 3.2.1 --- Service Methods --- p.26 / Chapter 3.2.2 --- Immutable Methods --- p.26 / Chapter 3.2.3 --- Urgent Methods --- p.27 / Chapter 3.2.4 --- Phase Transitional Methods --- p.28 / Chapter 3.2.5 --- Phase Immutable Methods --- p.29 / Chapter 3.3 --- Share Object --- p.30 / Chapter 3.3.1 --- Concurrency Control --- p.31 / Chapter 3.3.2 --- Ticket System --- p.33 / Chapter 3.4 --- Summary --- p.34 / Chapter 4 --- Kernel and Implementation --- p.37 / Chapter 4.1 --- Kernel Components --- p.37 / Chapter 4.1.1 --- Functionality --- p.38 / Chapter 4.1.2 --- Kernel Structure --- p.42 / Chapter 4.1.3 --- Kernel Interface --- p.43 / Chapter 4.1.4 --- Kernel Composition --- p.44 / Chapter 4.2 --- Implementation Issues --- p.46 / Chapter 4.2.1 --- Precompiler --- p.46 / Chapter 4.2.2 --- Object Manager --- p.49 / Chapter 4.2.3 --- Communication System --- p.51 / Chapter 4.2.4 --- Method Invocation --- p.52 / Chapter 4.2.5 --- Restrictions --- p.55 / Chapter 4.3 --- Summary --- p.55 / Chapter 5 --- Evaluation --- p.58 / Chapter 5.1 --- Case Study I --- p.58 / Chapter 5.2 --- Case Study II --- p.63 / Chapter 5.3 --- Overall Evaluation --- p.66 / Chapter 5.4 --- Summary --- p.70 / Chapter 6 --- Conclusion --- p.72 / Chapter A --- ACCEL Header Files --- p.78 / Chapter A.1 --- OBJID.H --- p.78 / Chapter A.2 --- OBJKERN.H --- p.80 / Chapter A.3 --- OBJCONC.H --- p.83 / Chapter A.4 --- OBJSHARE.H --- p.84 / Chapter B --- Case Studies --- p.87 / Chapter B.1 --- Gaussian Elimination --- p.87 / Chapter B.2 --- One Open End Tube --- p.96 / Bibliography --- p.103

Lau, Wai Shing. / Thesis submitted in: November 2006. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2007. / Includes bibliographical references (leaves 85-94). / Abstracts in English and Chinese. / Abstract --- p.i / Acknowledgement --- p.iv / Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Field Programmable Gate Arrays --- p.2 / Chapter 1.2 --- FPGA technology mapping problem --- p.3 / Chapter 1.3 --- Motivations --- p.5 / Chapter 1.4 --- Contributions --- p.6 / Chapter 1.5 --- Thesis Organization --- p.9 / Chapter 2 --- Background Study --- p.11 / Chapter 2.1 --- Deterministic approach to technology mapping problem --- p.11 / Chapter 2.1.1 --- FlowMap --- p.12 / Chapter 2.1.2 --- DAOMap --- p.14 / Chapter 2.2 --- Stochastic approach --- p.15 / Chapter 2.2.1 --- Bio-Inspired Methods for Multi-Level Combinational Logic Circuit Design --- p.15 / Chapter 2.2.2 --- A Survey of Combinational Logic Circuit Representations in stochastic algorithms --- p.17 / Chapter 2.3 --- Genetic Parallel Programming --- p.20 / Chapter 2.3.1 --- Accelerating Phenomenon --- p.22 / Chapter 2.4 --- Chapter Summary --- p.23 / Chapter 3 --- A GPP based Logic Circuit Synthesizer --- p.24 / Chapter 3.1 --- Overall system architecture --- p.25 / Chapter 3.2 --- Multi-Logic-Unit Processor --- p.26 / Chapter 3.3 --- The Genotype of a MLP program --- p.28 / Chapter 3.4 --- The Phenotype of a MLP program --- p.31 / Chapter 3.5 --- The Evolution Engine --- p.33 / Chapter 3.5.1 --- The Dual-Phase Approach --- p.33 / Chapter 3.5.2 --- Genetic operators --- p.35 / Chapter 3.6 --- Chapter Summary --- p.38 / Chapter 4 --- MLP in hardware --- p.39 / Chapter 4.1 --- Motivation --- p.39 / Chapter 4.2 --- Hardware Design and Implementation --- p.40 / Chapter 4.3 --- Experimental Settings --- p.43 / Chapter 4.4 --- Experimental Results and Evaluations --- p.46 / Chapter 4.5 --- Chapter Summary --- p.50 / Chapter 5 --- Feasibility Study of Multi MLPs --- p.51 / Chapter 5.1 --- Motivation --- p.52 / Chapter 5.2 --- Overall Architecture --- p.53 / Chapter 5.3 --- Experimental settings --- p.55 / Chapter 5.4 --- Experimental results and evaluations --- p.59 / Chapter 5.5 --- Chapter Summary --- p.59 / Chapter 6 --- A Hybridized GPPLCS --- p.61 / Chapter 6.1 --- Motivation --- p.62 / Chapter 6.2 --- Overall system architecture --- p.62 / Chapter 6.3 --- Experimental settings --- p.64 / Chapter 6.4 --- Experimental results and evaluations --- p.66 / Chapter 6.5 --- Chapter Summary --- p.70 / Chapter 7 --- A Memetic GPPLCS --- p.71 / Chapter 7.1 --- Motivation --- p.72 / Chapter 7.2 --- Overall system architecture --- p.72 / Chapter 7.3 --- Experimental settings --- p.76 / Chapter 7.4 --- Experimental results and evaluations --- p.77 / Chapter 7.5 --- Chapter Summary --- p.80 / Chapter 8 --- Conclusion --- p.82 / Chapter 8.1 --- Future work --- p.83 / Bibliography --- p.85