Electrolessly deposited CoWP capping layers have been demonstrated to effectively reduce electromigration of Cu at the interconnect/dielectric-barrier cap interface while reducing resistivity relative to SiCN. However, as device dimensions scale, the need for alternative methods for the selective deposition of sub-5 nm, ultrathin, conformal Co capping layers is apparent. To develop methods for area-selective atomic layer deposition (AS-ALD) of Co caps for next-generation Cu interconnects, the ALD behavior of bis(N-tert-butyl-N’-ethylpropionamidinato) cobalt(II) (CoAMD) is evaluated on Cu, SiO₂, and a porous low-k ( ~2.6) dielectric, CDO. The first and second ALD half reactions of CoAMD on the respective substrates is evaluated with H₂ coreactant by adsorbing the precursor on the substrates under ALD cycling conditions at 265 °C with and without coreactant exposure. The adsorption studies indicate that CoAMD preferentially deposits most on Cu and least on CDO. Further, CoAMD, like other amidinate precursors, readily dissociates on the Cu transition metal surface but the ultimate per-cycle coverage is self-limited by the slow desorption of amidinate ligands and fragments from the Cu surface. Co films deposited by ALD from CoAMD on Cu at 265 °C indicate that Co burrows into the lower energy Cu surface as the film grows in order to reduce the free surface energy. The Cu remains as a surfactant-like layer on the topmost Co surface up to film thicknesses of at least 16 nm. Moreover, considerable intermixing at the Co/Cu interface and Cu concentration several nm into the Co films are observed indicating high surface mobility of the two materials and Cu diffusion at polycrystalline Co grain boundaries. Finally, employing low-tempurature ALD and selectively passivating the dielectric surfaces with OH targeting passivants leads to enhanced selectivity of CoAMD for deposition on Cu versus SiO₂ and CDO. Depositing Co from CoAMD on Cu and CDO at 165 °C after 500 kTorr-s exposure to trimethylchlorosilane at 50 °C leads to a 30:1 preference for Co accumulation on Cu, a twelve times improvement compared to deposition on cleaned Cu and CDO at 265 °C. / text

No description available.

A busca de melhores características elétricas, acompanhada de crescentes evoluções tecnológicas e novos materiais passivantes para junções semicondutoras vem sendo bastante pesquisados nas últimas décadas. Existem dois tipos de passivação: por filmes finos ou por filmes espessos. No primeiro caso são realizadas deposições de óxido de silício, carbeto de silício, nitreto de silício, enquanto que no segundo caso faz-se uso de materiais como borrachas de silicone ou vidros. A escolha entre filme fino e filme espesso está relacionada diretamente ao custo/benefício e as características do dispositivo final. Na indústria de semicondutores de potência opta-se pelos filmes espessos devido às grandes dimensões dos dipositivos e ao custo do processo empregado nas linhas de produção. Os passivantes mais utilizados em semicondutores de potência são borrachas de silicone e vidros. Os vidros inorgânicos são mais estáveis a temperaturas elevadas do que as borrachas de silicone. Neste trabalho procuramos desenvolver e controlar um processo de passivação a vidro em junções semicondutoras de dispositivos de potência para que seja usado numa linha de produção de diodos retificadores de alta estabilidade. Existem diferentes tipos de vidros para esta aplicação como os vidros de Al-Pb-B-Si e os vidros de Zn-B-Si. No presente trabalho foi realizada uma comparação entre a influência da composição química dos vidros, a granulometria do pó (frita) deste vidro, com a tensão de ruptura e corrente de fuga dos diodos levando em conta o rendimento do processo. Observou-se que fritas de vidro de Al-Pb-B-Si com granulometrias mais finas resultam em tensões de ruptura maiores com um rendimento de produção de até 33% superior aos demais casos. As correntes de fuga , à temperatura ambiente, para fritas de vidro de Zn-B-Si e Al-Pb-B-Si com diferentes granulometrias, se mostrou pràticamente a mesma. / The search for better electrical properties, new passivating materials for semiconductors junctions and the process of obtaining those ones have being studied intensively in the latest decades. There are two types of passivation layers: thick film and thin film. The first one is obtained by the deposition of silicon oxides, silicon nitride or silicon carbide, while in the second one is obtained through the application of silicon rubber or glass over the exposed juntion. The decision of using one or another depends on cost/benefit and desired electrical properties of the devices. In the semiconductor power industry the thick films are frequently used because the devices dimensions are large and the cost of these processes are cheaper than those of thin films. Silicon rubber and glass are widely used by this industry. The silicon rubbers are materials that show temperature resistance up to 2000C. The inorganic glasses are more stables at high temperatures. In this work we developed a process of glass passivation for power semiconductors devices, controlled this process and it is in use in a production line of a semiconductor power device industry. There are a few glasses for this application where the two more widely used are Al-B-Pb-Si glass and Zn-B-Si glass. In this work it was compared the influence of the glass chemical composition as well as frit grain size of the glass, over the breakdown voltage and leakage current of the devices. It was observed that glasses of Al-B-Pb-Si with smaller grain size gave better values of breakdown voltage with a production yield bigger up to 33%. It was obtained leakage current values of the same magnitude, at ambient temperature, for both kinds of glasses with different grain sizes and composition.

This work examined the use of passivation polymers in the conservation of severely damaged paper. It specifically investigated the use of this functional polymer treatment to address the issues of damage to paper caused by waterlogging, mold, and internal acidity. Several experiments were designed and conducted to examine the effects of the polymers in the conservation of papers compromised by these conditions. Paper artifacts from the Bonfire Memorabilia Collection were selected and conserved using treatment protocols that included the use of the passivation polymers. The conservation of some of the damaged papers from this culturally important site demonstrated the effectiveness of the polymer treatment in real-world conservation situations. This dissertation established that the use of passivation polymers adds strength and stability to severely damaged paper.

Deposition of thin material films by sputtering is an increasingly common process in the field of silicon (Si)-based photovoltaics. One of the recently developed sputter-deposited materials applicable to Si photovoltaics comprises Si nanocrystals (NCs) embedded in a Si-based dielectric. The particular case of Si nanocrystals in a Silicon Dioxide (SiO2) matrix was studied by fabricating metal-insulator-semiconductor (MIS) devices, in which the insulating layer consists of a single layer of Si NCs in SiO2 deposited by sputtering (Si:NC-MIS devices). These test structures were subjected to impedance measurements. The presence of Si NCs was found to result in two distinct capacitance peaks. The first of these peaks is attributable to the small signal response of states at the insulator/substrate interface, enhanced by the presence of fixed charge associated with the NC layer. The second peak, which occurs without precedent, is due to external inversion layer coupling, in conjunction with a transition between tunnel-limited and semiconductor-limited electron current. Si:NC-MIS devices are also potential test structures for energy-selective contacts, based on SiO2/Si NC/SiO2 double barrier structures fabricated by sputtering. Using a one-dimensional model, current-voltage (I-V) curve simulations were performed for similar structures, in which the Si NCs are replaced by a Si quantum well (QW). The simulations showed that for non-degenerately doped Si substrates, the density of defects in the SiO2 layers can strongly influence the position of I-V curve structure induced by QW quasi-bound states. Passivation of crystalline Si (c-Si) surfaces by sputter-deposited dielectric films is another major application of sputtering for Si photovoltaics. This application was explored for the cases of sputtered SiO2 and hydrogenated Silicon Oxy-Carbide (SiOC:H). For the case of sputtered SiO2, an effective surface recombination velocity of 146 cm/s was achieved for an injection level of 1E15 cm???3. The investigated SiOC:H films were found to be unsuitable for surface passivation of Si, however their passivation performance could be slightly improved by first coating the Si surface with a chemically-grown or sputtered SiO2 layer. The investigations performed into specific aspects of sputter-deposited SiO2, Si NCs, and SiOC:H have highlighted important properties of these films, and confirmed the effectiveness of sputtering as a deposition technology for Si photovoltaics.

A busca de melhores características elétricas, acompanhada de crescentes evoluções tecnológicas e novos materiais passivantes para junções semicondutoras vem sendo bastante pesquisados nas últimas décadas. Existem dois tipos de passivação: por filmes finos ou por filmes espessos. No primeiro caso são realizadas deposições de óxido de silício, carbeto de silício, nitreto de silício, enquanto que no segundo caso faz-se uso de materiais como borrachas de silicone ou vidros. A escolha entre filme fino e filme espesso está relacionada diretamente ao custo/benefício e as características do dispositivo final. Na indústria de semicondutores de potência opta-se pelos filmes espessos devido às grandes dimensões dos dipositivos e ao custo do processo empregado nas linhas de produção. Os passivantes mais utilizados em semicondutores de potência são borrachas de silicone e vidros. Os vidros inorgânicos são mais estáveis a temperaturas elevadas do que as borrachas de silicone. Neste trabalho procuramos desenvolver e controlar um processo de passivação a vidro em junções semicondutoras de dispositivos de potência para que seja usado numa linha de produção de diodos retificadores de alta estabilidade. Existem diferentes tipos de vidros para esta aplicação como os vidros de Al-Pb-B-Si e os vidros de Zn-B-Si. No presente trabalho foi realizada uma comparação entre a influência da composição química dos vidros, a granulometria do pó (frita) deste vidro, com a tensão de ruptura e corrente de fuga dos diodos levando em conta o rendimento do processo. Observou-se que fritas de vidro de Al-Pb-B-Si com granulometrias mais finas resultam em tensões de ruptura maiores com um rendimento de produção de até 33% superior aos demais casos. As correntes de fuga , à temperatura ambiente, para fritas de vidro de Zn-B-Si e Al-Pb-B-Si com diferentes granulometrias, se mostrou pràticamente a mesma. / The search for better electrical properties, new passivating materials for semiconductors junctions and the process of obtaining those ones have being studied intensively in the latest decades. There are two types of passivation layers: thick film and thin film. The first one is obtained by the deposition of silicon oxides, silicon nitride or silicon carbide, while in the second one is obtained through the application of silicon rubber or glass over the exposed juntion. The decision of using one or another depends on cost/benefit and desired electrical properties of the devices. In the semiconductor power industry the thick films are frequently used because the devices dimensions are large and the cost of these processes are cheaper than those of thin films. Silicon rubber and glass are widely used by this industry. The silicon rubbers are materials that show temperature resistance up to 2000C. The inorganic glasses are more stables at high temperatures. In this work we developed a process of glass passivation for power semiconductors devices, controlled this process and it is in use in a production line of a semiconductor power device industry. There are a few glasses for this application where the two more widely used are Al-B-Pb-Si glass and Zn-B-Si glass. In this work it was compared the influence of the glass chemical composition as well as frit grain size of the glass, over the breakdown voltage and leakage current of the devices. It was observed that glasses of Al-B-Pb-Si with smaller grain size gave better values of breakdown voltage with a production yield bigger up to 33%. It was obtained leakage current values of the same magnitude, at ambient temperature, for both kinds of glasses with different grain sizes and composition.

Interfaces between graphene and dissimilar materials are needed for making devices, but those interfaces also modify the graphene properties due to charge transfer and/or symmetry breaking. In this dissertation we investigate the technology of preparing graphene on different substrates and how the substrate influences the electronic properties of graphene. Synthesizing large area graphene on late transition metals by chemical vapor deposition is a promising approach for many applications of graphene. Among the transition metals, nickel has advantages because the good lattice match and strong interaction between graphene/Ni(111) enables the synthesis of a single domain of graphene on Ni(111). However, the nickel substrate alters the electronic structure of graphene due to substrate induced symmetry breaking and chemical interaction of the metal d-band with graphene. Similar chemical interactions are observed for other transition metals with a d-band close to the Fermi-level. On the other hand, graphene mainly physisorbs on transition metals with a lower lying d-band center. In this thesis we investigate the growth of graphene on nickel by vacuum chemical vapor deposition (CVD). In particular, we present our studies of graphene synthesis on Ni(111) substrates. We demonstrate the self-limiting monolayer of single domain of graphene can be grown on single crystal Ni(111). Our studies also show that selective twisted bilayer graphene can be grown by carbon segregation on Ni(111)-films. To modify the interaction between graphene and the nickel substrate we investigated the intercalation of tin. In the case of graphene physisorbed on weakly interacting metals, some charge doping of graphene occurs due to work function differences between graphene and the metal. Using x-ray photoemission spectroscopy (XPS) we correlate the charge doping of graphene on different metals with the C-1s binding energy. This study demonstrate that XPS can be used to determine the Fermi-level in graphene. While metal intercalation can alter the interaction with the substrate it does not avoid overlap of electronics states at the Fermi-level. Therefore a band gap material should be inserted between the graphene and the metal growth substrate (in this case Pt(111)). This is accomplished by oxidation of intercalated iron at elevated oxygen pressure. We demonstrate that a 2D-FeO layer can be formed in between graphene and the Pt(111) surface. We discuss the role of the 2D-FeO moiré-structure on the nanoscale electronic properties of graphene. To date good quality graphene can only be grown by CVD on late transition metals. To obtain graphene on other substrates the graphene can be transferred mechanically from a growth substrate to various other materials. We demonstrate that this transfer can also be achieved to tungsten, an early transition metal that easily forms a carbide. In our studies to avoid oxidation of the tungsten substrate and reaction of the graphene with the tungsten substrate under thermal treatment, protection of the W(110) surface with sulfur has been explored. For the integration of graphene into device architectures, graphene has to be interfaced with high-κ dielectrics. However, because of the inert nature of graphene, most high-κ do not wet graphene and thus preventing formation of contiguous dielectric layers. Yttrium oxide (Y2O3) has been demonstrated to be an exception and we characterized the growth of Y2O3 on various metal supported graphene and graphene transferred to SiO2. We showed that such a Y2O3 layer can also act as seeding layer for the growth of alumina, which is the preferred dielectric material in many applications. Finally, we investigate the charge doping of graphene in a metal/graphene/dielectric stack and find that the charge doping of graphene is a function of both the work function of the metal as well as the covering dielectric. Thus the dielectric layer can modify the charge doping of graphene at a metal contact.

The scanning tunneling microscopy is used to study the morphology of Tl adlayer in various stages of Tl desorption from the Si(111) surface and to study behaviour of various adsorbates on the Si(111)/Tl-(1 × 1). The utilization of thallium layer for passivation of the Si(111) was examined closely for various adsorbates. Manganese, aluminium, indium and tin layers which were directly deposited onto the Si(111)-(7 × 7) were compared with the layers prepared by deposition of adsorbate onto the passivating layer after the subsequent thermal desorption of Tl (after annealing at ≈ 400◦ C). Examined adsorbates exhibited signs of extremely high diffusivity and weak bond with the surface Si(111)/Tl- (1 × 1). The passivating layer was stable against the adsorbates.The application of thallium in the role of surfactant caused lowering of temperature and coverage needed for the preparation of reconstructions which were observed on the surfaces prepared by the direct deposition of adsorbate. 1

Silicon Carbide (SiC) is a wide bandgap semiconductor that is currently of major interest for power electronics applications. SiC-based semiconductor devices and circuits are presently being developed for use in high-temperature, high-power, and/or high-radiation conditions under which conventional semiconductors lose their efficiency. However, the blocking capabilities of SiC power rectifiers and transistors are yet to approach their impressive theoretical limit due to so called edge effects at the device periphery. Surface passivation, which addresses many issues related to surface electric fields, is an extremely important fabrication step for high performance semiconductor electronic devices. Surface passivation can influence the surface recombination velocity, surface charge, interface trap density, and other surface characteristics. In this work, two-dimensional device simulations are used to establish the trends and the extent of the influence of charges, present in surface passivation dielectrics, on the reverse bias characteristics of SiC devices. Actual charges and charge instability are experimentally evaluated in a few common types of passivation dielectrics used in SiC device technologies. Device simulations are used to predict the corresponding improvement (or degradation) of the breakdown conditions at the device periphery, associated with the experimentally measured dielectric charges.

L'objectif d'amélioration des performances de cellules solaires sur des substrats de silicium cristallin de plus en plus en minces (< 200 µm) est indispensable à la réduction des coûts du module et donc à l'essor du photovoltaïque à l'échelle mondiale. Cette thèse se propose de répondre à la problématique d'amincissement des plaquettes sur substrats monocristallins (Cz) de type p de grande surface (239 cm2 - 180 µm) par le développement d'une structure en face arrière capable de générer un rendement de conversion élevé tout en limitant le degré de complexité du procédé de fabrication de la cellule. La solution explorée est celle des cellules à face arrière passivée et contacts localisés et les schémas de passivation étudiés s'appuient sur l'utilisation d'empilements diélectriques à base d'oxydes de silicium (SiO2) et d'aluminium (Al2O3) couplés au nitrure de silicium (SiNx). Ces travaux ont pour objectif d'optimiser les propriétés de passivation des couches diélectriques tout autant que les briques technologiques nécessaires à leur intégration dans la structure de cellule finale (conditionnement de surface, ablation laser sélective, métallisation par sérigraphie). Le procédé de fabrication résultant a permis d'obtenir des cellules avec un rendement de conversion de 19.1% pour l'empilement SiO2/SiNx. Il est cependant démontré que les limitations des performances de cette structure peuvent être partiellement compensées en introduisant une couche d'alumine, permettant d'atteindre un rendement remarquable de 19.5% (+0.4% par rapport à une structure standard). / Improving the solar cell efficiency on thin wafers (< 200 µm) has become a must in the industry in order to reduce the module cost and enhance the photovoltaics field growth worldwide. This work addresses the issues regarding the thickness reduction of large monocrystalline p-type wafers (239 cm2 - 180 µm) by developing a back side architecture capable of increasing the efficiency while limiting the cell fabrication level of complexity. Thus back passivated and local contacts, also known as PERC-type, solar cells are investigated. Those include passivation schemes relying on the use of dielectric stacks based on silicon oxide (SiO2), aluminum oxide (Al2O3) both coupled with silicon nitride layers (SiNx). This PhD study attempts to carry out an optimization of the passivation properties as well as of the technological steps required for a proper integration in the final cell structure (surface preparation, selective laser ablation, screen-printing metallization). The resulting optimized process led to the fabrication of solar cells displaying an 19.1% conversion efficiency by using SiO2/SiNx layers. Nevertheless it was shown evidence that the limited electrical performances can be overcome by introducing an Al2O3 layer, eventually reaching a remarkable 19.5% efficiency. This represents an absolute gain efficiency of +0.4% compared to the standard full-area Al-BSF solar cell architecture.