For a long time determining the stability issue of characteristic polynomials has played avery important role in Control System Engineering. This thesis addresses the traditionalcontrol issues such as stabilizing a system with any certain controller analyzingcharacteristic polynomial, yet a new perspective to solve them. Particularly, in this thesis,Proportional-Integral-Derivative (PID) controller is considered for a fixed structuredcontroller. This research aims to attain controller gain set satisfying given performancespecifications, not from the exact mathematical model, but from the empirical data of thesystem. Therefore, instead of a characteristic polynomial equation, a speciallyformulated characteristic rational function is investigated for the stability of the systemin order to use only the frequency data of the plant. Because the performance satisfactionis highly focused on, the characteristic rational function for the investigation of thestability is mainly dealt with the complex coefficient polynomial case rather than realone through whole chapters, and the mathematical basis for the complex case is prepared.For the performance specifications, phase margin is considered first since it is avery significant factor to examine the system’s nominal stability extent (nominal performance). Second, satisfying H norm constraints is handled to make a more robustclosed loop feedback control system. Third, we assume undefined, but bounded outsidenoise, exists when estimating the system’s frequency data. While considering theseuncertainties, a robust control system which meets a given phase margin performance, isattained finally (robust performance).In this thesis, the way is explained how the entire PID controller gain setssatisfying the given performances mentioned in the above are obtained. The approachfully makes use of the calculating software e.g. MATLAB® in this research and isdeveloped in a systematically and automatically computational aspect. The result ofsynthesizing PID controller is visualized through the graphic user interface of acomputer.

For a long time determining the stability issue of characteristic polynomials has played avery important role in Control System Engineering. This thesis addresses the traditionalcontrol issues such as stabilizing a system with any certain controller analyzingcharacteristic polynomial, yet a new perspective to solve them. Particularly, in this thesis,Proportional-Integral-Derivative (PID) controller is considered for a fixed structuredcontroller. This research aims to attain controller gain set satisfying given performancespecifications, not from the exact mathematical model, but from the empirical data of thesystem. Therefore, instead of a characteristic polynomial equation, a speciallyformulated characteristic rational function is investigated for the stability of the systemin order to use only the frequency data of the plant. Because the performance satisfactionis highly focused on, the characteristic rational function for the investigation of thestability is mainly dealt with the complex coefficient polynomial case rather than realone through whole chapters, and the mathematical basis for the complex case is prepared.For the performance specifications, phase margin is considered first since it is avery significant factor to examine the system’s nominal stability extent (nominal performance). Second, satisfying H norm constraints is handled to make a more robustclosed loop feedback control system. Third, we assume undefined, but bounded outsidenoise, exists when estimating the system’s frequency data. While considering theseuncertainties, a robust control system which meets a given phase margin performance, isattained finally (robust performance).In this thesis, the way is explained how the entire PID controller gain setssatisfying the given performances mentioned in the above are obtained. The approachfully makes use of the calculating software e.g. MATLAB® in this research and isdeveloped in a systematically and automatically computational aspect. The result ofsynthesizing PID controller is visualized through the graphic user interface of acomputer.

Loop measurements are very important in evaluating dynamic performance of DC-DC converters. In this thesis, a small loop measurement tool as a low-cost alternative to a network analyzer is proposed. The tool is particularly useful when a network analyzer is not always available for use, for example when engineers are working on-site with customers or when a network analyzer is not affordable due to their relatively high cost. The design, simulation, and hardware implementation of the inexpensive loop measurement tool will be presented in this thesis. Results from computer simulation and hardware prototype demonstrate the ability of the proposed tool to perform phase margin, gain margin, and cross-over frequency measurements of DC-DC converters. These results are then shown to be comparable with those obtained from a network analyzer. The procedure used to perform loop measurements with the proposed tool will be explained. Limitations in the operation as well as further improvements to enhance the performance of the proposed tool will also be discussed.

Load transients are prevalent in every electronic device including semiconductor memory, card readers, microprocessors, disc drives, piezoelectric devices, and digitally based systems. They are capable of producing voltage stress, introducing noise, and degrading device functionality. In order to avoid damage to the device, a feedback control loop is implemented with system compensation to regulate the output voltage deviations by the converter. Because designing compensation networks can be rather complicated, DC-DC converters with integrated feedback control topologies help minimize design time and complexity of converter compensation at the expense of design flexibility. This thesis widens the limitations of an integrated DC-DC converter with a stability optimization technique that utilizes the feedback network to create a phase boost centered at the bandwidth of the converter to increase the phase margin and improve its transient response. Ideal modeling verifies stability optimization while non-ideal modeling that introduces PCB parasitics to the control loop suggest an additional phase boost in the feedback network. Experimental data confirms this non-deal model for parasitic capacitances higher than calculated. The modified non-ideal model shows more accuracy compared to the experimental data which indicates that there may be PCB parasitics that is unaccounted for. Modeling the modified non-ideal model to high orders may yield more accuracy. This thesis gives both DC-DC converter and PCB layout designers insight and considerations into PCB effects on the stability of DC-DC converters and the optimization of integrated compensation.

The performance of analog integrated circuits is dependent on the technology. Digital circuits are scalable in nature, and the same circuit can be scaled from one technology to another with improved performance. But, in analog integrated circuits, the circuit components must be re-designed to maintain the desired performance across different technologies. Moreover, in the case of digital circuits, minimum feature-size (short channel length) devices can be used for better performance, but analog circuits are still being designed using channel lengths larger than the minimum feature sizes. The research in this thesis is aimed at understanding the impact of technology scaling and short channel length devices on the performance of analog integrated circuits. The operational amplifier (op amp) is chosen as an example circuit for investigation. The performance of the conventional op amps are studied across different technologies for short channel lengths, and techniques to develop technology-independent op amp architectures have been proposed. In this research, three op amp architectures have been developed whose performance is relatively independent of the technology and the channel length. They are made scalable, and the same op amp circuits are scaled from a 0.25 um CMOS onto a 0.18 um CMOS technology with the same components. They are designed to achieve large small-signal gain, constant unity gain-bandwidth frequency and constant phase margin. They are also designed with short channel length transistors. Current feedback, gm-boosted, CMOS source followers are also developed, and they are used in the buffered versions of these op amps.