This thesis covers the work to combine the two worlds of the hardware platform of the BLACKfin by Analog Devices and the software based on the eCos operating system to provide a foundation for embedded real-time applications to build on to benefit from the best aspects of both. This document will therefore outline the main objectives of this thesis followed by an overview of the functionality provided by eCos and the BLACKfin. It will further outline the steps required to combine both by porting the hardware abstraction layer and device drivers for the BLACKfin architecture to eCos. Prior to detailing selected implementations of particular code segments of special interest this thesis will outline the design and concept considerations involved and the conclusion drawn in order to provide a working HAL. After describing the current state of the hardware abstraction layer port conducted as part of this thesis this document will provide an evaluation of the implementation itself the benefits as well as possible limitations. To provide a conclusion to the work outlined in this document further possible questions of interest for future work based on the results of this thesis will be provided.

This thesis covers the work to combine the two worlds of the hardware platform of the BLACKfin by Analog Devices and the software based on the eCos operating system to provide a foundation for embedded real-time applications to build on to benefit from the best aspects of both. This document will therefore outline the main objectives of this thesis followed by an overview of the functionality provided by eCos and the BLACKfin. It will further outline the steps required to combine both by porting the hardware abstraction layer and device drivers for the BLACKfin architecture to eCos. Prior to detailing selected implementations of particular code segments of special interest this thesis will outline the design and concept considerations involved and the conclusion drawn in order to provide a working HAL. After describing the current state of the hardware abstraction layer port conducted as part of this thesis this document will provide an evaluation of the implementation itself the benefits as well as possible limitations. To provide a conclusion to the work outlined in this document further possible questions of interest for future work based on the results of this thesis will be provided.