The Lithium-ion (Li-ion) battery is one of the major topics currently studied as a potential way to help in reducing greenhouse gas emissions. Major car manufacturers are interested in adapting the Li-ion battery in the power trains of Plug-in Hybrid Electric Vehicles (PHEV) to improve fuel efficiency. Materials currently used for Li-ion batteries are LiCoO2 (LCO) and graphite—the first materials successfully integrated by Sony into Li-ion batteries. However, due to the high cost and polluting effect of cobalt (Co), and the low volumetric capacity of graphite, new materials are being sought out. LiFePO4 (LFP) and SnO2 are both good alternatives for the cathode and anode materials in Li-ion batteries. But, to create high-performance batteries, nano-sized carbon-coated particles of LFP and SnO2 are required. The present work attempts to develop a new synthesis method for these materials: organic template-assisted synthesis for three-dimensionally ordered macroporous (3DOM) LFP and porous SnO2. With the newly developed synthesis, highly pure materials were successfully synthesized and tested in Li-ion batteries. The obtained capacity for LFP was 158m Ah/g, which is equivalent to 93% of the theoretical capacity. The obtained capacity for SnO2 was 700 mAh/g, which is equivalent to 90% of the theoretical capacity. Moreover, Hybrid Pulse Power Characterization (HPPC) was used to test LFP and LCO for comparison and feasibility in PHEVs. HPPC is generally used to test the feasibility and capacity fade for PHEVs. It simulates battery use in various driving conditions of PHEVs to study pulse energy consumption and regeneration. In this case, HPPC was conducted on a half-cell battery for the first time to study the phenomena on a single active material, LFP or LCO. Based on the HPPC results, LFP proved to be more practical for use in PHEVs.

The Lithium-ion (Li-ion) battery is one of the major topics currently studied as a potential way to help in reducing greenhouse gas emissions. Major car manufacturers are interested in adapting the Li-ion battery in the power trains of Plug-in Hybrid Electric Vehicles (PHEV) to improve fuel efficiency. Materials currently used for Li-ion batteries are LiCoO2 (LCO) and graphite—the first materials successfully integrated by Sony into Li-ion batteries. However, due to the high cost and polluting effect of cobalt (Co), and the low volumetric capacity of graphite, new materials are being sought out. LiFePO4 (LFP) and SnO2 are both good alternatives for the cathode and anode materials in Li-ion batteries. But, to create high-performance batteries, nano-sized carbon-coated particles of LFP and SnO2 are required. The present work attempts to develop a new synthesis method for these materials: organic template-assisted synthesis for three-dimensionally ordered macroporous (3DOM) LFP and porous SnO2. With the newly developed synthesis, highly pure materials were successfully synthesized and tested in Li-ion batteries. The obtained capacity for LFP was 158m Ah/g, which is equivalent to 93% of the theoretical capacity. The obtained capacity for SnO2 was 700 mAh/g, which is equivalent to 90% of the theoretical capacity. Moreover, Hybrid Pulse Power Characterization (HPPC) was used to test LFP and LCO for comparison and feasibility in PHEVs. HPPC is generally used to test the feasibility and capacity fade for PHEVs. It simulates battery use in various driving conditions of PHEVs to study pulse energy consumption and regeneration. In this case, HPPC was conducted on a half-cell battery for the first time to study the phenomena on a single active material, LFP or LCO. Based on the HPPC results, LFP proved to be more practical for use in PHEVs.

In this thesis, we describe the development of a time-domain terahertz (THz) spectrometer driven by two different laser sources: an Er-doped femtosecond fiber laser and a mode-locked Ti:Sapphire laser. The resulting THz electromagnetic radiation was generated and detected using photoconductive antenna detection methods in both systems. In these experiments we characterized the THz power output for both the fiber laser driven system and the Ti:Sapphire laser driven system. Emphasis is given throughout this thesis on understanding the working principles behind time-domain terahertz spectroscopy, applications of THz radiation and terahertz generation as well as terahertz detection methods. We calculated the THz power output using two different methods. By using the &ldquo / Hertzian Dipole&rdquo / method we estimated the generated THz power after the generation photoconductive antenna. Using this method, we showed that the v generated power is on the order of milliwatts, which is far larger than the expected power typical for these systems. The second, &ldquo / Open-Circuit Voltage&rdquo / method, allowed us to calculate the received power on the detection photoconductive antenna. Using this method we were able to show that the THz power generated and detected in these systems is on the order of microwatts. For the mode-locked fiber laser driven spectrometer we obtained on average a ~ 4 ps (0.25 THz) pulse length which corresponded to an average power in the range of 71.8 nW - 70.54 &amp / #956 / W on a dipole antenna with a 6 &amp / #956 / m dipole gap and 44 &amp / #956 / m dipole length. Using the mode-locked Ti:Sapphire laser driven spectrometer we observed a ~ 2 ps (0.5 THz) pulse length and average power in the range of 0.54 nW &ndash / 5.12 &amp / #956 / W on a different dipole antenna with a 5 &amp / #956 / m gap and 40 &amp / #956 / m dipole length. Since these values agree with expected values for these systems we believe the &ldquo / Open-Circuit Voltage&rdquo / method is appropriate when trying to calculate the THz power.

The Lithium-ion (Li-ion) battery is one of the major topics currently studied as a potential way to help in reducing greenhouse gas emissions. Major car manufacturers are interested in adapting the Li-ion battery in the power trains of Plug-in Hybrid Electric Vehicles (PHEV) to improve fuel efficiency. Materials currently used for Li-ion batteries are LiCoO2 (LCO) and graphite—the first materials successfully integrated by Sony into Li-ion batteries. However, due to the high cost and polluting effect of cobalt (Co), and the low volumetric capacity of graphite, new materials are being sought out. LiFePO4 (LFP) and SnO2 are both good alternatives for the cathode and anode materials in Li-ion batteries. But, to create high-performance batteries, nano-sized carbon-coated particles of LFP and SnO2 are required. The present work attempts to develop a new synthesis method for these materials: organic template-assisted synthesis for three-dimensionally ordered macroporous (3DOM) LFP and porous SnO2. With the newly developed synthesis, highly pure materials were successfully synthesized and tested in Li-ion batteries. The obtained capacity for LFP was 158m Ah/g, which is equivalent to 93% of the theoretical capacity. The obtained capacity for SnO2 was 700 mAh/g, which is equivalent to 90% of the theoretical capacity. Moreover, Hybrid Pulse Power Characterization (HPPC) was used to test LFP and LCO for comparison and feasibility in PHEVs. HPPC is generally used to test the feasibility and capacity fade for PHEVs. It simulates battery use in various driving conditions of PHEVs to study pulse energy consumption and regeneration. In this case, HPPC was conducted on a half-cell battery for the first time to study the phenomena on a single active material, LFP or LCO. Based on the HPPC results, LFP proved to be more practical for use in PHEVs.

The Lithium-ion (Li-ion) battery is one of the major topics currently studied as a potential way to help in reducing greenhouse gas emissions. Major car manufacturers are interested in adapting the Li-ion battery in the power trains of Plug-in Hybrid Electric Vehicles (PHEV) to improve fuel efficiency. Materials currently used for Li-ion batteries are LiCoO2 (LCO) and graphite—the first materials successfully integrated by Sony into Li-ion batteries. However, due to the high cost and polluting effect of cobalt (Co), and the low volumetric capacity of graphite, new materials are being sought out. LiFePO4 (LFP) and SnO2 are both good alternatives for the cathode and anode materials in Li-ion batteries. But, to create high-performance batteries, nano-sized carbon-coated particles of LFP and SnO2 are required. The present work attempts to develop a new synthesis method for these materials: organic template-assisted synthesis for three-dimensionally ordered macroporous (3DOM) LFP and porous SnO2. With the newly developed synthesis, highly pure materials were successfully synthesized and tested in Li-ion batteries. The obtained capacity for LFP was 158m Ah/g, which is equivalent to 93% of the theoretical capacity. The obtained capacity for SnO2 was 700 mAh/g, which is equivalent to 90% of the theoretical capacity. Moreover, Hybrid Pulse Power Characterization (HPPC) was used to test LFP and LCO for comparison and feasibility in PHEVs. HPPC is generally used to test the feasibility and capacity fade for PHEVs. It simulates battery use in various driving conditions of PHEVs to study pulse energy consumption and regeneration. In this case, HPPC was conducted on a half-cell battery for the first time to study the phenomena on a single active material, LFP or LCO. Based on the HPPC results, LFP proved to be more practical for use in PHEVs.

Low-density parity-check (LDPC) codes are a class of easily decodable error-correcting codes. Published parallel LDPC decoders demonstrate high throughput and low energy-per-bit but require a lot of silicon area. Decoders based on digit-online arithmetic (processing several bits per fundamental operation) process messages in a digit-serial fashion, reducing the area requirements, and can process multiple frames in frame-interlaced fashion. Implementations on Field-Programmable Gate Array (FPGA) are usually power- and area-hungry, but provide flexibility compared with application-specific integrated circuit implementations. With the penetration of mobile devices in the electronics industry the power considerations have become increasingly important. The power consumption of a digit-online decoder depends on various factors, like input log-likelihood ratio (LLR) bit precision, signal-to-noise ratio (SNR) and maximum number of iterations. The design is implemented on an Altera Stratix IV GX EP4SGX230 FPGA, which comes on an Altera DE4 Development and Education Board. In this work, both parallel and digit-online block LDPC decoder implementations on FPGAs for WiMAX 576-bit, rate-3/4 codes are studied, and power measurements from the DE4 board are reported. Various components of the system include a random-data generator, WiMAX Encoder, shift-out register, additive white Gaussian noise (AWGN) generator, channel LLR buffer, WiMAX Decoder and bit-error rate (BER) Calculator. The random-data generator outputs pseudo-random bit patterns through an implemented linear-feedback shift register (LFSR). Digit-online decoders with input LLR precisions ranging from 6 to 13 bits and parallel decoders with input LLR precisions ranging from 3 to 6 bits are synthesized in a Stratix IV FPGA. The digit-online decoders can be clocked at higher frequency for higher LLR precisions. A digit-online decoder can be used to decode two frames simultaneously in frame-interlaced mode. For the 6-bit implementation of digit-online decoder in single-frame mode, the minimum throughput achieved is 740 Mb/s at low SNRs. For the case of 11-bit LLR digit-online decoder in frame-interlaced mode, the minimum throughput achieved is 1363 Mb/s. Detailed analysis such as effect of SNR and LLR precision on decoder power is presented. Also, the effect of changing LLR precision on max clock frequency and logic utilization on the parallel and the digit-online decoders is studied. Alongside, power per iteration for a 6-bit LLR input digit-online decoder is also reported.

A hardware design methodology or platform is complete if it has the capabilities to successfully implement clock tree, predict the power consumption for cases like best and worst Parasitic Interconnect Corners (RC Corners), supply power to every standard cell, etc.This thesis has tried to solve the three unsolved engineering problems in SiLago design. First, power characterization of the flat design which was designed using the SiLago methodology. Second, designing a hierarchical clock tree and harden it inside the SiLago logic. Third, dimensioning hierarchical power grids. Out of these, clock tree illustrates some interesting characteristics as it is programmable and predictable.The tools used for digital designing are Cadence Innovus, Synopsys Design Vision, and Mentor Graphics Questasim. These are very sophisticated tools and widely accepted in industries as well as in academia.The work done in this thesis has enabled SiLago platform one step forward toward its fruition. / En hårdvarudesign metodologi eller plattform är komplett om den har kapabiliteten till att lyckas genomföra klockträdet, förutsäga strömförbrukningen för bästa och värsta fall av Parasitic Interconnect Corners (RC Corners), tillföra kraft till varje standardcell, etc. Denna avhandling har försökt lösa de tre olösta tekniska problemen i SiLago-designen. Det första är strömkvalificering av designen som designades med hjälp av SiLago metoden. Det andra problemet är att designa ett hierarkiskt klockträd och härda det inuti SiLago logik. Det tredje problemet är att dimensionera hierarkiska strömnät. Ur dessa illustrerar klockträdet några intressanta egenskaper eftersom det är programmerbart och förutsägbart. De verktyg som används för digital design är Cadence Innovus, Synopsys Design Visionoch Mentor Graphics Questasim. Dessa verktyg är mycket sofistikerade och allmänt accepterade i industrier såväl som i akademin. Arbetet i denna avhandling har gjort det möjligt för SiLago-plattformen att ta ett steg mot att realiseras.

Bien que la consommation énergétique des processeurs a considérablement diminué, la demande pour des techniques visant à la réduire n’a jamais été aussi forte. En effet, la consommation énergétique des machines haute performance a crûproportionnellement à leurs accroissements en taille. Elle a atteint un tel niveau qu’elle doit être minimisée par tous les moyens. Les processeurs actuels peuvent changer au vol leurs fréquences d’exécution. Utiliser une fréquence plus faible peut mener à une réduction de leurs consommations énergétiques. Cette thèse recherche jusqu’à quel point cette fonctionnalité, appelé DVFS, peut favoriser cette réduction. Dans un premier temps, une analyse d’une machine simple est effectuée pour une meilleure compréhension des différents éléments consommateurs afin de focaliser les optimisations sur ces derniers. La consommation d’un processeur dépend de l’application qui est exécutée. Une analyse des applications est donc effectuée pour mieux comprendre leurs impacts sur cette dernière. Basés sur cette étude, plusieurs outils visant à réduire cette consommation ont été créés. REST, adapte la fréquence d’exécution au regard du comportement de l’application. Le second, UtoPeak, calcule la réduction maximum que l’on peut attendre grâce au DVFS. Le dernier, FoREST, est créé pour corriger les défauts de REST et obtenir cette réduction maximum de la consommationénergétique. Enfin, les applications scientifiques actuelles utilisent généralement plus d’unprocesseur pour leurs exécutions. Cette thèse présente aussi une première tentative de découverte de la borne inférieure sur la consommation énergétique dans ce nouvel environnement d’exécution / Over the past decade, processors have drastically reduced their power consumption. With each new processor generation, new features enhancing the processor energy efficiency are added. However, the demand for energy reductiontechniques has never been so high. Indeed, with the increasing size of high performance machines, their power and energy consumptions have grown accordingly. They have reached a point where they have to be reduced by all possible means.Current processors allow an interesting feature, they can change their operating frequency at run-time. As granted by transistor physics, lower frequency means lower power consumption and hopefully, lower energy consumption. This thesisinvestigates to which extent this processor feature, called DVFS, can be used to save energy. First, a simple machine is analyzed to have a complete understanding of the different power consumers and where optimizations can be focused. It will be demonstrated that only fans and processors allow run-time energy optimizations. Betweenthe two, the processor shows the highest consumption, therefore potentially exposing the higher potential for energy savings. Second, the power consumption of a processor depends on the applications being executed. However, there are as many applications as problems to solve. The focus is then put on applications to understand their impacts on energy consumption. Based on the gathered insights, multiple tools targeting energy savings on a single processor are created. REST, the most naive, tries to adapt the processor state to the stress generated by the application, hoping for energy reduction. The second, UtoPeak, computes the maximum energy reduction one can expect for any tool usingDVFS. It allows to evaluate the efficiency of such systems. The last one, FoREST, was created in order to correct all the flaws of REST and target maximum energy reduction. Last, scientific applications generally need more than one processor to be executed in a decent time. The thesis also presents a first attempt to compute a lower bound in energy reduction when considering this new execution context