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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Power Estimation of High Speed Bit-Parallel Adders / Effektestimering av snabba bitparallella adderare

Åslund, Anders January 2004 (has links)
<p>Fast addition is essential in many DSP algorithms. Various structures have been introduced to speed up the time critical carry propagation. For high throughput applications, however, it may be necessary to introduce pipelining. In this report the power consumption of four different adder structures, with varying word length and different number of pipeline cuts, is compared. </p><p>Out of the four adder structures compared, the Kogge-Stone parallel prefix adder proves to be the best choice most of the time. The Brent-Kung parallel prefix adder is also a good choice, but the maximal throughput does not reach as high as the maximal throughput of the Kogge-Stone parallel prefix adder.</p>
2

Power Estimation of High Speed Bit-Parallel Adders / Effektestimering av snabba bitparallella adderare

Åslund, Anders January 2004 (has links)
Fast addition is essential in many DSP algorithms. Various structures have been introduced to speed up the time critical carry propagation. For high throughput applications, however, it may be necessary to introduce pipelining. In this report the power consumption of four different adder structures, with varying word length and different number of pipeline cuts, is compared. Out of the four adder structures compared, the Kogge-Stone parallel prefix adder proves to be the best choice most of the time. The Brent-Kung parallel prefix adder is also a good choice, but the maximal throughput does not reach as high as the maximal throughput of the Kogge-Stone parallel prefix adder.
3

Návrh komplexního HIL simulátoru pátých dveří automobilu / Design of a complex HIL simulator of car boot door

Obrtáč, Tomáš January 2019 (has links)
This thesis covers the development of complex HIL simulator for the fifth car door. The beginning of the thesis is dedicated to theoretical research in the area of In-the-Loop testing. Practical part describes development of HIL simulator complemented by power electronics part. A simulation environment Matlab/Simulink was used for control design and analysis. Before the beginning of the work was measured signal part of control unit and specific signal sequences were identified. The control was applied on sbRIO device from National Instruments company with the implementation of a model on FPGA. Specific requirements for sensing speed and generation of communication signals lead to creation of unique hardware for application needs. The result of the thesis is complex HIL simulator with intuitive GUI and possibility of simulations a wide range of DC motors.

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