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1	Binary adders Lynch, Thomas Walker 24 October 2011 (has links) This thesis focuses on the logical design of binary adders. It covers topics extending from cardinal numbers to carry skip optimization. The conventional adder designs are described in detail, including: carry completion, ripple carry, carry select, carry skip, conditional sum, and carry lookahead. We show that the method of parallel prefix analysis can be used to unify the conventional adder designs under one parameterized model. The parallel prefix model also produces other useful configurations, and can be used with carry operator variations that are associative. Parallel prefix adder parameters include group sizes, tree shape, and device sizes. We also introduce a general algorithm for group size optimization. Code for this algorithm is available on the World Wide Web. Finally, the thesis shows the derivation for some carry operator variations including those originally given by Majerski and Ling. / text Binary adders Cardinal numbers Carry skip optimization Adder design Parallel prefix model Microprocessors Addition algorithms
2	Power Estimation of High Speed Bit-Parallel Adders / Effektestimering av snabba bitparallella adderare Åslund, Anders January 2004 (has links) <p>Fast addition is essential in many DSP algorithms. Various structures have been introduced to speed up the time critical carry propagation. For high throughput applications, however, it may be necessary to introduce pipelining. In this report the power consumption of four different adder structures, with varying word length and different number of pipeline cuts, is compared. </p><p>Out of the four adder structures compared, the Kogge-Stone parallel prefix adder proves to be the best choice most of the time. The Brent-Kung parallel prefix adder is also a good choice, but the maximal throughput does not reach as high as the maximal throughput of the Kogge-Stone parallel prefix adder.</p> Electronics Power simulations Pipelining Adder Ripple carry Conditional sum Brent-Kung Kogge-Stone Parallel prefix VHDL DSP Elektronik Electronics Elektronik
3	Power Estimation of High Speed Bit-Parallel Adders / Effektestimering av snabba bitparallella adderare Åslund, Anders January 2004 (has links) Fast addition is essential in many DSP algorithms. Various structures have been introduced to speed up the time critical carry propagation. For high throughput applications, however, it may be necessary to introduce pipelining. In this report the power consumption of four different adder structures, with varying word length and different number of pipeline cuts, is compared. Out of the four adder structures compared, the Kogge-Stone parallel prefix adder proves to be the best choice most of the time. The Brent-Kung parallel prefix adder is also a good choice, but the maximal throughput does not reach as high as the maximal throughput of the Kogge-Stone parallel prefix adder. Electronics Power simulations Pipelining Adder Ripple carry Conditional sum Brent-Kung Kogge-Stone Parallel prefix VHDL DSP Elektronik Electronics Elektronik

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