Master of Science / Department of Electrical and Computer Engineering / William B. Kuhn / In microchip circuitry, the tiny size of inductors creates low Q values, limiting a bandpass filter’s ability to have narrow bandwidths at RF frequencies. To counter this problem and also compensate for losses, Q-enhancement can be implemented to facilitate narrower bandwidths and boost gain. With Q-enhancement, temperature sensitivity of the circuitry causes the filter parameters to drift over time, making it necessary to adjust the filter periodically in order to keep the filter centered at the desired frequency. With the proper additional on-chip circuits used with a microprocessor, a tuning algorithm makes it possible to automatically tune the filter in-situ. The algorithm is based on increasing Q-enhancement until the filter begins to oscillate, reading the frequency of oscillation, adjusting to the desired frequency, and then decreasing Q-enhancement until the filter no longer oscillates. A 500MHz single-pole differential filter was designed with an on-chip amplitude detector and frequency prescaler to facilitate tuning. The filter was made adjustable across frequency with banks of binary weighted switchable capacitors. Q-enhancement adjustment was achieved via banks of cross-coupled FETs, also binary weighted. The circuit was fabricated in 0.5μm silicon-on-sapphire technology. The finished filter chip was controlled with a PIC microprocessor which had been programmed in C with the tuning algorithm. With the tuning algorithm in place, the filter was successfully able to align itself to within ±1MHz of the desired 500MHz center frequency. Q-enhancement levels were also able to self-adjust to maintain a desired bandwidth. An improved design based around an off-chip coupled-resonator two-pole filter has also been designed. This filter includes adjustable coupling capacitance between the two poles, which also must be tuned. A new method of tuning is proposed for such applications. The properties of a two-pole filter cause it to oscillate at two frequencies with Q-enhancement. A modified amplitude detector is capable of reading the beat frequency which results from the two oscillations, a value which relates directly to and allows tuning of the bandwidth of the filter.

Master of Science / Department of Electrical Engineering / William Kuhn / Q-enhanced Filters have been researched extensively, but have not been often implemented into receiver architectures due to inherent challenges in the design and stability of these filters. However, recent works have successfully addressed Q-enhanced filter designs which are viable for receiver implementation with tuning algorithms to achieve temperature stability. This work continues these efforts with the redesign of a Two-Pole Q-Enhanced Band-Pass filter tested at narrower fractional bandwidths than previous work of less than one percent and considers potential significant improvements in receiver performance using this filer. The Q-enhanced filter redesign ports the existing filter to a new integrated circuit technology which performs better at higher frequencies. The redesign in particular addresses problems in the previous design. The frequency divider design is modified, resistance tuning is added, and additional modifications to the overall filter functionality are implemented. General problems in obtaining an ideal passband shape by eliminating unwanted coupling are addressed. The supporting software for the tuning algorithm is modified to use analog controls and shown to achieve further narrowed bandwidths of 5 MHz and 2.5 MHz at center frequencies of 500 MHz, which are demonstrated to be temperature stable. Future software modifications are described to prepare the existing code base for the new filter design. Potential applications for a Q-enhanced filter include improving the performance of receiver designs. One of the most important performance parameters of a receiver is its spurious response rejection. To explore this behavior, an automated test system is developed to characterize receivers, and four receivers are tested. The test results are presented in a novel graphical display, which is used to evaluate receiver performance and compare receivers. These results motivated the development of a potential modified superheterodyne receiver architecture using the Q-enhanced filter as an image filter and an IF filter. The viability of this receiver design is tested and shown to provide significant improvements to receiver’s spurious rejection response.

Master of Science / Department of Electrical and Computer Engineering / William B. Kuhn / Q‐enhanced filtering technologies have been heavily researched, but have not yet been adopted into commercial designs due to tuning complexity, and performance issues such as noise figure and dynamic range. A multi‐pole Q‐enhanced band‐pass filter operating at 450 MHz with tunable bandwidth is developed in this thesis. A noise figure of 14 dB and dynamic range of 140 dB/Hz have been measured, making the filter suitable for operating in the IF subsystem of a radio receiver. The design utilizes off‐chip resonators, created using surface mount components or embedded passives in LTCC processes, to have a reasonably high base‐Q. The equivalent parallel loss resistance of the finite‐Q inductor and connected circuitry at resonance is partially offset by negative resistances, implemented with tunable on‐chip transconductors, as required to reach the needed Q for the targeted bandwidth. Each pole of the filter has binary weighted negative resistance cells for Q‐enhancement and binary weighted capacitances for frequency tuning. Binary weighted capacitive coupling cells allow the filter to achieve the level of coupling appropriate to the targeted bandwidth. To maintain the filter bandwidth, center frequency, and gain over environmental changes a realtime tuning algorithm is needed. A low complexity tuning algorithm has been implemented and found to accurately maintain the bandwidth, center frequency, and gain when operating at bandwidths of 10 or 20 MHz. Flatness of the pass‐band is also maintained, to within 0.5 dB across a temperature range of 25‐55 degrees C. In addition to the implementation of the tuning algorithm, the thesis provides a solution for pass‐band asymmetries spawned from the use of finite‐Q resonators and associated control circuitry.

The 5 GHz Wireless LAN (802.11a) is a popular standard for wireless indoor communications providing moderate range and speed. Combined with the emerging ultra Wideband standard (UWB) for short range and high speed communications, the two standards promise to fulfil all areas of wireless application needs. However, due to the overlapping of the two spectrums, the stronger 802.11a signals tend to interfere causing degradation to the UWB receiver. This presents one of the main technical challenges preventing the wide acceptance of UWB. The research work presented in this thesis is to propose a low cost RF receiver front-end filter topology that would resolve the narrowband (NB) interference to UWB receiver while being operable in both 802.11a mode and UWB mode. The goal of the dual mode filter design is to reduce cost and complexity by developing a fully integrated front-end filter. The filter design utilizes high Q passive devices and Q-enhancement technique to provide front-end channel-selection in NB mode and NB interference rejection in UWB mode. In the 802.11a NB mode, the filter has a tunable gain of 4 dB to 25 dB, NF of 8 dB and an IIP3 between -47 dBm and -18 dBm. The input impedance is matched at -16 dB. The frequency of operation can be tuned from 5.15 GHz to 5.35 GHz. In the UWB mode, the filter has a gain of 0 dB to 8 dB across 3.1 GHz to 9 GHz. The filter can reject the NB interference between 5.15 GHz to 5.35 GHz at up to 60 dB. The Q of the filter is tunable up to a 250 while consuming a maximum of 23.4 mW of power. The fully integrated dual mode filter occupies a die area of 1.1 mm2.

The 5 GHz Wireless LAN (802.11a) is a popular standard for wireless indoor communications providing moderate range and speed. Combined with the emerging ultra Wideband standard (UWB) for short range and high speed communications, the two standards promise to fulfil all areas of wireless application needs. However, due to the overlapping of the two spectrums, the stronger 802.11a signals tend to interfere causing degradation to the UWB receiver. This presents one of the main technical challenges preventing the wide acceptance of UWB. The research work presented in this thesis is to propose a low cost RF receiver front-end filter topology that would resolve the narrowband (NB) interference to UWB receiver while being operable in both 802.11a mode and UWB mode. The goal of the dual mode filter design is to reduce cost and complexity by developing a fully integrated front-end filter. The filter design utilizes high Q passive devices and Q-enhancement technique to provide front-end channel-selection in NB mode and NB interference rejection in UWB mode. In the 802.11a NB mode, the filter has a tunable gain of 4 dB to 25 dB, NF of 8 dB and an IIP3 between -47 dBm and -18 dBm. The input impedance is matched at -16 dB. The frequency of operation can be tuned from 5.15 GHz to 5.35 GHz. In the UWB mode, the filter has a gain of 0 dB to 8 dB across 3.1 GHz to 9 GHz. The filter can reject the NB interference between 5.15 GHz to 5.35 GHz at up to 60 dB. The Q of the filter is tunable up to a 250 while consuming a maximum of 23.4 mW of power. The fully integrated dual mode filter occupies a die area of 1.1 mm2.

Modern and future communication and radar systems require highly reconfigurable RF front-ends to realize the vision of Software-Defined Radio (SDR), where a single digitally-enabled radio is able to cover multiple bands and multiple operating standards. However, in the increasingly hostile RF environment, filtering becomes a bottleneck for SDRs as the traditional off-chip filters are fixed frequency and bulky. Therefore, tunable filtering is a critical building block for the reconfigurable RF front-ends and on-chip implementations are needed to meet size and weight constraints. On-chip passive components are lossy, especially inductors, and to fulfill the tunability requirements a number of active circuit techniques, e.g. N-path, Q-enhanced, discrete-time filters etc., have been developed. Most of these active filtering techniques, however, are limited to RF frequency range of few GHz and below. Additionally, these techniques lack or have very limited bandwidth tunability. On the other hand, Q-enhanced tunable LC filtering has the potential to be implemented at Microwave frequencies from 4~20 GHz and beyond. In this dissertation, a number of Q-enhanced parallel synthesis techniques have been proposed and implemented to achieve high-order, frequency tunable, and wide bandwidth tunable filters. First, a tunable 4th-order BPF was proposed and implemented in Silicon Germanium (SiGe) BiCMOS technology. Along with center frequency tuning, the filter achieves first ever reported 3-dB bandwidth tuning from 2% to 25%, representing 120 MHz to 1.5 GHz of bandwidth at 6 GHz. A new set of design equations were developed for the 4th-order parallel synthesis of BPF. A practical switched varactor control scheme is proposed for large tuning ratio varactors to reduce the nonlinear contribution from the varactor substantially which improves the tunable LC BPF filter linearity. Second, parallel addition and subtraction techniques were proposed to realize tunable dual-band filters. The subtraction technique is implemented in SiGe BiCMOS technology at X and Ku bands with more than 50 dB of out-of-band attenuation. Finally, a true wideband band-reject filter technique was proposed for microwave frequencies using parallel synthesis of two band-pass filters and an all-pass path. The proposed band-reject scheme is tunable and wide 20 dB attenuation bandwidths on the order of 10s of MHz to 100s of MHz can be achieved using this scheme. The implementation of the proposed parallel synthesis techniques in silicon technology along with measured results demonstrate that Q-enhanced filtering is favorable at higher microwave frequencies. Therefore, such implementations are suitable for future wireless communication and radar systems particularly wide bandwidth systems on the order of 100s of MHz to GHz. Future research includes, high-order reconfigurable band-pass and band-reject filters, automatic tuning control, and exploring the parallel synthesis techniques in Gallium Nitride (GaN) technology for high RF power applications. / PHD

Inductors are extensively used in the design of radio-frequency circuits. In the last decade, the integration of passive components, especially inductors on silicon chips, has led to the widespread development and implementation of Radio Frequency Integrated Circuits (RFICs) in CMOS technologies. However, on-chip passive inductors occupy a large silicon chip area and hardly scale down with technology scaling. Therefore, on-chip passive inductors become formidable obstacles to the realization of highly dense RFICs to be integrated with other highly dense digital circuits on a single chip using a common fabrication process. In recent years, researchers have focused on replacing passive inductors with transistor-only active circuits, namely active inductors. Active inductors can be realized with only a few transistors, which scale down with technology scaling. Therefore, they occupy a fraction of the chip area of their passive counterparts, and can be implemented densely in CMOS processes. Unlike passive inductors, bias dependent operations of active inductors allow for the tuning of their inductance and quality factor Q, and in turn, tuning the performance parameters of RFICs. This thesis focuses on the design and development of passive inductorless CMOS RFICs for ultra-wideband (UWB) receiver front-ends using active inductors. A new Q-enhanced and a new bandwidth-extended tunable active inductors are designed. Using the Q-enhanced active inductor, two tunable UWB low-noise amplifiers (LNAs) (two-stage and three-stage UWB LNAs), a UWB mixer and a wideband local-oscillator (LO) driver are designed. Active inductors are utilized to develop a novel wideband active shunt-peaking technique that decreases high-frequency losses to yield a flat gain over a wide bandwidth. A tunable multiband-UWB front-end integrating a two-stage UWB LNA, and a pair of UWB mixers driven by a pair of wideband LO drivers, is fabricated in a 90nm digital CMOS process. The passive inductorless two-stage UWB LNA, three-stage UWB LNA and UWB front-end occupy chip areas of only 0.0114mm2, 0.0227mm2, and 0.1485mm2, respectively. The active CMOS UWB front-end exhibits a measured flat gain of 22.5dB over 2.5-8.8 GHz bandwidth, and its tunability allows for varying the gain and bandwidth. / Integrated Circuits and Systems

No description available.

In radio frequency (RF), filtering is an essential part of RF transceivers. They are employed for different purposes of band selection, channel selection, interference cancellation, image rejection, etc. These are all translated in selecting the wanted signal while mitigating the rest. This can be performed by either selecting the desired frequency range by a band pass filter or rejecting the unwanted part by a band stop filter. Although there has been tremendous effort to design RF tunable filters, there is still lack of designs with frequency and bandwidth software-tuning capability at frequencies above 4 GHz. This prevents the implementation of Software Defined Radios (SDR) where software tuning is a critical part in supporting multiple standards and frequency bands. Designing a tunable integrated filter will not only assist in realization of SDR, but it also causes an enormous shrinkage in the size of the circuit by replacing the current bulky off-chip filters. The main purpose of this research is to design integrated band pass and band stop filters aimed to perform interference cancellation. In order to do so, two systems are proposed for this thesis. The first system is a band pass filter capable of frequency and band with tuning for C band frequency range (4-8 GHz) and is implemented in 0.13 µm BiCMOS technology. Frequency tunability is accomplished by using a variable capacitor (varactor) and bandwidth tuning is carried out by employing a negative transconductance cell to compensate for the loss of the elements. Additional circuitry is added to the band pass filter to enhance the selectivity of the filter. The second system is a band stop filter (notch) with the same capability as the band pass filter in terms of tuning. This system is implemented in C band, similar to its band stop counterpart and is capable of tuning its depth by using a negative transconductance in an LC tank. A negative feedback is added to the circuit to improve the bandwidth. While implemented in the same process as the band pass filter, it only employs CMOS transistors since it is generally more attractive due to its lower cost and scalability. Both of the systems mentioned use a varactor for changing the center frequency which is a nonlinear element. Therefore, the nonlinearity of it is modelled using two different methods of nonlinear feedback and Volterra series in order to gain further understanding of the nonlinear process taking place in the LC tank. After the validation of the models proposed using Cadence Virtuoso simulator, two methods of design and tuning are suggested to improve the linearity of the system. After post layout-extraction, the band pass filter is capable of Q tuning in the range of 3 to 270 and higher. With the noise figure of 10 to 14 dB and input 1-dB compression point as high as 2 dBm, the system shows a reasonably good performance along its operating frequency of 4 to 8 GHz. The band stop filter which is designed in the same frequency band can achieve better than 55 dB of rejection with the noise figure of 6.7 to 8.8 dB and 1-dB compression point of -4 dBm. With the power consumption of 39 to 70 mW, the band stop filter can be used in a low power receiver to suppress unwanted signals. The technique used in the band stop filter can be applied to higher frequency ranges if the circuit is implemented in a more advanced silicon technology. Implementing the mentioned filters in a receiver along with other elements of low noise amplifiers, mixers, etc. would be a major step toward full implementation of SDR systems. Studying the linearity theory of varactors would help future designers identify the sources of nonlinearity and suggest more efficient tuning techniques to improve the linearity of RF electronic systems. / Master of Science