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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Superharmonic Injection Locked Quadrature LC VCO Using Current Recycling Architecture

Kalusalingam, Shriram 2010 December 1900 (has links)
Quadrature LO signal is a key element in many of the RF transceivers which tend to dominate today’s wireless communication technology. The design of a quadrature LC VCO with better phase noise and lower power consumption forms the core of this work. This thesis investigates a coupling mechanism to implement a quadrature voltage controlled oscillator using indirect injection method. The coupling network in this QVCO couples the two LC cores with their super-harmonic and it recycles its bias current back into the LC tank such that the power consumed by the coupling network is insignificant. This recycled current enables the oscillator to achieve higher amplitude of oscillation for the same power consumption compared to conventional design, hence assuring better phase noise. Mathematical analysis has been done to study the mechanism of quadrature operation and mismatch effects of devices on the quadrature phase error of the proposed QVCO. The proposed quadrature LC VCO is designed in TSMC 0.18 μm technology. It is tunable from 2.61 GHz - 2.85 GHz with sensitivity of 240 MHz/V. Its worst case phase noise is -120 dBc/Hz at 1 MHz offset. The total layout area is 1.41 mm^2 and the QVCO core totally draws 3 mA current from 1.8 V supply.
2

A Study and Design of High Performance Voltage-Controlled Oscillators in 65nm CMOS Technology

Afghari, Kamran January 2012 (has links)
In recent years, oscillators are considered as inevitable blocks in many electronic systems. They are commonly used in digital circuits to provide clocking and in analog/RF circuits of communication transceivers to support frequency conversion. Nowadays, CMOS technology is the most applicable solution for VLSI and especially for modern integrated circuits used in wireless communications. The main purpose of this project is to design a high performance voltage-controlled oscillator (LC VCO) using 65nm CMOS technology. To meet the state-of-the-art requirements, several circuit solutions have been explored and the design work ended-up with a Quadrature VCO. The circuit operates at center frequency of 2.4 GHz. The phase noise of QVCO obtained by simulation is -140 dBc/Hz at 1MHz offset frequency which is 6 dB less compared to conventional LC VCOs. The power consumption is 3.6mW and the tuning voltage can be swept from 0.2 V to 1.2 V resulting in 2.25 GHz - 2.55 GHz frequency range.
3

Validation de la chaîne d'émission pour la conception d'un capteur RF autonome

Thabet, Hanen 08 July 2013 (has links)
Ce travail s’inscrit dans un projet consistant à développer un prototype de capteur RF autonome et intelligent permettant la réalisation d’un réseau de capteurs sans fil dans un environnement industriel. Cette thèse traite de l’étude, la conception et la réalisation de la partie radiofréquence de la chaîne d’émission sans fils du capteur RF dans la bande ISM 863-870 MHz en technologie CMOS AMS 0.35µm. Cette chaîne inclut toutes les fonctions depuis l’oscillateur local jusqu’à l’amplificateur de puissance. L’émetteur occupe une surface de 0.22mm² et consomme environ 27mA sous une tension d’alimentation de 3.3V. De nombreux principes innovants ont été mis en œuvre et validés. Tous ces principes peuvent être facilement transposés à d’autres standards de communication et dans d’autres bandes de fréquences. Les résultats de simulations du dessin des masques vérifient complètement les spécifications et confirment les simulations. Une caractérisation expérimentale partielle valide les nouvelles architectures proposées. / This work joins in a project consisting in developing prototype of an autonomous and smart RF sensor allowing the realization of a wireless sensor network in an industrial environment. This thesis deals with the study, the design and the realization of the radio-frequency part of the transmitter using the 863-870 MHz ISM band and the CMOS AMS 0.35µm technology. This transmitter includes all the functions from the local oscillator to the power amplifier. The integrated circuit occupies a surface of 0.22mm² and consumes approximately 27mA under a supply voltage of 3.3V. Numerous innovative principles were implemented and validated. All these principles can be easily transposed into other standards of communication and in other frequency bands. The results of the post-layout simulation completely satisfy the specifications and confirm the simulations. Partial experimental characterization validates new architectures proposed.
4

Wide-Band Multi-Mode Voltage Tuning Oscillators utilizing Phase-Change Switches

Khairi, Ahmad B. 01 September 2016 (has links)
With the emergence of multi-standard and cognitive radios, the need for reconfigurable RF circuits increased. Such circuits require wide-band quadrature voltage controlled oscillators (QVCOs) to provide the local oscillator (LO) signal for up and down conversion. Wide-band QVCOs performance has lagged behind their narrowband VCO counterparts and numerous circuit techniques have been introduced to bridge the gap. This dissertation presents techniques that have been used to implement wide-band reconfigurable QVCOs with focus on dual-resonance based circuits. System and circuit analysis are performed to understand the tuning-range, phase noise, and power tradeoffs and to consider quadrature phase errors. An 8.8-15.0 GHz actively coupled QVCO and a 13.8-20GHz passively coupled QVCO are presented. Both oscillators employ dual-resonance to achieve extended tuning ranges. Impulse sensitivity functions were used to study the impact of different passive and active device noises on the overall phase noise performance of the dual-resonance oscillator and the actively and passively coupled quadrature oscillators. The quadrature phase error due to the different architecture parameters were investigated for the actively and passively coupled quadrature oscillators. The advantages of using switched capacitor tuning as a major part of passive tuning are identified, and the advantage of employing switches with large bandwidths, such as those associated with phase change materials, is mathematically quantified. Furthermore, a novel method for accurate off chip phase error measurement using discrete components and phase shifters that does not require calibration is introduced.
5

Design and analysis of key components for manufacturable and low-power CMOS millimeter-wave receiver front end

Hsin, Shih-Chieh 02 November 2012 (has links)
The objective of this dissertation is to develop key components of a CMOS heterodyne millimeter-wave receiver front end. Robust designs are necessary to overcome PVT variations as well as modeling inaccuracies, while with minimum power consumption overhead to facilitate low-power radio for portable applications. Heterodyne receiver topology is adopted because of its robust performances at millimeter-wave frequencies. Device models for both passive and active devices are developed and used in the circuit designs in this dissertation. Two low-noise amplifiers (LNAs) are developed in this dissertation. The first LNA features a proposed temperature-compensation biasing technique, which confines the gain variation within 5 dB for temperature variation from -5 to 85 Celsius degree. The measured gain and NF are 21 and 6.5 dB, respectively, for 49-mW power dissipation. The second LNA reveals a design technique to tolerate a low-accuracy model at millimeter-wave frequencies. Both LNAs provide full coverage of the FCC 60-GHz band (57-64 GHz). For the frequency generation circuits, both the IF QVCO and mm-wave VCO are investigated. The inherent bimodal oscillation of QVCOs is analyzed and, for the first time, a systematic measurement technique is proposed to intentionally control the oscillation mode. This technique is further utilized to extend the tuning range of the QVCO, which possesses dual tuning curves without penalty on phase noise. The measurement results of a 13-GHz QVCO in 90-nm CMOS reveals a 21.4% tuning range for continuously tuning from 11.7 to 14.5 GHz. The measured phase noise is -108 dBc/Hz at 1 MHz offset with a core power consumption of 10.8 mW. A millimeter-wave VCO is designed and fabricated in 65-nm CMOS. The VCO is fully characterized under voltage stress to examine the hot-carrier injection effects affecting the performance of a millimeter-wave VCO. The 41.6-47.4 GHz VCO is further integrated into a millimeter-wave down converter. The power-hungry buffer amplifiers are neglected by proper floor planning. Conversion loss of 1.4 dB is obtained with total power consumption of 72.5 mW. Lastly, a power management system consisting of low-dropout (LDO) regulators is designed and integrated in a 90-nm CMOS millimeter-wave transceiver to provide stable and low-noise supply voltages. Voltage variation issues are alleviated by the LDOs.
6

Σχεδίαση υψίσυχνου ταλαντωτή με υπολογιστή

Φραγκουλόπουλος, Ανδρέας 19 October 2012 (has links)
Η χρήση ταλαντωτών γίνεται σε όλα τα τηλεπικοινωνιακά και στα περισσότερα ψηφιακά κυκλώματα. Αποτελεί βασικό πυλώνα πάνω στον οποίο στηρίζεται η ποιότητα του τηλεπικοινωνιακού σήματος. Για να παράγει έξοδο για διαφορετικά κανάλια μιας τηλεπικοινωνιακής περιοχής, θα πρέπει ο ταλαντωτής μας να αλλάζει την παραγόμενη συχνότητα του. Μια ειδική κατηγορία αυτών είναι οι ταλαντωτές ελεγχόμενοι από τάση, VCO . Οι ταλαντωτές που χρησιμοποιούνται σήμερα ανήκουν σε 2 βασικές κατηγορίες: ● Ταλαντωτές LC, όπου χρησιμοποιείται ένα συντονιζόμενο κύκλωμα, αποτελούμενο από επαγωγή L και χωρητικότητα C, που από κοινού καθορίζουν την συχνότητα λειτουργίας του ταλαντωτή. ● Ταλαντωτές δακτυλίου, χρησιμοποιούν κυκλώματα RC μετάθεσης φάσης Οι πρώτοι υπερέχουν στον χαμηλότερο θόρυβο και κατανάλωση, οι δεύτεροι σε μικρότερη επιφάνεια υλοποίησης και μεγαλύτερη περιοχή συχνοτήτων. Η μελέτη έγινε για ολοκληρωμένο κύκλωμα ASIC, BiCmos 0,35μm της Austriamicrosystems. Η περιοχή συχνοτήτων του VCO είναι 10GHz – 10,5GHz. Η πορεία πέρασε από την εξομοίωση των επιμέρους τμημάτων του ταλαντωτή και σταδιακά στην σύνθεσή τους. Το ζητούμενο ήταν να επιτευχθεί η χαμηλότερη στάθμη θορύβου, στα προδιαγεγραμμένα όρια λειτουργίας. Το γεγονός αυτό οδήγησε σε διαρκείς εξομοιώσεις. Στην συνέχεια μετεξελίχθηκε σε ορθογώνιο ταλαντωτή QVCO με την ίδια περιοχή εξόδου. Η διαδικασία επαναλήφτηκε για την επίτευξη της μέγιστης απόδοσης. Για την εξομοίωση χρησιμοποιήθηκε το Advanced Design System της Agilent. Η τροφοδοσία του κυκλώματος είναι στα 3volts. Η κατανάλωση 42mw για τον ταλαντωτή VCO, 90mW για τον ταλαντωτή QVCO. Ο θόρυβος φάσης είναι χαμηλότερος από -114dBc/Hz στα 10KHz για το VCO και -100dBc/Hz στα 10KHz για το QVCO. / Design of an integrated ASIC Austriamicrosystems (AMS), 0.35mm technology, quadrature voltage controlled oscillator in the range of 10GHz. The design and simulation environment had occurred in the ADS of Agilent. This design was aimed at the lowest possible noise level.

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