• Refine Query
  • Source
  • Publication year
  • to
  • Language
  • 184
  • 56
  • 44
  • 23
  • 20
  • 12
  • 12
  • 3
  • 2
  • 2
  • 2
  • 2
  • 2
  • 2
  • 1
  • Tagged with
  • 438
  • 94
  • 56
  • 53
  • 50
  • 46
  • 43
  • 38
  • 35
  • 32
  • 31
  • 30
  • 30
  • 27
  • 26
  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
111

Analysis and Mitigation of SEU-induced Noise in FPGA-based DSP Systems

Pratt, Brian Hogan 11 February 2011 (has links)
This dissertation studies the effects of radiation-induced single-event upsets (SEUs) on digital signal processing (DSP) systems designed for field-programmable gate arrays (FPGAs). It presents a novel method for evaluating the effects of radiation on DSP and digital communication systems. By using an application-specific measurement of performance in the presence of SEUs, this dissertation demonstrates that only 5-15% of SEUs affecting a communications receiver (i.e. 5-15% of sensitive SEUs) cause critical performance loss. It also reports that the most critical SEUs are those that affect the clock, global reset, and most significant bits (MSBs) of computation. This dissertation also demonstrates reduced-precision redundancy (RPR) as an effective and efficient alternative to the popular triple modular redundancy (TMR) for FPGA-based communications systems. Fault injection experiments show that RPR can improve the failure rate of a communications system by over 20 times over the unmitigated system at a cost less than half that of TMR by focusing on the critical SEUs. This dissertation contrasts the cost and performance of three different variations of RPR, one of which is a novel variation developed here, and concludes that the variation referred to as "Threshold RPR" is superior to the others for FPGA systems. Finally, this dissertation presents several methods for applying Threshold RPR to a system with the goal of reducing mitigation cost and increasing the system performance in the presence of SEUs. Additional fault injection experiments show that optimizing the application of RPR can result in a decrease in critical SEUs by as much 65% at no additional hardware cost.
112

Recovery Performance in Redundant Campus Network

Mchedlishvili, Sergo, Srinivasa, Girinandan January 2009 (has links)
<p>Over years<strong>,</strong> there have been tremendous changes in internetworking technologies and there are a number of real time applications that are flooded into the market. Most real-time applications are sensitive to traffic loss because of their nature of exchanging data without acknowledgement. In any type of data network, redundancy is important to backup and recover the connectivity without human intervention in case of device or link failure. However, it is very crucial to design an optimal redundant network, particularly for real-time applications providing minimal losses during fail-over. Configuration of redundancy in different networks varies and depends on the equipment and network design itself.</p><p>This thesis focuses on the redundancy needed in campus network design which is quite popular nowadays in most of medium and large enterprises, universities or government agencies. Two major designs of redundancy are studied: default gateway redundancy and routed access. In the first option<strong>,</strong> the one logical segment of network uses common L2 switches while in the other – the same segment is constructed with more expensive advanced multilayer switches. The network is built in the lab environment. As an example of real-time communication the VoIP call is simulated in the network. The failures on different areas of nodes or links are caused manually. Results of packet loss during fail-over are recorded. The baseline of recovery performance is constructed using these results which are derived from different scenarios using different configurations and equipment. The baseline data is evaluated and conclusion is made on the trade-offs, limitations, advantages and disadvantages of the redundancy options in the campus network design.</p><p>The work done in this thesis is supportive for network architects and designers to take into consideration the equipment and configuration to be used when implementing redundancy for real-time communications. The results and conclusion will support them in choosing the options for constructing the redundant network<strong>,</strong> or taking into account the trade-offs when migrating from one option to another.</p>
113

Overview of Redundancy Analysis and Partial Linear Squares and Their Extension to the Frequency Domain

Liu, Jinyi Jr 30 April 2011 (has links)
Applied statisticians are often faced with the problem of dealing with high dimensional data sets when attempting to describe the variability of a single set of variables, or trying to predict the variation of one set of variables from another. In this study, two data reduction methods are described: Redundancy Analysis and Partial Least Squares. A hybrid approach developed by Bougeard et al., (2007) and called Continuum Redundancy-Partial Least Squares, is described. All three methods are extended to the frequency domain in order to allow the lower dimensional subspace used to describe the variability to change with frequency. To illustrate and compare the three methods, and their frequency dependent generalizations, an idealized coupled atmosphere-ocean model is introduced in state space form. This model provides explicit expressions for the covariance and cross spectral matrices required by the various methods; this allows the strengths and weaknesses of the methods to be identified.
114

Increasing the energy efficiency of parallel manipulators by means of kinematic redundancy and Model Predictive Control / Aumentando a eficiência energética dos manipuladores paralelos por meio da redundância cinemática e do Modelo de Controle Preditivo

Andrés Gómez Ruiz 04 December 2017 (has links)
The use of robotic manipulators in industrial applications is continuously growing. Therefore, the proposal of novel kinematic architectures for robotic manipulators can be a strategy for coping with the required performance of specific tasks. On this matter, the parallel manipulators represent an alternative to fulfill this gap. The objective of this manuscript is to prove that the energy efficiency of parallel manipulators can be increased by the use of kinematic redundancy. Due to the presence of kinematic redundancy, the number of solutions to the inverse kinematics problem become infinite. Hence, a redundancy resolution scheme is required to select a suitable one among the infinite solutions. In this work, a model predictive control (MPC) based method is proposed as redundancy resolution scheme. This proposal is evaluated numerically and experimentally by comparing the energy consumption of non-redundant and kinematically redundant manipulators during the execution of pre-defined tasks. The non-redundant manipulator under study is the planar parallel 3RRR manipulator. This manipulator consists of three identical kinematic chains containing one active revolute joint and two passive revolute joints. Kinematic redundancies were added to the manipulator by including one active prismatic joint in each kinematic chain. In this way, the kinematically redundant manipulator under study is the planar parallel 3PRRR manipulator. By activating or locking the prismatic joints, up to three levels of kinematic redundancy can be evaluated. Numerical kinematic and dynamic models of the manipulators under study were derived not only for their numerical evaluation but also for the derivation of the model-based redundancy resolution scheme. Experimental data was acquired using the prototype built at the Laboratory of Dynamics at São Carlos School of Engineering at University of São Paulo. This experimental data was exploited for assessing the usability of the MPC for deriving a redundancy resolution scheme and for evaluating the impact of several levels of kinematic redundancy on the manipulator\'s energy consumption. Based on this data, one can conclude that MPC can be a suitable alternative for solve redundancy resolution problems and that the redundant parallel manipulators presented a lower energy consumption than the non-redundant one to execute the pre-defined tasks. The rate of reduction on the energy consumption achieved by the redundant manipulators varied between 6% and 60% depending on the task. Nevertheless, the numerical and experimental data presented differences in some particular cases. / O número de aplicações realizadas pelos manipuladores robóticos cresce continuamente. Assim, o desenvolvimento de novas arquiteturas para os manipuladores robóticos mais adaptadas a aplicações concretas é necessário. Destarte, os manipuladores paralelos constituem uma alternativa a ser considerada. O objetivo deste texto é provar que a eficiência energética dos manipuladores paralelos pode ser incrementada por meio da redundância cinemática. A presença de redundância cinemática implica um número infinito de soluções no problema da cinemática inversa. Logo, é precisso um esquema de resolução de redundância para escolher uma das soluções. No presente texto, um método baseado no modelo de controle preditivo (MPC), é proposto como esquema de resolução de redundância. Esta proposta é avaliada tanto numérica como experimentalmente comparando o consumo energético dos manipuladores não redundante e redundantes durante a execução de umas trajetórias predefinidas. O manipulador paralelo não redundante estudado é o 3RRR. Este manipulador é composto por três cadeias cinemáticas idênticas que incluem uma junta rotativa ativa e duas juntas rotativas passivas. Redundâncias cinemáticas foram adicionadas ao manipulador incluindo uma junta prismática ativa em cada uma das três cadeias cinemáticas, obtendo assim, o manipulador redundante 3PRRR. Ativando ou bloqueando as juntas prismáticas podem ser avaliados até três níveis de redundância cinemática. Modelos matemáticos dos manipuladores foram propostos tanto para a estabelecer uma avaliação numérica como para a dedução do esquema de resolução de redundância. Um protótipo do manipulador 3PRRR construído na Escola da Engenharia de São Carlos foi usado para realizar os experimentos. Os dados experimentais foram utilizados para comprovar a utilidade do MPC como esquema de resolução de redundância, e para avaliar os efeitos da redundância cinemática no consumo energético. Com fundamento nos resultados é possível concluir que o MPC pode ser uma alternativa adequada para resolver problemas de resolução de redundância e que os manipuladores paralelos redundantes apresentaram um menor consumo energético para realizar a mesma tarefa quando comparados aos não redundante. A taxa de redução da energia em favor dos manipuladores redundantes varia entre 6% e 60% dependendo da tarefa. Por outro lado, a análise numérica mostrou discrepâncias com a análise experimental em certas circunstâncias.
115

Optimizing network design in regards of critical streaming media

Skjaevesland, Ola January 2012 (has links)
When designing networks intended to carry real-time media that is critical to arrive several aspects must be considered. For instance, the network must have redundant connectivity, should this traffic (and if so, how) be prioritized in networks where other traffic also travel, which technology is best in the given situation etc. This report will describe technologies that can solve these problems after which some of some of them will be tested in laborations to see how well they measure up in a given problem. The report establishes that in a self-governed LAN link aggregation in collaboration with Virtual Router Redundancy Protocol is a solid solution for providing redundancy with fast reconvergence. On WAN-connections and other shared networks Quality of Service rules should be implemented and in the case of Internet Service Providers a Service Level Agreement should be established.
116

Modelování protokolů pro redundanci brány / Modelling Gateway Redundancy Protocols

Vítek, Petr January 2013 (has links)
This master's thesis report deals with the theoretical analysis of FHRP. First Hop Redundancy Protocols are network protocols which are designed to protect the default gateway and also to ensure high availability in the network by using redundancy. The reader becomes familiar with protocols VRRP, HSRP and GLBP and also learn the way how to configure them to on real Cisco devices. It also describes how implement VRRP int the simulated enviroment of OMNeT++. The result of the implementation is verified in the test topologies.
117

Modelling and simulation framework incorporating redundancy and failure probabilities for evaluation of a modular automated main distribution frame

Botha, Marthinus Ignatius January 2013 (has links)
Maintaining and operating manual main distribution frames is labour-intensive. As a result, Automated Main Distribution Frames (AMDFs) have been developed to alleviate the task of maintaining subscriber loops. Commercial AMDFs are currently employed in telephone exchanges in some parts of the world. However, the most significant factors limiting their widespread adoption are costeffective scalability and reliability. Therefore, an impelling incentive is provided to create a simulation framework in order to explore typical implementations and scenarios. Such a framework will allow the evaluation and optimisation of a design in terms of both internal and external redundancies. One of the approaches to improve system performance, such as system reliability, is to allocate the optimal redundancy to all or some components in a system. Redundancy at the system or component levels can be implemented in one of two schemes: parallel redundancy or standby redundancy. It is also possible to mix these schemes for various components. Moreover, the redundant elements may or may not be of the same type. If all the redundant elements are of different types, the redundancy optimisation model is implemented with component mixing. Conversely, if all the redundant components are identical, the model is implemented without component mixing. The developed framework can be used both to develop new AMDF architectures and to evaluate existing AMDF architectures in terms of expected lifetimes, reliability and service availability. Two simulation models are presented. The first simulation model is concerned with optimising central office equipment within a telephone exchange and entails an environment of clients utilising services. Currently, such a model does not exist. The second model is a mathematical model incorporating stochastic simulation and a hybrid intelligent evolutionary algorithm to solve redundancy allocation problems. For the first model, the optimal partitioning of the model is determined to speed up the simulation run efficiently. For the second model, the hybrid intelligent algorithm is used to solve the redundancy allocation problem under various constraints. Finally, a candidate concept design of an AMDF is presented and evaluated with both simulation models. / Dissertation (MEng)--University of Pretoria, 2013. / gm2014 / Electrical, Electronic and Computer Engineering / unrestricted
118

A Study on Fault Tolerance of Object Detector Implemented on FPGA / En studie om feltolerans för objektdetektor Implementerad på FPGA

Yang, Tiancheng January 2023 (has links)
Objektdetektering har fått stort forskningsintresse de senaste åren, eftersom det är maskiners ögon och är en grundläggande uppgift inom datorseende som syftar till att identifiera och lokalisera föremål av intresse. Hårdvaruacceleratorer syftar vanligtvis till att öka genomströmningen för realtidskrav samtidigt som energiförbrukningen sänks. Studier av feltolerans säkerställer att algoritmen utförs korrekt även med felpresentation. Denna avhandling täcker dessa ämnen och tillhandahåller en Field-Programmable Gate Array (FPGA)-implementering av en objektdetekteringsalgoritm, You Only Look Once (YOLO), samtidigt som man undersöker implementeringens feltolerans. En baslinjeimplementering på FPGA tillhandahålls först och sedan tillämpas, implementeras och testas två feltoleranta implementeringar, en med trippelmodulär redundans och en med tidsredundans. Fastnade fel injiceras i implementeringarna för att studera feltoleransen. Vår FPGA-implementering av YOLO ger en höghastighets, låg strömförbrukning och mycket konfigurerbar hårdvaruaccelerator för objektdetektering. I detta examensarbete görs implementeringsdesignen med en kombination av egendesignade moduler med VHDL och Xilinx-försedd Intellectual Property (IP). Jämfört med andra forsknings- eller öppen källkodsversioner som använder High-Level Synthesis (HLS), är denna design mer konfigurerbar för framtida referenser och tar bort onödiga hårdvarusvarta lådor. Jämfört med andra studier om hårdvaruacceleratorer fokuserar denna avhandling på feltolerans. Detta examensarbete skapar utrymme för mer arbete med att utforska feltolerans, t.ex. skapa en mer feltolerant implementering eller undersöka hur vissa fel kan påverka resultatet. Det är också möjligt att använda implementeringen från denna avhandling som baslinje för andra forskningsändamål, eftersom implementeringen är fristående och mycket konfigurerbar. / Object detection gets great research interest in recent years, as it is the eyes of machines and is a fundamental task in computer vision that aims at identifying and locating objects of interest. Hardware accelerators usually aim at boosting the throughput for real-time requirements while lowering power consumption. Studies on fault tolerance ensure the algorithm to be performed correctly even with error presenting. This thesis covers these topics and provides a Field-Programmable Gate Array (FPGA) implementation of an object detection algorithm, You Only Look Once (YOLO), while investigating the fault tolerance of the implementation. A baseline implementation on FPGA is first provided and then two fault-tolerant implementations, one with triple-modular redundancy and one with time redundancy are applied, implemented, and tested. Stuck-at faults are injected into the implementations to study the fault tolerance. Our FPGA implementation of YOLO provides a high-speed, low-power-consumption, and highly-configurable hardware accelerator for object detection. In this thesis, the implementation design is done with a combination of self-designed modules with VHDL and Xilinx-provided Intellectual Property (IP). Compared to other research or open-source versions using High-Level Synthesis (HLS), this design is more configurable for future references and removes unnecessary hardware black boxes. Compared to other studies on hardware accelerators, this thesis focuses on fault tolerance. This thesis creates space for more work on exploring fault tolerance, e.g., creating a more fault-tolerant implementation or investigating how certain faults could affect the result. It is also possible to use the implementation from this thesis as a baseline for other research purposes, as the implementation is stand-alone and highly configurable.
119

A topological reliability model for TCP/IP over Ethernet networks / Eugene Coetzee

Coetzee, Eugene January 2014 (has links)
Network failures can originate from or be located in any one of several network layers as described by the OSI model. This investigation focuses on the role of physical topological design parameters in determining network reliability and performance as can be expected from the point of view of a typical client-server based connection in an Ethernet local area network. This type of host-to-host IP connection is found in many commercial, military and industrial network based systems. Using Markov modelling techniques reliability and performability models are developed for common network topologies based on the redundancy mechanism provided by IEEE spanning tree protocols. The models are tested and validated using the OPNET network simulation environment. The reliability and performability metrics calculated from the derived models for different topologies are compared leading to the following conclusions. The reliability of the entry-nodes into a redundant network is a determining factor in connection availability. Redundancy mechanisms must be extended from the entry-node to the connecting hosts to gain a significant benefit from redundant network topologies as network availability remains limited to three-nines. The hierarchical mesh network offers the highest availability (sevennines) and performability. Both these metrics can be accurately predicted irrespective of the position of the entry-node in the mesh. Ring networks offer high availability (five to sevennines) and performability if the ring remains small to medium sized, however for larger rings (N≥32) the availability is highly dependant on the relative position of the entry-node in the ring. Performability also degrades significantly as the ring size increases. Although star networks offer predictable and high performability the availability is low (four-nines) because of the lack of redundancy. The star should therefore not be used in IP networked systems requiring more than four-nines availability. In all the topologies investigated the reliability and performability can be increased significantly by introducing redundant links instead of single links interconnecting the various nodes, with the star topology availability increasing from four-nines to seven-nines and performance doubling. / MIng (Computer and Electronic Engineering), North-West University, Potchefstroom Campus, 2014
120

A topological reliability model for TCP/IP over Ethernet networks / Eugene Coetzee

Coetzee, Eugene January 2014 (has links)
Network failures can originate from or be located in any one of several network layers as described by the OSI model. This investigation focuses on the role of physical topological design parameters in determining network reliability and performance as can be expected from the point of view of a typical client-server based connection in an Ethernet local area network. This type of host-to-host IP connection is found in many commercial, military and industrial network based systems. Using Markov modelling techniques reliability and performability models are developed for common network topologies based on the redundancy mechanism provided by IEEE spanning tree protocols. The models are tested and validated using the OPNET network simulation environment. The reliability and performability metrics calculated from the derived models for different topologies are compared leading to the following conclusions. The reliability of the entry-nodes into a redundant network is a determining factor in connection availability. Redundancy mechanisms must be extended from the entry-node to the connecting hosts to gain a significant benefit from redundant network topologies as network availability remains limited to three-nines. The hierarchical mesh network offers the highest availability (sevennines) and performability. Both these metrics can be accurately predicted irrespective of the position of the entry-node in the mesh. Ring networks offer high availability (five to sevennines) and performability if the ring remains small to medium sized, however for larger rings (N≥32) the availability is highly dependant on the relative position of the entry-node in the ring. Performability also degrades significantly as the ring size increases. Although star networks offer predictable and high performability the availability is low (four-nines) because of the lack of redundancy. The star should therefore not be used in IP networked systems requiring more than four-nines availability. In all the topologies investigated the reliability and performability can be increased significantly by introducing redundant links instead of single links interconnecting the various nodes, with the star topology availability increasing from four-nines to seven-nines and performance doubling. / MIng (Computer and Electronic Engineering), North-West University, Potchefstroom Campus, 2014

Page generated in 0.1579 seconds