Random numbers are important for gaming, simulation and cryptography. Random numbers have been generated using analog circuitry. Two problems exist with using analog circuits in a digital design: (1) analog components require an analog circuit designer to insure proper structure and functionality and (2) analog components are not easily transmigrated into a different fabrication technology. This paper proposes a class of random number generators that are constructed using only digital components and typical digital design methodology. The proposed classification is called divergent path since the path of generated numbers through the range of possible values diverges at every sampling. One integrated circuit was fabricated and several models were synthesized into a FPGA. Test results are given.

Random number generator is a key component for strengthening and securing the confidentiality of electronic communications. Random number generators can be divided as either pseudo random number generators or true random number generators. A pseudo random number generator produces a stream of numbers that appears to be random but actually follow predefined sequence. A true random number generator produces a stream of unpredictable numbers that have no defined pattern. There has been growing interest to design true random number generator in past few years. Several Field Programmable Gate Array (FPGA) and Application Specific Integrated Circuit (ASIC) based approaches have been used to generate random data that requires analog circuit. RNGs having analog circuits demand for more power and area. These factors weaken hardware analog circuit-based RNG systems relative to hardware completely digital-based RNGs systems. This thesis is focused on the design of completely digital true random number generator ASIC.

Quantum key distribution (QKD) can provide unconditional security based on the fundamental laws of quantum physics. Unfortunately, real-life implementations of a QKD system may contain overlooked imperfections and thus violate the practical security of QKD. It is vital to explore these imperfections. In this thesis, I study two practical imperfections in QKD: i) Discovering security loophole in a commercial QKD system: I perform a proof-of-principle experiment to demonstrate a technically feasible quantum attack on top of a commercial QKD system. The attack I utilize is called phase-remapping attack. ii) Generating high-speed truly random numbers: I propose and experimentally demonstrate an ultrafast QRNG at a rate over 6 Gb/s, which is based on the quantum phase fluctuations of a laser. Moreover, I consider a potential adversary who has partial knowledge of the raw data and discuss how one can rigorously remove such partial knowledge with post-processing.

Quantum key distribution (QKD) can provide unconditional security based on the fundamental laws of quantum physics. Unfortunately, real-life implementations of a QKD system may contain overlooked imperfections and thus violate the practical security of QKD. It is vital to explore these imperfections. In this thesis, I study two practical imperfections in QKD: i) Discovering security loophole in a commercial QKD system: I perform a proof-of-principle experiment to demonstrate a technically feasible quantum attack on top of a commercial QKD system. The attack I utilize is called phase-remapping attack. ii) Generating high-speed truly random numbers: I propose and experimentally demonstrate an ultrafast QRNG at a rate over 6 Gb/s, which is based on the quantum phase fluctuations of a laser. Moreover, I consider a potential adversary who has partial knowledge of the raw data and discuss how one can rigorously remove such partial knowledge with post-processing.

Digital video broadcasting for Terrestrial (DVB-T) is one of the major standards for the fixed reception of digital television services, and the orthogonal frequency division multiplexing (OFDM) demodulator is a critical module of DVB-T receivers. As the remarkable advace of the VLSI (very large scale integration) circuits, the SOC (system-on-a-chip) of the DVB-T receiver is an inevitabel evolution. Considering the integration of the mixed-signal circuits, the issues ot beat could be the frequency synthesis and the calibration of the mixed-signal circuits. Hence, this thesis proposes an OFDM demodulator and discusses the design issues emerged from the SOC integration. The proposed OFDM demodulator is composed of four blocks: time synchronization, frequency synchronization, 2K/8K mode FFT (fast Fourier transform), and channel estimation. The demodulator utilizes the pilot signals embeded in OFDM symbols to estimate the frequency offset and the channel response. Besides, the demodulator use the cyclic prefix of an OFDM symbol to find the correct starting position of an OFDM symbol, and consequently the payload data of an OFDM symbol can be transmitted to the 2K/8K FFT for further processing. As the demand for a low noise frequency signal, we propose a direct digital frequency synthesizer (DDFS) based on the quadruple angle approximation. According to the proposed trigonometric 2nd-order quadruple angle approximation, the DDFS can produce a high-resolution and low-phase noise digital sinusoid without any ROM (read only memory). The digital calibration is an effective scheme to prevent ADCs (analog-to-digital converter) from the interference of noise. A random number generator (RNG) is an essential component for the calibration circuitry. However, the realization of the RNG is an important but long ignored issue. This thesis proposes a RNG based on a chaotic system wherein the coefficients of the system is dynamically changed to attain an ideal random bit stream with flat power spectrum density.

Pseudorandom number generator‘s statistical features were analyzed in this work. Pseudorandom numbers are applied in many fields, that‘s why it‘s important for them to satisfy following requirements: • to have uniform distribution, • to be uncorrelated. Hypothesis that random numbers are distributed uniformly is checked by Pearson test. Hypothesis that autocorrelation function is equal to zero is checked by Box Ljung test. During investigation it was noticed, that in all ways generated random numbers didn’t have uniform distribution, except linear congriuential generator. Applying different transformations was set, that for combinations v1-v8 when using parabola, transformed random numbers had uniform distribution. Arcsine was the best transformation for nonlinear congriuential generator. While testing hypothesis about autocorrelation function’s equality to zero was noticed, that zero hypothesis rejection or not depends on: • random numbers generation algorithm, • generated sample size, The best generator, which satisfied requirements, is linear congriuential generator, but it is not suitable, because it is too predictable. Nonlinear congruential generator is chosen as the best one, because its statistical features are closest to the linear generator.

Information in the form of online multimedia, bank accounts, or password usage for diverse applications needs some form of security. the core feature of many security systems is the generation of true random or pseudorandom numbers. Hence reliable generators of such numbers are indispensable. the fundamental hurdle is that digital computers cannot generate truly random numbers because the states and transitions of digital systems are well understood and predictable. Nothing in a digital computer happens truly randomly. Digital computers are sequential machines that perform a current state and move to the next state in a deterministic fashion. to generate any secure hash or encrypted word a random number is needed. But since computers are not random, random sequences are commonly used. Random sequences are algorithms that generate a pattern of values that appear to be random but after some time start repeating. This thesis implements a digital random number generator using MATLAB, FGPA prototyping, and custom silicon design. This random number generator is able to use a truly random CMOS source to generate the random number. Statistical benchmarks are used to test the results and to show that the design works. Thus the proposed random number generator will be useful for online encryption and security.

Information in the form of online multimedia, bank accounts, or password usage for diverse applications needs some form of security. the core feature of many security systems is the generation of true random or pseudorandom numbers. Hence reliable generators of such numbers are indispensable. the fundamental hurdle is that digital computers cannot generate truly random numbers because the states and transitions of digital systems are well understood and predictable. Nothing in a digital computer happens truly randomly. Digital computers are sequential machines that perform a current state and move to the next state in a deterministic fashion. to generate any secure hash or encrypted word a random number is needed. But since computers are not random, random sequences are commonly used. Random sequences are algorithms that generate a pattern of values that appear to be random but after some time start repeating. This thesis implements a digital random number generator using MATLAB, FGPA prototyping, and custom silicon design. This random number generator is able to use a truly random CMOS source to generate the random number. Statistical benchmarks are used to test the results and to show that the design works. Thus the proposed random number generator will be useful for online encryption and security.

International Telemetering Conference Proceedings / October 26-29, 1998 / Town & Country Resort Hotel and Convention Center, San Diego, California / In computer simulations of communication systems, linear congruential generators and shift registers are typically used to model noise and data sources. These generators are often assumed to be close to ideal (i.e. delta correlated), and an insignificant source of error in the simulation results. The samples generated by these algorithms have non-ideal autocorrelation functions, which may cause a non-uniform distribution in the data or noise signals. This error may cause the simulation bit-error-rate (BER) to be artificially high or low. In this paper, the problem is described through the use of confidence intervals. Tests are performed on several pseudo-random generators to access which ones are acceptable for computer simulation.

This master thesis deals with a generation of random numbers and Fortuna generator implementation in Java language. In the first part the theoretical familiarization to the issues is introduced. Various entropy sources like mouse movement, keyboard typing, microphone and web camera noise are described and analysed. The analysis focuses on randomness, usability and volume of gathered data. Also the Fortuna random number generator is described from the theoretical view. Object analysis and implementation details are described in the last chapter of the document.