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Parallelizing Trusted Execution Environments for Multicore Hard Real-Time SystemsMishra, Tanmaya 05 June 2019 (has links)
Real-Time systems are defined not only by their logical correctness but also timeliness. Modern real-time systems, such as those controlling industrial plants or the flight controller on UAVs, are no longer isolated. The same computing resources are shared with a variety of other systems and software. Further, these systems are increasingly being connected and made available over the internet with the rise of Internet of Things and the need for automation. Many real-time systems contain sensitive code and data, which not only need to be kept confidential but also need protection against unauthorized access and modification. With the cheap availability of hardware supported Trusted Execution Environments (TEE) in modern day microprocessors, securing sensitive information has become easier and more robust. However, when applied to real-time systems, the overheads of using TEEs make scheduling untenable. However, this issue can be mitigated by judiciously utilizing TEEs and capturing TEE operation peculiarities to create better scheduling policies. This thesis provides a new task model and scheduling approach, Split-TEE task model and a scheduling approach ST-EDF. It also presents simulation results for 2 previously proposed approaches to scheduling TEEs, T-EDF and CT-RM. / Master of Science / Real-Time systems are computing systems that not only maintain the traditional purpose of any computer, i.e, to be logically correct, but also timeliness, i.e, guaranteeing an output in a given amount of time. While, traditionally, real-time systems were isolated to reduce interference which could affect the timeliness, modern real-time systems are being increasingly connected to the internet. Many real-time systems, especially those used for critical applications like industrial control or military equipment, contain sensitive code or data that must not be divulged to a third party or open to modification. In such cases, it is necessary to use methods to safeguard this information, regardless of the extra processing time/resource consumption (overheads) that it may add to the system. Modern hardware support Trusted Execution Environments (TEEs), a cheap, easy and robust mechanism to secure arbitrary pieces of code and data. To effectively use TEEs in a real-time system, the scheduling policy which decides which task to run at a given time instant, must be made aware of TEEs and must be modified to take as much advantage of TEE execution while mitigating the effect of its overheads on the timeliness guarantees of the system. This thesis presents an approach to schedule TEE augmented code and simulation results of two previously proposed approaches.
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Approximations for Nonlinear Differential Algebraic Equations to Increase Real-time Simulation EfficiencyKwong, Gordon Houng 07 June 2010 (has links)
Full-motion driving simulators require efficient real-time high fidelity vehicle models in order to provide a more realistic vehicle response. Typically, multi-body models are used to represent the vehicle dynamics, but these have the unfortunate drawback of requiring the solution of a set of coupled differential algebraic equations (DAE). DAE's are not conducive to real-time implementation such as in a driving simulator, without a very expensive processing capability. The primary objective of this thesis is to show that multi-body models constructed from DAE's can be reasonably approximated with linear models using suspension elements that have nonlinear constitutive relationships.
Three models were compared in this research, an experimental quarter-car test rig, a multi-body dynamics differential algebraic equation model, and a linear model with nonlinear suspension elements. Models constructed from differential algebraic equations are computationally expensive to compute and are difficult to realize for real-time simulations. Instead, a linear model with nonlinear elements was proposed for a more computationally efficient solution that would retain the nonlinearities of the suspension. Simplifications were made to the linear model with nonlinear elements to further reduce computation time for real-time simulation.
The development process of each model is fully described in this thesis. Each model was excited with the same input and their outputs were compared. It was found that the linear model with nonlinear elements provides a reasonably good approximation of actual model with the differential algebraic equations. / Master of Science
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Real-Time Embedded Software Modeling and Synthesis using Polychronous Data Flow LanguagesKracht, Matthew Wallace 01 April 2014 (has links)
As embedded software and platforms become more complicated, many safety properties are left to simulation and testing. MRICDF is a formal polychronous language used to guarantee certain safety properties and alleviate the burden of software development and testing. We propose real-time extensions to MRICDF so that temporal properties of embedded systems can also be proven. We adapt the extended precedence encoding technique of Prelude and expand upon current schedulability analysis techniques for multi-periodic real-time systems. / Master of Science
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An Integrated Real-Time and Security Scheduling Framework for CPSKansal, Kriti 18 May 2023 (has links)
In the world of real-time systems (RTS), security has often been overlooked in the design process. However, with the emergence of the Internet of Things and Cyber-Physical Systems, RTS are now frequently used in interconnected applications where data is shared regularly.
Unfortunately, this increased connectivity has also led to a larger attack surface. As a result, it is crucial to redesign RTS to not only meet real-time requirements but also to be resilient to threats. To address this issue, we propose a new real-time security co-design task model, and an accompanying scheduling framework, where schedulability can be used to indicate whether both real-time and security requirements are met. Our algorithm is designed to be flexible, allowing different security mechanisms to be used along with real-time tasks. Specifically, we augment the frame-based task model by introducing an n-dimensional security matrix, which serves as a powerful tool to enable our approach. This matrix clearly indicates which defense mechanisms are available for each task in the system by storing the worst-case execution times of tasks. Then, we transform the problem of maximizing security, subject to schedulability, into a variant of the knapsack problem. To make this approach more practical, we implement a fully polynomial time approximation scheme (FPTAS) that reduces the time complexity of solving the knapsack problem from a pseudo-polynomial to a fully polynomial. We also experiment with a greedy-heuristic approach and compare the results of both algorithms. / Master of Science / Real-time systems are computer systems that need to respond to events in a timely manner.
In the past, these systems were designed without much consideration for security. However, with the increasing use of interconnected devices and systems, it has become important to make sure that real-time systems are secure and protected against malicious attacks. To address this issue, we propose a new approach for designing real-time systems that prioritizes security from the very beginning. Our approach allows for different security tasks to be executed depending on the system's needs, and we use a two-dimensional security matrix to help with this. We also introduce a way to solve the security problem that is faster and more efficient than previous methods. Our experimental results show that our new approach significantly reduces the time and effort required to solve the security problem while still producing good results.
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Real-Time Hierarchical Scheduling of Virtualized SystemsBurns, Kevin Patrick 17 October 2014 (has links)
In industry there has been a large focus on system integration and server consolidation, even for real-time systems, leading to an interest in virtualization. However, many modern hypervisors do not inherently support the strict timing guarantees of real-time applications. There are several challenges that arise when trying to virtualize a real-time application. One key challenge is to maintain the guest's real-time guarantees. In a typical virtualized environment there is a hierarchy of schedulers. Past solutions solve this issue by strict resource reservation models. These reservations are pessimistic as they accommodate the worst case execution time of each real-time task. We model real-time tasks using probabilistic execution times instead of worst case execution times which are difficult to calculate and are not representative of the actual execution times. In this thesis, we present a probabilistic hierarchical framework to schedule real-time virtual machines. Our framework reduces the number CPUs reserved for each guest by up to 45%, while only decreasing the deadline satisfaction by 2.7%. In addition, we introduce an introspection mechanism capable of gathering real-time characteristics from the guest systems and present them to the host scheduler. Evaluations show that our mechanism incurs up to 21x less overhead than that of bleeding edge introspection techniques when tracing real-time events. / Master of Science
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The Effects of Packet Buffer Size and Packet Priority on Bursty Real-Time TrafficWinblad von Walter, Ragnar, Sandred, Johan January 2024 (has links)
Networks which use real-time communication have high requirements on latency and packet loss. Improving one aspect may results in worse performance for another, and it can be difficult to prioritize one over the other as all the requirements need to be met in order for the network tooperate as expected. Many studies have investigated reducing the size of packet buffers to improve the latency. However, they have mainly focused on studying TCP traffic which may not be optimal for real-time traffic, where it instead could be more suitable to use UDP. We have performed an experiment where we compared the performance of real-time traffic over multiple different buffer sizes. We generated traffic using synchronized bursts of packets which were either sample value (SV) or IP packets, as defined by IEC 61850. We measured the packet loss and latency for situations where the traffic was either entirely composed of SV packets, or when it had mixed SV and IP traffic. For the mixed traffic, we also experimented with using different VLAN priorities for the two types of packets. We have determined deadline thresholds that show what size of packet buffer will start causing packets to miss their deadline, and what size will lead every packet in bursts oftraffic to miss their deadlines. We also found that increasing the priority of SV packets in mixed traffic can have either a positive or a negative impact on their performance, depending on how highly they are prioritized.
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Helping job seekers prepare for technical interviews by enabling context-rich interview feedbackLu, Yi 11 June 2024 (has links)
Technical interviews have become a popular method for recruiters in the tech industry to assess job candidates' proficiency in both soft skills and technical skills as programmers. However, these interviews can be stressful and frustrating for interviewees. One significant cause of the negative experience of technical interviews was the lack of feedback, making it difficult for job seekers to improve their performance progressively by participating in technical interviews. Although there are open platforms like Leetcode that allow job seekers to practice their technical proficiency, resources for conducting mock interviews to practice soft skills like communication are limited and costly to interviewees. To address this, we investigated how professional interviewers provide feedback if they were conducting a mock interview and the difficulties they face when interviewing job seekers by running mock interviews between software engineers and job seekers. With the insights from the formative studies, we developed a new system for technical interviews aiming to help interviewers conduct technical interviews with less cognitive load and provide context-rich feedback. An evaluation study on the usability of using our system to conduct technical interviews further revealed the unresolved cognitive loads of interviewers, underscoring the requirements for further improvement to facilitate easier interview processes and enable peer-to-peer interview practices. / Master of Science / Technical interview is a common method used by tech companies to evaluate job candidates. During these interviews, candidates are asked to solve algorithm problems and explain their thought processes while coding. Running these interviews, recruiters can assess the job candidate's ability to write codes and solve problems in a limited time. At the same time, the requirements for interviewees to talk aloud help interviewers evaluate their communication and collaboration skills. Although technical interviews enable employers to assess job applicants from multiple perspectives, they also introduce interviewees to stress and anxiety. Among the many complaints about technical interviews, one significant difficulty of the interview process is the lack of feedback from interviewers. As a result, it is difficult for interviewees to improve progressively by participating in technical interviews repeatedly. Although there are platforms for interviewees to practice code writing, resources like mock interviews with actual interviewers for job seekers to practice communication skills are costly and rare. Our study investigated how professional programmers run mock technical interviews and provide feedback when required. The mock interview observations helped us understand the standard procedure and common practices of how practitioners run these interviews. At the same time, we concluded the potential cause of cognitive loads and difficulties for interviewers to run such interviews. To answer the difficulties of conducting technical interviews, we developed a new system that enabled interviewers to conduct technical interviews with less cognitive load and provide enriched feedback. After rerunning mock interviews with our system, we noted that while some features in our system helped make the interview process easier, additional cognitive loads are unresolved. Looking into these difficulties, we suggested several directions for future studies to improve our design to enable an easier interview process for interviewers and support interview rehearsals between job seekers.
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An Experimental Evaluation of Real-Time DVFS Scheduling AlgorithmsSaha, Sonal 12 September 2011 (has links)
Dynamic voltage and frequency scaling (DVFS) is an extensively studied energy manage ment technique, which aims to reduce the energy consumption of computing platforms by dynamically scaling the CPU frequency. Real-Time DVFS (RT-DVFS) is a branch of DVFS, which reduces CPU energy consumption through DVFS, while at the same time ensures that task time constraints are satisfied by constructing appropriate real-time task schedules. The literature presents numerous RT-DVFS scheduling algorithms, which employ different techniques to utilize the CPU idle time to scale the frequency. Many of these algorithms have been experimentally studied through simulations, but have not been implemented on real hardware platforms. Though simulation-based experimental studies can provide a first-order understanding, implementation-based studies can reveal actual timeliness and energy consumption behaviours. This is particularly important, when it is difficult to devise accurate simulation models of hardware, which is increasingly the case with modern systems.
In this thesis, we study the timeliness and energy consumption behaviours of fourteen state- of-the-art RT-DVFS schedulers by implementing and evaluating them on two hardware platforms. The schedulers include CC-EDF, LA-EDF, REUA, DRA andd AGR1 among others, and the hardware platforms include ASUS laptop with the Intel I5 processor and a mother- board with the AMD Zacate processor. We implemented these schedulers in the ChronOS real-time Linux kernel and measured their actual timeliness and energy behaviours under a range of workloads including CPU-intensive, memory-intensive, mutual exclusion lock-intensive, and processor-underloaded and overloaded workloads.
Our studies reveal that measuring the CPU power consumption as the cube of CPU frequency can lead to incorrect conclusions. In particular, it ignores the idle state CPU power consumption, which is orders of magnitude smaller than the active power consumption. Consequently, power savings obtained by exclusively optimizing active power consumption (i.e., RT-DVFS) may be offset by completing tasks sooner by running them at the highest frequency and transitioning to the idle state earlier (i.e., no DVFS). Thus, the active power consumption savings of the RT-DVFS techniques' that we report are orders of magnitude smaller than their simulation-based savings reported in the literature. / Master of Science
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Adaptive Polling for Responsive Web ApplicationsAziz, H., Ridley, Mick J. 16 February 2016 (has links)
Yes / The web environment has been developing remarkably, and much work has been done
towards improving web based notification systems, where servers act smartly by notifying and feeding
clients with subscribed data. In this paper we have reviewed some of the problems with current
solutions to real-time updates of multi user web applications; we introduce a new concept “adaptive
polling” based on one AJAX technique “Polling” to reduce the high volume of redundant server
connections with reasonable latency, we demonstrated a prototype implementation of the new
concept which is then evaluated against the existing one; the positive results clearly indicated more
efficiency in terms of client-server bandwidth.
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WINGS CONCEPT: PRESENT AND FUTUREHarris, Jim, Downing, Bob 10 1900 (has links)
International Telemetering Conference Proceedings / October 20-23, 2003 / Riviera Hotel and Convention Center, Las Vegas, Nevada / The Western Aeronautical Test Range (WATR) of NASA’s Dryden Flight Research Center (DFRC) is
facing a challenge in meeting the technology demands of future flight mission projects. Rapid growth in
technology for aircraft has resulted in complexity often surpassing the capabilities of the current WATR
real-time processing and display systems. These current legacy systems are based on an architecture
that is over a decade old. In response, the WATR has initiated the development of the WATR
Integrated Next Generation System (WINGS). The purpose of WINGS is to provide the capability to
acquire data from a variety of sources and process that data for subsequent analysis and display to
Project Users in the WATR Mission Control Centers (MCCs) in real-time, near real-time and
subsequent post-mission analysis. WINGS system architecture will bridge the continuing gap between
new research flight test requirements and capability by distributing current system architectures to
provide incremental and iterative system upgrades.
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