Le vieillissement de la population européenne a encouragé la communauté à favoriser larecherche de solutions pour soutenir cette évolution. Dans ce contexte, plusieurs questions (liéesaux services de soins de santé et aux établissements de santé, coûteux, et à capacités limitées)doivent être abordées.Ainsi, plusieurs projets de recherche et des solutions industrielles ont été proposés pour remédier àces problèmes. La plupart de ces solutions sont basées sur l'utilisation des derniers développementstechniques en matière de TIC permettant ainsi de fournir des solutions qui améliorent le bien-êtredes personnes âgées et de garantir leur indépendance dans leurs propres espaces de vie. Lessolutions technologiques fournies doivent être garanties contre les défauts potentiels deséquipements qui peuvent conduire à l'échec des systèmes et avoir un impact sur les besoins etl'indépendance des utilisateurs.Dans ce travail, nous proposons une représentation du système d'automatisation de la maison, surla base des besoins qui consiste à fournir des solutions continues et viables et répondant auxattentes des utilisateurs (tout en assurant la disponibilité des services des systèmes).Dans cet objectif, nous proposons de développer un cadre de modélisation représentant lesystème reconfigurable domotique et permettant l'examen de l'approche de la tolérance depanne, sur la base de la définition de scénarios alternatifs (assurant la délivrance continue desservices). Dans ce workflow, nous décrivons les éléments structurels du système (décrits commedes services et composants) en vue de la modélisation conceptuelle. Des règles de transformationde modèle permettent de générer un modèle d'analyse et un modèle de comportement. Lemodèle d'analyse permet de prendre une décision à propos de la sélection des élémentsalternatifs pour remplacer les éléments défectueux. Ce modèle d'analyse est défini sur la base dela notion d'approche d’arbre de défaillances, qui adopte la probabilité d'échec descomposantes pour évaluer l’état global du système considéré. Le modèle de comportement estresponsable de la simulation de l'exécution des services du système pour assurer que les scénariosconduisent à la délivrance du système.Par ailleurs, nous proposons de définir une caractéristique permettant d’évaluer l'importanceempirique (vue par le concepteur) des composantes d'un système dans le cadre d’un servicedonné. Ensuite, nous proposons une nouvelle approche, fondée sur l'intégration du facteur del'importance dans l'approche d’arbre de défaillances pour étudier la criticité du composant, encas d'échec, ainsi que la continuité de service. Un cadre de validation expérimentale, basé surplusieurs objectifs de validation est finalement proposé pour conclure ce travail de recherche. / The ageing of the European population encouraged the community to search for solutions tosupport this evolution. In this context, several issues (related to the expensive and limited healthcare services and health facilities capacities) need to be addressed.Thus, several projects, research and industrial solutions have been proposed to address these issues.Most of these projects and industrial developments are based on the use of the latest ICT technicaldevelopments to provide solutions that ameliorate the well-being of the targeted ageing groupand to guaranty their independence in their own living spaces. The provided technologicalsolutions need to be guaranteed against potential faults which may lead to the systems failure andimpact the users’ needs and independency.In this work, we propose a home automation system representation, based on the user’s needs toprovide continuous and viable solutions that meets the users’ expectations, and ensuring theavailability of system’s services.For this goal, we propose to develop an integrated modeling framework allowing therepresentation of the home automation reconfigurable system with the consideration of a faulttolerance approach (based on the alternative definition of scenarios of system servicesdeliverance).In the proposed workflow, we describe the system structural elements (described as services andcomponents) in the design modeling view, and, we lead model transformation rules allowinggenerating an analysis model and a behavior model. The analysis model allows making a decisionabout the alternative elements selection in order to substitute the faulty elements. The analysismodel definition is based on the notion of Fault Tree Analysis approach (adopting the probabilityof events failure in order to evaluate a given system status).The behavior model is in charge of simulating the execution of the system services ensuring, thus,that the proposed scenarios lead to system services deliverance.Moreover, we propose to define an expert based feature measuring the importance of a system’scomponent within the service context. In this framework, we propose a new approach, based onthe joint integration of the importance factor into the Fault Tree Analysis approach in order to studythe criticality of the component, in case of failure, on the service continuity.We propose an experimental validation framework, based on several validation objectives toevaluate the proposed work in this research

Alguns tipos de FPGA (Field Programmable Gate Array) possuem a capacidade de serem reconfigurados parcialmente em tempo de execução formando um Sistema Parcialmente Reconfigurável (SPR), cuja utilização traz diversas vantagens dentre as quais a redução de custos. A maior utilização de SPRs enfrenta, como um dos fatores limitantes, a dificuldade de acesso e de utilização de ferramentas de desenvolvimento apropriadas. Este trabalho aborda os SPRs, suas aplicações e uma análise das ferramentas de desenvolvimento existentes. posteriormente dedica-se ao aperfeiçoamento de uma dessas ferramentas, o PARBIT, com o desenvolvimento de uma interface gráfica de usuário (GUI, -- Graphical User Interface) e a atualização de sua metodologia de desenvolvimento. As metodologias de projeto suportadas pelo fabricante do FPGA também são apresentadas. As metodologias são validadas através do projeto de um SPR. / Some types of FPGA (Field Programmable Gate Array) can be partially reconfigured during run-time forming a Partial Reconfigurable System (PRS). The use of PRSs brings several advantages like cost reduction. A larger use of PRSs faces a limiting factor: the difficult to access and use appropriate development tools. This work shows the PRSs, its applications and an analysis of the existing development tools. Later, it dedicates to the improvement of one of these tools, the PARBIT, developing a graphical user interface (GUI) and updating its project methodology. The project methodologies supported by the manufacturer of the FPGA are also presented. The methodologies are validated through the design of a PRS.

Alguns tipos de FPGA (Field Programmable Gate Array) possuem a capacidade de serem reconfigurados parcialmente em tempo de execução formando um Sistema Parcialmente Reconfigurável (SPR), cuja utilização traz diversas vantagens dentre as quais a redução de custos. A maior utilização de SPRs enfrenta, como um dos fatores limitantes, a dificuldade de acesso e de utilização de ferramentas de desenvolvimento apropriadas. Este trabalho aborda os SPRs, suas aplicações e uma análise das ferramentas de desenvolvimento existentes. posteriormente dedica-se ao aperfeiçoamento de uma dessas ferramentas, o PARBIT, com o desenvolvimento de uma interface gráfica de usuário (GUI, -- Graphical User Interface) e a atualização de sua metodologia de desenvolvimento. As metodologias de projeto suportadas pelo fabricante do FPGA também são apresentadas. As metodologias são validadas através do projeto de um SPR. / Some types of FPGA (Field Programmable Gate Array) can be partially reconfigured during run-time forming a Partial Reconfigurable System (PRS). The use of PRSs brings several advantages like cost reduction. A larger use of PRSs faces a limiting factor: the difficult to access and use appropriate development tools. This work shows the PRSs, its applications and an analysis of the existing development tools. Later, it dedicates to the improvement of one of these tools, the PARBIT, developing a graphical user interface (GUI) and updating its project methodology. The project methodologies supported by the manufacturer of the FPGA are also presented. The methodologies are validated through the design of a PRS.

Analyzing the brain's behavior in terms of its neuronal activity is the fundamental purpose of Brain-Machine Interfaces (BMIs). Neuronal activity is often assumed to be encoded in the rate of neuronal action potential spikes. Successful performance of a BMI system is tied to the efficiency of its individual processing elements such as spike detection, sorting and decoding. To achieve reliable operation, BMIs are equipped with hundreds of electrodes at the neural interface. While a single electrode/tetrode communicates with up to four neurons at a given instant of time, a typical interface communicates with an ensemble of hundreds or even thousands of neurons. However, translation of these signals (data) into usable information for real-time BMIs is bottlenecked due to the lack of efficient real-time algorithms and real-time hardware that can handle massively parallel channels of neural data. The research presented here addresses this issue by developing real-time neural processing algorithms that can be implemented in reconfigurable hardware and thus, can be scaled to handle thousands of channels in parallel. The developed reconfigurable system serves as an evaluation platform for investigating the fundamental design tradeoffs in allocating finite hardware resources for a reliable BMI. In this work, the generic architectural layout needed to process neural signals in a massive scale is discussed. A System-on-Chip design with embedded system architecture is presented for FPGA hardware realization that features (a) scalability (b) reconfigurability, and (c) real-time operability. A prototype design incorporating a dual processor system and essential neural signal processing routines such as real-time spike detection and sorting is presented. Two kinds of spike detectors, a simple threshold-based and non-linear energy operator-based, were implemented. To achieve real-time spike sorting, a fuzzy logic-based spike sorter was developed and synthesized in the hardware. Furthermore, a real-time kernel to monitor the high-level interactions of the system was implemented. The entire system was realized in a platform FPGA (Xilinx Virtex-5 LX110T). The system was tested using extracellular neural recordings from three different animals, a owl monkey, a macaque and a rat. Operational performance of the system is demonstrated for a 300 channel neural interface. Scaling the system to 900 channels is trivial. / Electrical and Computer Engineering

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / The computing has over the years directing a radical change in the professional prole and personal of their users. In recent years can be seen, a growing increase of computing use as an auxiliary tool to solve problems. Problems that are increasingly common in dierent areas of knowledge. When the requirements of an application exceeds the capacity of the used solutions, new ways of solutions are developed to satisfy the demands of complexity. The reconfigurable computing has emerged as a computational solution model that integrate the xed hardware performance together with the software exibility, uniting the best of both paradigms. The reconfigurable computing is a eld relatively new and promising, where the main concepts and components that were present since its theoretical basis, still stands as the basis for the evolution of knowledge inside the area. Some of these concepts are older than other and those newer ones that arise due to the need for better understanding of the study eld. Currently has been noticed in the published articles that some concepts involving reconfigurable computing eld are being applied wrongly, on in other occasions, without exploit all their features. This lack of clarity in the use of concepts, aect the development of the study eld and contribute to the impoverishment of the area, aecting especially students and researchers in early stages of learning, that seeking through those articles a theoretical consistency. Indeed, a conceptual discussion within of any study eld, always has a significant importance for the any area. The conceptual framework proposed in this paper, aims to identify and present the conceptual denitions involving the recongurable computing eld, as well as their conceptual relationships. Within this framework we propose a organization model of concepts for recongurable computing, a concept map and all of the information is validated among a opinion consensus of several recongurable computing specialists. Moreover, this framework is intended to serve as a helper tool to the learning of recongurable computing, aiding in some methodological requirements as well as the increase of theoretical knowledge. / A computação vem ao longo dos anos direcionando uma mudança radical no perfil profissional e pessoal de seus usuários. Nos últimos anos pode ser observado um crescente aumento de sua utilização como ferramenta auxiliar para resolver problemas. Problemas que são cada vez mais frequentes, nas diferentes áreas do conhecimento. Quando os requisitos de uma aplicação excedem a capacidade das soluções utilizadas, novos modelos de soluções são desenvolvidos para atender a demanda de complexidade. A computação reconfigurável surgiu como um modelo de solução computacional que íntegra o desempenho do hardware fixo com a flexibilidade do software, unindo o melhor dos dois paradigmas. A computação reconfigurável uma área relativamente nova e promissora, onde os principais conceitos e componentes que estiveram presentes desde a sua fundamentação teórica, ainda se mantém como base para a evolução do conhecimento na área. Alguns destes conceitos são mais antigos e outros mais recentes, que surgem em razão da necessidade de uma melhor compreensão do campo de estudo. Atualmente tem-se observado que alguns conceitos que envolvem a computação reconfigurável vem sendo aplicados de forma errônea, em outras ocasiões, não explorando todas suas características. Essa falta de clareza na utilização dos conceitos prejudica a evolução do campo de estudo, contribuindo para o empobrecimento da área, principalmente para os alunos e pesquisadores em fase inicial de aprendizado, que buscam através desses trabalhos a consistência teórica. De fato uma discussão conceitual dentro de qualquer campo de estudo, sempre apresenta importância significativa para a área de estudo. dessa forma o arcabouço conceitual proposto neste trabalho, objetiva identificar e apresentar as definições conceituais que envolvem o campo da computação reconfigurável, bem como suas relações. Dentro deste arcabouço é proposto um modelo organizacional dos conceitos para a computação reconfigurável, um mapa conceitual, onde todas as informações são validadas através de consenso de opinião de diversos especialistas da área. Ademais, esse arcabouço tem por finalidade servir de ferramenta auxiliar para o aprendizado da computação reconfigurável, auxiliando em algumas definições metodologicas de pesquisa bem como o acréscimo de conhecimento teórico. / Mestre em Ciência da Computação

Les systèmes de contrôle des événements discrets ont la possibilité de résoudre les défis importants de la société moderne. En particulier, cela représente une solution fondamentale pour gérer et contrôler les nouvelles avancées technologiques en conformité avec la requis du développement durable. Le paramétrage, la configuration et la prise de décision de ces systèmes de contrôle sont des aspects critiques qui influent sur les performances et la productivité. Les approches d'architecture de contrôle dynamique, telles que les systèmes de contrôle reconfigurables, ont été proposées pour la modélisation de ces systèmes. Cependant, ils n'ont pas réussi à optimiser le processus de reconfiguration car celles-ci se concentrent sur la continuité de l'exécution plutôt que sur l'optimisation de la reconfiguration. Cette dissertation propose une architecture de référence pour un système de contrôle reconfigurable, nommé Pollux, conçu pour gérer et ajuster de manière optimale et en temps réel l'architecture d'un système de contrôle, soit pour guider l'exécution opérationnelle ou répondre à une perturbation du système. En considérant une proposition d'une configuration optimale des architectures de contrôle basées sur la gouvernance partagée, cette approche proposée un système de contrôle reconfigurable compose d’une entité décisionnelle flexible et personnalisable, d’une représentation qui caractérise la configuration unique et la solution de contrôle de l'architecture de contrôle et d’un mécanisme de reconfiguration à trois modules qui intègre les principes basés sur l'optimalité dans la reconfiguration. Notre approche est appliquée dans le domaine de la fabrication et est validée dans une simulation et une cellule réelle de fabrication située à l'Université de Valenciennes, en France. La validation effectuée dans trois scénarios expérimentaux a permis de vérifier les avantages de notre approche et de nous encourager à continuer la recherche. / Discrete-event control systems have the opportunity to resolve significant challenges of modern society. In particular, these represent a fundamental solution to manage and control the new technological advances in compliance to the increased consciousness of sustainable development. The parameterization, configuration and decision-making of these control systems are critical aspects that impact the performance and productivity required. Dynamic control architecture approaches, such as reconfigurable control systems, have been proposed for modelling such systems. However, such approaches have failed to address the recovery of the reconfiguration process as these focus on the continuity of execution rather than on the optimisation of the reconfiguration. This dissertation proposes a reference architecture for a reconfigurable control system, named Pollux, designed to manage and adjust optimally and in real time the architecture of a control system, either to guide operational execution or to respond to a system perturbation. Considering a proposed framework of an optimal configuration of control architectures based on shared governance, this proposed approach aims to orchestrate a flexible and customizable decisional entity, a representation that characterize the unique configuration and control solution of the control architecture, and a three-module reconfiguration mechanism that integrates the optimality-based principles into the reconfiguration process, to ensure a recovery of global performance and/or minimise the degradation caused by perturbations. Our approach is applied in the manufacturing domain and is validated in a simulation and a real flexible manufacturing system cell located at the University of Valenciennes, France. The validation conducted in three experimental scenarios verified the benefits of our approach and encourage us to continue research in this direction.