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Réseaux de neurones impulsionnels basés sur les mémoires résistives pour l'analyse de données neuronales / Spiking neural networks based on resistive memory technologies for neural data analysisWerner, Thilo 10 July 2017 (has links)
Le système nerveux central humain est un système de traitement de l'information stupéfiant en termes de capacités, de polyvalence, d’adaptabilité et de faible consommation d'énergie. Sa structure complexe se compose de milliards de neurones, interconnectés par plusieurs trillions de synapses, formant des grappes spécialisées. Récemment, l'imitation de ces paradigmes a suscité un intérêt croissant en raison de la nécessité d'approches informatiques avancées pour s'attaquer aux défis liés à la génération de quantités massives de données complexes dans l'ère de l’Internet des Objets (IoT). Ceci a mené à un nouveau domaine de recherche, connu sous le nom d’informatique cognitive ou d'ingénierie neuromorphique, qui repose sur les architectures dites non-von-Neumann (inspirées du cerveau) en opposition aux architectures von-Neumann (ordinateurs classiques). Dans cette thèse, nous examinons l'utilisation des technologies de mémoire résistive telles que les mémoires à accès aléatoires à base de lacunes d’oxygène (OxRAM) et les mémoires à pont conducteur (CBRAM) pour la conception de synapses artificielles, composants de base indispensables des réseaux neuromorphiques. De plus, nous développons un réseau de neurones impulsionnels artificiel (SNN), utilisant des synapses OxRAM, pour l'analyse de données impulsionnelles provenant du cerveau humain en vue du traitement de troubles neurologiques, en connectant la sortie du SNN à une interface cerveau-ordinateur (BCI). L'impact des problèmes de fiabilité, caractéristiques des OxRAMs, sur les performances du système est étudié en détail et les moyens possibles pour atténuer les pénalités liées aux incertitudes des dispositifs seuls sont démontrés. En plus de l’implémentation avec des OxRAMs et CBRAMs de la bien connue plasticité fonction du temps d’occurrence des impulsions (STDP), qui constitue une forme de plasticité à long terme (LTP), les dispositifs OxRAM ont également été utilisés pour imiter la plasticité à court terme (STP). Les fonctionnalités fondamentalement différentes de la LTP et STP sont mises en évidence. / The central nervous system of humankind is an astonishing information processing system in terms of its capabilities, versatility, adaptability and low energy consumption. Its complex structure consists of billions of neurons interconnected by trillions of synapses forming specialized clusters. Recently, mimicking those paradigms has attracted a strongly growing interest, triggered by the need for advanced computing approaches to tackle challenges related to the generation of massive amounts of complex data in the Internet of Things (IoT) era. This has led to a new research field, known as cognitive computing or neuromorphic engineering, which relies on the so-called non-von-Neumann architectures (brain-inspired) in contrary to von-Neumann architectures (conventional computers). In this thesis, we explore the use of resistive memory technologies such as oxide vacancy based random access memory (OxRAM) and conductive bridge RAM (CBRAM) for the design of artificial synapses that are a basic building block for neuromorphic networks. Moreover, we develop an artificial spiking neural network (SNN) based on OxRAM synapses dedicated to the analysis of spiking data recorded from the human brain with the goal of using the output of the SNN in a brain-computer interface (BCI) for the treatment of neurological disorders. The impact of reliability issues characteristic to OxRAM on the system performance is studied in detail and potential ways to mitigate penalties related to single device uncertainties are demonstrated. Besides the already well-known spike-timing-dependent plasticity (STDP) implementation with OxRAM and CBRAM which constitutes a form of long term plasticity (LTP), OxRAM devices were also used to mimic short term plasticity (STP). The fundamentally different functionalities of LTP and STP are put in evidence.
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Síntese de memórias resistivas de TiO2 e caracterização por feixe de íonsSulzbach, Milena Cervo January 2017 (has links)
Neste trabalho foi desenvolvido um estudo sistemático dos mecanismos de difusão responsáveis pelo switching de resistência em memórias resistivas. Essas memórias possuem estrutura semelhante a de um capacitor, a qual sofre uma transição de resistência induzida pela aplicação de um campo elétrico. A transição é provocada pela formação de filamentos condutivos no interior da matriz semicondutora. Os filamentos podem ser constituídos por metal originado de um dos eletrodos (ECM) ou por regiões do óxido deficientes em oxigênio (VCM), geradas pela difusão de vacâncias de oxigênio. Dispositivos de TiO2 foram construídos e sua resposta elétrica foi adquirida através de medidas elétricas do tipo I-V para diferentes metais de eletrodo. Técnicas de análise por feixe de íons, como retroespalhamento Rutherford por micro-feixe e perfilometria com reação nuclear ressonante, foram usadas para detalhamento dos processos de difusão. Constatou-se uma dependência do comportamento elétrico em função do método de deposição da camada semicondutora, sua espessura e os parâmetros da medida de tensão. No caso do filamento ser composto por átomos de metal, espectros de micro-RBS foram adquiridos para identificar a sua estrutura no interior do óxido. Ainda, observaram-se bolhas na superfície do eletrodo superior dos dispositivos com difusão de vacâncias de oxigênio após o tratamento elétrico. Nesse mesmo contexto, foi medida a difusividade e energia de ativação da difusão de oxigênio em filmes finos de TiOy. / In this work we developed a systematic study of diffusion mechanisms which are responsible for resistance switching in resistive memories. The structure of these memories is similar to a capacitor which suffers resistance transition induced by electrical field. The transition is caused by the formation of conductive filaments inside the semiconductor matrix. The filaments may be constituted by metal from one of the electrodes (ECM) or by oxygen deficient areas (VCM), generated from oxygen vacancies diffusion. Devices of TiO2 have been built and its electrical response was acquired through electrical measurements (I-V) for different electrode metals. Ion beam techniques such as micro-probe Rutherford Backscattering and Nuclear Reaction Profiling were used to detail the diffusion processes. It was observed a dependence in the electrical behaviour with the semiconductor layer deposition method, its thickness and bias measurement parameters. In the case which filaments are composed by metal atoms, measurements of micro-RBS were performed to identify its structure inside the oxide. Also, bubbles have been observed over the surface of top electrode in devices with oxygen vacancies diffusion after the electrical treatment. In this context, it was measured diffusivity and activation energy for oxygen diffusion in thin TiOy films.
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Síntese de memórias resistivas de TiO2 e caracterização por feixe de íonsSulzbach, Milena Cervo January 2017 (has links)
Neste trabalho foi desenvolvido um estudo sistemático dos mecanismos de difusão responsáveis pelo switching de resistência em memórias resistivas. Essas memórias possuem estrutura semelhante a de um capacitor, a qual sofre uma transição de resistência induzida pela aplicação de um campo elétrico. A transição é provocada pela formação de filamentos condutivos no interior da matriz semicondutora. Os filamentos podem ser constituídos por metal originado de um dos eletrodos (ECM) ou por regiões do óxido deficientes em oxigênio (VCM), geradas pela difusão de vacâncias de oxigênio. Dispositivos de TiO2 foram construídos e sua resposta elétrica foi adquirida através de medidas elétricas do tipo I-V para diferentes metais de eletrodo. Técnicas de análise por feixe de íons, como retroespalhamento Rutherford por micro-feixe e perfilometria com reação nuclear ressonante, foram usadas para detalhamento dos processos de difusão. Constatou-se uma dependência do comportamento elétrico em função do método de deposição da camada semicondutora, sua espessura e os parâmetros da medida de tensão. No caso do filamento ser composto por átomos de metal, espectros de micro-RBS foram adquiridos para identificar a sua estrutura no interior do óxido. Ainda, observaram-se bolhas na superfície do eletrodo superior dos dispositivos com difusão de vacâncias de oxigênio após o tratamento elétrico. Nesse mesmo contexto, foi medida a difusividade e energia de ativação da difusão de oxigênio em filmes finos de TiOy. / In this work we developed a systematic study of diffusion mechanisms which are responsible for resistance switching in resistive memories. The structure of these memories is similar to a capacitor which suffers resistance transition induced by electrical field. The transition is caused by the formation of conductive filaments inside the semiconductor matrix. The filaments may be constituted by metal from one of the electrodes (ECM) or by oxygen deficient areas (VCM), generated from oxygen vacancies diffusion. Devices of TiO2 have been built and its electrical response was acquired through electrical measurements (I-V) for different electrode metals. Ion beam techniques such as micro-probe Rutherford Backscattering and Nuclear Reaction Profiling were used to detail the diffusion processes. It was observed a dependence in the electrical behaviour with the semiconductor layer deposition method, its thickness and bias measurement parameters. In the case which filaments are composed by metal atoms, measurements of micro-RBS were performed to identify its structure inside the oxide. Also, bubbles have been observed over the surface of top electrode in devices with oxygen vacancies diffusion after the electrical treatment. In this context, it was measured diffusivity and activation energy for oxygen diffusion in thin TiOy films.
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Nouvelles Architectures Hybrides : Logique / Mémoires Non-Volatiles et technologies associées. / Novel Hybrid Logic / Non-Volatile memory Architectures and associated technologiesPalma, Giorgio 29 November 2013 (has links)
Les nouvelles approches de technologies mémoires permettront une intégration dite back-end, où les cellules élémentaires de stockage seront fabriquées lors des dernières étapes de réalisation à grande échelle du circuit. Ces approches innovantes sont souvent basées sur l'utilisation de matériaux actifs présentant deux états de résistance distincts. Le passage d'un état à l'autre est contrôlé en courant ou en tension donnant lieu à une caractéristique I-V hystérétique. Nos mémoires résistives sont composées d'argent en métal électrochimiquement actif et de sulfure amorphe agissant comme électrolyte. Leur fonctionnement repose sur la formation réversible et la dissolution d'un filament conducteur. Le potentiel d'application de ces nouveaux dispositifs n'est pas limité aux mémoires ultra-haute densité mais aussi aux circuits embarqués. En empilant ces mémoires dans la troisième dimension au niveau des interconnections des circuits logiques CMOS, de nouvelles architectures hybrides et innovantes deviennent possibles. Il serait alors envisageable d'exploiter un fonctionnement à basse énergie, à haute vitesse d'écriture/lecture et de haute performance telles que l'endurance et la rétention. Dans cette thèse, en se concentrant sur les aspects de la technologie de mémoire en vue de développer de nouvelles architectures, l'introduction d'une fonctionnalité non-volatile au niveau logique est démontrée par trois circuits hybrides: commutateurs de routage non volatiles dans un Field Programmable Gate Arrays, un 6T-SRAM non volatile, et les neurones stochastiques pour un réseau neuronal. Pour améliorer les solutions existantes, les limitations de la performances des dispositifs mémoires sont identifiés et résolus avec des nouveaux empilements ou en fournissant des défauts de circuits tolérants. / Novel approaches in the field of memory technology should enable backend integration, where individual storage nodes will be fabricated during the last fabrication steps of the VLSI circuit. In this case, memory operation is often based upon the use of active materials with resistive switching properties. A topology of resistive memory consists of silver as electrochemically active metal and amorphous sulfide acting as electrolyte and relies on the reversible formation and dissolution of a conductive filament. The application potential of these new memories is not limited to stand-alone (ultra-high density), but is also suitable for embedded applications. By stacking these memories in the third dimension at the interconnection level of CMOS logic, new ultra-scalable hybrid architectures becomes possible which exploit low energy operation, fast write/read access and high performance with respect to endurance and retention. In this thesis, focusing on memory technology aspects in view of developing new architectures, the introduction of non-volatile functionality at the logic level is demonstrated through three hybrid (CMOS logic ReRAM devices) circuits: nonvolatile routing switches in a Field Programmable Gate Array, nonvolatile 6T-SRAMs, and stochastic neurons of an hardware neural network. To be competitive or even improve existing solutions, limitations on the memory devices performances are identified and solved by stack engineering of CBRAM devices or providing faults tolerant circuits.
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Síntese de memórias resistivas de TiO2 e caracterização por feixe de íonsSulzbach, Milena Cervo January 2017 (has links)
Neste trabalho foi desenvolvido um estudo sistemático dos mecanismos de difusão responsáveis pelo switching de resistência em memórias resistivas. Essas memórias possuem estrutura semelhante a de um capacitor, a qual sofre uma transição de resistência induzida pela aplicação de um campo elétrico. A transição é provocada pela formação de filamentos condutivos no interior da matriz semicondutora. Os filamentos podem ser constituídos por metal originado de um dos eletrodos (ECM) ou por regiões do óxido deficientes em oxigênio (VCM), geradas pela difusão de vacâncias de oxigênio. Dispositivos de TiO2 foram construídos e sua resposta elétrica foi adquirida através de medidas elétricas do tipo I-V para diferentes metais de eletrodo. Técnicas de análise por feixe de íons, como retroespalhamento Rutherford por micro-feixe e perfilometria com reação nuclear ressonante, foram usadas para detalhamento dos processos de difusão. Constatou-se uma dependência do comportamento elétrico em função do método de deposição da camada semicondutora, sua espessura e os parâmetros da medida de tensão. No caso do filamento ser composto por átomos de metal, espectros de micro-RBS foram adquiridos para identificar a sua estrutura no interior do óxido. Ainda, observaram-se bolhas na superfície do eletrodo superior dos dispositivos com difusão de vacâncias de oxigênio após o tratamento elétrico. Nesse mesmo contexto, foi medida a difusividade e energia de ativação da difusão de oxigênio em filmes finos de TiOy. / In this work we developed a systematic study of diffusion mechanisms which are responsible for resistance switching in resistive memories. The structure of these memories is similar to a capacitor which suffers resistance transition induced by electrical field. The transition is caused by the formation of conductive filaments inside the semiconductor matrix. The filaments may be constituted by metal from one of the electrodes (ECM) or by oxygen deficient areas (VCM), generated from oxygen vacancies diffusion. Devices of TiO2 have been built and its electrical response was acquired through electrical measurements (I-V) for different electrode metals. Ion beam techniques such as micro-probe Rutherford Backscattering and Nuclear Reaction Profiling were used to detail the diffusion processes. It was observed a dependence in the electrical behaviour with the semiconductor layer deposition method, its thickness and bias measurement parameters. In the case which filaments are composed by metal atoms, measurements of micro-RBS were performed to identify its structure inside the oxide. Also, bubbles have been observed over the surface of top electrode in devices with oxygen vacancies diffusion after the electrical treatment. In this context, it was measured diffusivity and activation energy for oxygen diffusion in thin TiOy films.
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Resistance Switching in Chalcogenide based Programmable Metallization Cells (PMC) and Sensors under Gamma-RaysJanuary 2013 (has links)
abstract: Chalcogenide glass (ChG) materials have gained wide attention because of their applications in conductive bridge random access memory (CBRAM), phase change memories (PC-RAM), optical rewritable disks (CD-RW and DVD-RW), microelectromechanical systems (MEMS), microfluidics, and optical communications. One of the significant properties of ChG materials is the change in the resistivity of the material when a metal such as Ag or Cu is added to it by diffusion. This study demonstrates the potential radiation-sensing capabilities of two metal/chalcogenide glass device configurations. Lateral and vertical device configurations sense the radiation-induced migration of Ag+ ions in germanium selenide glasses via changes in electrical resistance between electrodes on the ChG. Before irradiation, these devices exhibit a high-resistance `OFF-state' (in the order of 10E12) but following irradiation, with either 60-Co gamma-rays or UV light, their resistance drops to a low-resistance `ON-state' (around 10E3). Lateral devices have exhibited cyclical recovery with room temperature annealing of the Ag doped ChG, which suggests potential uses in reusable radiation sensor applications. The feasibility of producing inexpensive flexible radiation sensors has been demonstrated by studying the effects of mechanical strain and temperature stress on sensors formed on flexible polymer substrate. The mechanisms of radiation-induced Ag/Ag+ transport and reactions in ChG have been modeled using a finite element device simulator, ATLAS. The essential reactions captured by the simulator are radiation-induced carrier generation, combined with reduction/oxidation for Ag species in the chalcogenide film. Metal-doped ChGs are solid electrolytes that have both ionic and electronic conductivity. The ChG based Programmable Metallization Cell (PMC) is a technology platform that offers electric field dependent resistance switching mechanisms by formation and dissolution of nano sized conductive filaments in a ChG solid electrolyte between oxidizable and inert electrodes. This study identifies silver anode agglomeration in PMC devices following large radiation dose exposure and considers device failure mechanisms via electrical and material characterization. The results demonstrate that by changing device structural parameters, silver agglomeration in PMC devices can be suppressed and reliable resistance switching may be maintained for extremely high doses ranging from 4 Mrad(GeSe) to more than 10 Mrad (ChG). / Dissertation/Thesis / Ph.D. Electrical Engineering 2013
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Nanocaractérisation d'oxydes à changement de résistance pour les mémoires résistives / Nanocharacterization of resistance switching oxides for resistive memoriesCalka, Pauline 17 October 2012 (has links)
En raison de leur faible consommation d'énergie, les mémoires non volatiles (MNV) sont En raison de leur faible consommation d'énergie, les mémoires non-volatiles sont particulièrement intéressantes pour l'électronique portative (clé USB, téléphone, ordinateur portable …). Les mémoires Flash, qui dominent le marché, atteignent leurs limites physiques et doivent être remplacées. L'introduction de nouveaux matériaux et architectures mémoire est proposée. Les mémoires OxRRAM (Oxide Resistive Random Access Memory) sont des candidats potentiels. Il s'agit de structures M-O-M (Métal-Oxyde-Métal). Le stockage de l'information est basé sur la modulation de la résistance de l'oxyde à l'application d'un champ électrique ou d'un courant. Une meilleure compréhension du mécanisme de changement de résistance de ces dispositifs est nécessaire pour contrôler leurs performances. Nous nous intéressons au claquage diélectrique de l'oxyde, qui initie le mécanisme de changement de résistance. Les mesures physico-chimiques à l'échelle nanométrique sont indispensables à sa compréhension et font défaut dans la littérature. Dans cette thèse, nous proposons des mesures physico-chimiques, des mesures électriques et des méthodes de préparation d'échantillon adaptées. Les oxydes de nickel et d'hafnium sont investigués. En plus de la dégradation électrique (chute de résistance), les modifications de ces deux oxydes sont investiguées à trois niveaux : la composition chimique, la morphologie et la structure électronique. Mots-clés : mémoire résistive, mécanisme de changement de résistance, claquage diélectrique, NiO, HfO2, spectroscopie de photoélectrons, microscopie électronique en transmission, microscopie à forme atomique, lacunes d'oxygène. / With low energy consumption, non-volatile memories are interesting for portative applications (USB, mobile phone, laptop …). The Flash memory technology is reaching its physical boundaries and needs to be replaced. New materials and architectures are currently investigated. Oxide Resistive Random Access Memory (OxRRAM) is considered as a good candidate. It is based on a M-O-M (Metal-Oxide-Metal) stack. The information is stored using an electric field or a current that modulates the resistance of the oxide. A better understanding of the resistance switching mechanism is required in order to control the performances of the devices. We investigate the dielectric breakdown that activates the resistance switching properties. Physico-chemical characterization at the nanoscale is required. In this work, we propose proper physico-chemical and electrical measurements. Sample preparation is also considered. Nickel and hafnium oxide are investigated. Besides the evolution of the electrical properties, we analyze the oxide modification at three levels : the chemical composition, the morphology and the electronic structure. Keywords : resistive memory, resistance switching mechanism, dielectric breakdown, NiO, HfO2, photoelectron spectroscopy, electronic transmission microscopy, atomic force microscopy, oxygen vacancies.
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Análise de desgaste de técnicas de correção de erros em phase-change memories / Analysis of wear-out of error correction techniques in phase-change memoriesHoffman, Caio, 1983- 07 January 2013 (has links)
Orientadores: Guido Costa Souza de Araújo, Rodolfo Jardim de Azevedo / Dissertação (mestrado) - Universidade Estadual de Campinas, Instituto de Computação / Made available in DSpace on 2018-08-23T10:06:28Z (GMT). No. of bitstreams: 1
Hoffman_Caio_M.pdf: 5338735 bytes, checksum: d93e38ef7846b0ba3f7f3b0ea459fc67 (MD5)
Previous issue date: 2013 / Resumo: Phase-change memory (PCM) traz novos ensejos para indústria eletrônica. Devido às projeções de alta escalabilidade do processo de fabricação da PCM, cogita-se usá-la como memória principal em sistemas de computação, substituindo à tradicional DRAM cujos problemas de miniaturização do processo de fabricação demandam tecnologias ainda desconhecidas. Contudo, PCM tem problemas de durabilidade e técnicas de recuperação de falhas robustas são extremamente necessárias para recuperação e prolongamento do seu tempo de vida, medido em número de escritas. As técnicas mais comuns de recuperação de falhas são os códigos de correção de erros. Porém, outras técnicas de recuperação vêm sendo propostas na literatura, aproveitando as características de não-volatilidade da PCM. Neste trabalho, usando uma modelagem matemática, analisou-se como a probabilidade de bit-ip dos principais códigos de correção de erros { paridade, SECDED e BCH { e das principais técnicas de recuperação de falhas { ECP e SAFER { está relacionada _a durabilidade da PCM. A partir da taxa de bit-ip medida através da execução do SPEC2006 e por meio dos modelos matemáticos, comparou-se os resultados dos modelos de simulação utilizando-se a probabilidade teórica de 50% e a taxa obtida experimentalmente de 15%. Os resultados revelaram uma visível degradação da durabilidade dos mecanismos de recuperação de falhas que usam códigos de correção de erros, contradizendo os resultados da literatura. A técnica ECP foi à única que não mostrou degradação. Além disso, uma análise de eficiência energética foi feita, relacionando durabilidade da PCM e o consumo de energia. Novamente, a técnica ECP se destacou nos resultados, como também a técnica SAFER. Finalmente, foram propostos modelos analíticos probabilísticos das técnicas ECP, SECDED e uma análise da técnica PAYG baseada no modelo analítico da ECP / Abstract: Phase-change memory brings new opportunities for the electronics industry. Due to projections of high scalability of the fabrication process, PCM is seen as a new main memory in computing systems, replacing the traditional DRAM, whose scale problems require new future technologies that are still unknown. However, PCM has low endurance when compared with DRAM and robust failure recovery techniques are required to increase its lifetime. To address that, some error correcting techniques have been proposed, based on the non-volatile features of the PCM memories. In this work, we model and analyze the bit-ip probabilities of five such techniques (ECP, parity, SECDED, SAFER and BCH), in order to evaluate its impact to the wear out of the PCM. Using the bit-ip rate of 15%, obtained experimentally from the execution of the SPEC2006 benchmark, we mathematically modeled and simulated these techniques using both an empirical and theoretical probability rates. Our results show a clear degradation in techniques that use error-correcting codes, contradicting the previous results in the literature. Only ECP has not shown any degradation. We have also done power analyses of the above listed techniques so as to relate the endurance and the energy required by each technique. Again, the ECP stood out in the results, like SAFER as well. Finally, analytical probabilistic models for ECP and SECDED were proposed and an analysis of PAYG technique (based on ECP's analytical model) was performed / Mestrado / Ciência da Computação / Mestre em Ciência da Computação
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Prise en compte de la variabilité dans l’étude et la conception de circuits de lecture pour mémoires résistives / Design for variability of read circuitries for resistive memoriesMraihi, Salmen 26 September 2018 (has links)
De nos jours, la conception des systèmes sur puce devient de plus en plus complexe, et requiert des densités de mémoire sans cesse grandissantes. Pour ce faire, une forte miniaturisation des nœuds technologiques s’opère. Les mémoires non-volatiles résistives, tels que les RRAM, PC-RAM ou MRAM se présentent comme des alternatives technologiques afin d'assurer à la fois une densité suffisante et des faibles contraintes en surface, en latence, et en consommation à l’échelle nanométrique. Cependant, la variabilité croissante de ces cellules mémoires ainsi que des circuits en périphérie, tels que des circuits de lecture, est un problème majeur à prendre en considération. Cette thèse consiste en une étude détaillée et une aide à la compréhension de la problématique de variabilité appliquée aux circuits de lecture pour mémoires résistives. Elle propose des solutions d’amélioration de la fiabilité de lecture de ces mémoires. Pour ce faire, diverses études ont été réalisées : revue générale des solutions existantes d’amélioration du rendement de lecture, au niveau circuit et système ; développement d’un modèle statistique évaluant la contribution à la marge de lecture de la variabilité de chaque composante du chemin de lecture de la mémoire résistive ; analyse, caractérisation, modélisation et optimisation de l’offset d’un amplificateur de lecture dynamique pour mémoires résistives ; proposition d’architecture d’amplificateur de lecture permettant un rapport signal à offset optimum. / Nowadays, Systems on chip (SoCs) conception is becoming more and more complex and demand an ever-increasing amount of memory capacity. This leads to aggressive bit cell technology scaling. Nonvolatile resistive memories (PC-RAM, RRAM, MRAM) are promising technologic alternatives to ensure both high density, low power consumption, low area and low latencies. However, scaling lead to significant memory cell and/or memory periphery variability. This thesis aims to address variability issues in read circuitries of resistive memories and propose solutions for read yield enhancement of these memories. To this end, several sub-studies were achieved: overall review of the existing solutions for read yield enhancement, at both circuit and system level; development of a statistical model evaluating the contributions to read margin of the variability of each component of the resistive memory sensing path; analysis, characterization modelling and optimization of the offset of one particular dynamic sense amplifier for resistive memories; proposal of a sense amplifier architecture that features an optimum signal to offset ratio.
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3D high density memory based on emering resistive technologies : circuit and architecture design / Mémoires 3D haute densité à base de technologies résistives : architecture et circuitLevisse, Alexandre 06 December 2017 (has links)
Alors que les mémoires non-volatiles conventionnelles, telles que les mémoires flash à grille flottante, deviennent de plus en plus complexes à intégrer et souffrent de performances et d’une fiabilité de plus en plus réduite, les mémoires à variation de résistance (RRAM) telles que les OxRAM, CBRAM, MRAM ou PCM sont vues dans la communauté scientifique comme une alternative crédible. Cependant, les architectures de RRAM standard (telles que la 1Transistor-1RRAM) ne sont pas compétitives avec les mémoires flash sur le terrain de la densité. Ainsi, cette thèse se propose d’explorer le potentiel des architectures RRAM sans transistor que sont l’architecture Crosspoint et l’architecture VRRAM.Dans un premier temps, le positionnement des architectures Crosspoint et VRRAM dans la hiérarchie mémoire est étudié. De nouvelles problématiques, telles que les courant de sneakpath, la chute de tension dans les métaux ou la surface des circuits périphériques sont identifiées et modélisées. Dans un second temps, des solutions circuit répondant aux problématiques évoquées précédemment sont proposées. Finalement, cette thèse se propose d’explorer les opportunités ouvertes par l’utilisation de transistors innovants pour améliorer la densité ou les performances des architectures mémoires utilisant des RRAM. / While conventional non-volatiles memories, such as floating gate Flash memories, are becoming more and more difficult and costly to integrate and suffer of reduced performances and reliability, emerging resistive switching memories (RRAM), such as OxRAM, CBRAM, MRAM or PCM, are seen in the scientific community as a good way for tomorrow’s high-density memories. However, standard RRAM architectures (such as 1 Transistor-1 RRAM) are not competitive with flash technology in terms of density. Thereby, this thesis proposes to explore the opportunities opened by transistor-less RRAM architectures: Crosspoint and Vertical RRAM (VRRAM) architectures.First, the positioning of Crosspoint and VRRAM architectures in the memory hierarchy is studied. New constraints such as the sneakpath currents, the voltage drop through the metal lines or the periphery area overhead are identified and modeled. In a second time, circuit solutions answering to previously mentioned effects are proposed. Finally, this thesis proposes to explore new opportunities opened by the use of innovative transistors to improve the density or the performances of RRAM-based memory architectures.
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