El objetivo principal de este proyecto fue determinar si la implementación de un sistema de gestión mejora el control y seguimiento del Visor de Pedidos en una empresa que gestiona el proceso de aseguramiento de ventas para el rubro de telecomunicaciones. La metodología usada para el análisis y diseño del sistema fue el Proceso unificado ágil (AUP). El desarrollo se realizó en Windows Forms, apoyándose en el Framework .Net, empleando el lenguaje de programación C#, base de datos MySql y Macro Scheduler para las macros de soporte. Los resultados se presentaron en función a tres factores de evaluación como cantidad de consultas caídas, tiempo de duración de tareas, satisfacción de la perspectiva del usuario. Se determinó que la implementación del Sistema de Gestión ha mejorado el control y seguimiento del Visor de Pedidos que opera en el proceso de aseguramiento de ventas a través de la reducción porcentual de consultas caídas respecto a la bolsa de consultas totales que llegan al visor de pedidos donde sin la solución implementada era de 13.72% mientras que con la solución implementada paso a ser solo el 1% además de la reducción del tiempo promedio de las tareas para el control y seguimiento del visor de pedidos a 35 minutos con 26 segundos también se ha incrementado la satisfacción de las necesidades y expectativas de los usuarios involucrados con el visor de pedidos ya que el 100% de los encuestados considera que existe mayor control del visor de pedidos, 91.30% considera que ocasionalmente se presentan incidencias, el 100% considera que ha mejorado el tiempo de resolución de incidencias y el 74% afirma que existe mayor detalle en reportes de informe sobre el visor de pedidos.

Cada vez mais equipamentos eletrônicos digitais têm sido fabricados utilizando um sistema operacional embarcado. Por razões de custo, estes sistemas operacionais são implementados sobre um hardware com os requisitos mínimos para atender as necessidades da aplicação. Este trabalho apresenta um estudo sobre a viabilidade de implementação de suporte a multitarefa sobre a arquitetura FemtoJava, um microcontrolador monotarefa dedicado a sistemas embarcados. Para tanto, o suporte de hardware necessário é adicionado à arquitetura. Também são implementados dois escalonadores de tarefas diretamente em bytecodes Java, visando à otimização de área e o compromisso com desempenho e consumo de energia. Modificações no ambiente de desenvolvimento e uma ferramenta de relocação de endereços são propostas, objetivando a utilização dos escalonadores de tarefas implementados junto ao fluxo de desenvolvimento existente. Por fim, uma análise é realizada sobre o impacto que a capacidade de multitarefa produz no sistema em termos de desempenho, consumo de área e energia. / Most digital electronic equipments are produced using an embedded operating system. Due to economic reasons, these operating systems are implemented on hardware with minimal requirements to support the application needs. This work will present a viability study to implement multitask support on the FemtoJava architecture, a monotask microcontroller dedicated to embedded applications. The support to multitask involves the addition of specific hardware mechanisms to the architecture. Two different scheduling policies are then directly implemented using Java bytecodes, aiming area optimization as well as a good performance/energy-consumption trade-off. Some modifications in the development environment and a code relocation tool were introduced, in order to enable the use of the schedulers in the existing design tool flow. Finally, an analysis is performed to evaluate the impact that the multitask support produces in the system with respect to the final performance, area and energy consumption.

Face au coût de la gestion locale des infrastructures informatiques, de nombreuses entreprises ont décidé de la faire gérer par des fournisseurs externes. Ces derniers, connus sous le nom de IaaS (Infrastructure as a Service), mettent des ressources à la disposition des entreprises sous forme de machine virtuelle (VM - Virtual Machine). Ainsi, les entreprises n'utilisent qu'un nombre limité de machines virtuelles capables de satisfaire leur besoin. Ce qui contribue à la réduction des coûts de l'infrastructure informatique des entreprises clientes. Cependant, cette externalisation soulève pour le fournisseur, les problèmes de respect d'accord de niveau de service (SLA - Service Layer Agreement) souscrit par le client et d'optimisation de la consommation énergétique de son infrastructure. Au regard de l'importance que revêt ces deux défis, de nombreux travaux de recherches se sont intéressés à cette problématique. Les solutions de gestion d'énergie proposées consistent à faire varier la vitesse d'exécution des périphériques concernés. Cette variation de vitesse est implémentée, soit de façon native parce que le périphérique dispose des mécaniques intégrés, soit par simulation à travers des regroupements (spatial et temporel) des traitements. Toutefois, cette variation de vitesse permet d'optimiser la consommation énergétique d'un périphérique mais, a pour effet de bord d'impacter le niveau de service des clients. Cette situation entraine une incompatibilité entre les politiques de variation de vitesse pour la baisse d'énergie et le respect de l'accord de niveau de service. Dans cette thèse, nous étudions la conception et l'implantation d'un gestionnaire de ressources "éco énergétique" dans un système virtualisé. Un tel gestionnaire doit permettre un partage équitable des ressources entre les machines virtuelles tout en assurant une utilisation optimale de l'énergie que consomment ces ressources. Nous illustrons notre étude avec un ordonnanceur de machines virtuelles. La politique de variation de vitesse est implantée par le DVFS (Dynamic Voltage Frequency Scaling) et l'allocation de la capacité CPU aux machines virtuelles l'accord de niveau de service à respecter. / Considering the cost of local management of the computing infrastructures, numerous companies decided to delegate theirs to providers. These latter are known as an Infrastructure as a Service (IaaS) and provide resources to companies in the form of virtual machine (VM). This decision to outsource contributes to lower the cost of IT infrastructure of the customer companies. However, it raises for the provider, the problems of the respect of the Service Layer agreement (SLA) of the customer and of the optimization of the energy consumption of his infrastructure. With regard to the importance of these two challenges, many research works have focused on this problem. The proposed energy management solutions consist in varying the execution speed of the affected devices. This variation of speed is implemented either natively because the device has integrated mechanics, or by simulation through a spatial or temporal batching requests. However, this variation of speed optimizes the energy consumption of a device but has the side effect of degrading the customers SLA. In this thesis, we study the design and the implementation of an energy-efficient resources manager in a virtualized system. Such a manager must ensure a fair share of resources among VMs while ensuring optimal use of the energy consumed by the resources. We illustrate our study thanks to a scheduler of VMs. The DVFS constitutes our energy management policy and the CPU capacity of the VMs the SLA to respect.

Cada vez mais equipamentos eletrônicos digitais têm sido fabricados utilizando um sistema operacional embarcado. Por razões de custo, estes sistemas operacionais são implementados sobre um hardware com os requisitos mínimos para atender as necessidades da aplicação. Este trabalho apresenta um estudo sobre a viabilidade de implementação de suporte a multitarefa sobre a arquitetura FemtoJava, um microcontrolador monotarefa dedicado a sistemas embarcados. Para tanto, o suporte de hardware necessário é adicionado à arquitetura. Também são implementados dois escalonadores de tarefas diretamente em bytecodes Java, visando à otimização de área e o compromisso com desempenho e consumo de energia. Modificações no ambiente de desenvolvimento e uma ferramenta de relocação de endereços são propostas, objetivando a utilização dos escalonadores de tarefas implementados junto ao fluxo de desenvolvimento existente. Por fim, uma análise é realizada sobre o impacto que a capacidade de multitarefa produz no sistema em termos de desempenho, consumo de área e energia. / Most digital electronic equipments are produced using an embedded operating system. Due to economic reasons, these operating systems are implemented on hardware with minimal requirements to support the application needs. This work will present a viability study to implement multitask support on the FemtoJava architecture, a monotask microcontroller dedicated to embedded applications. The support to multitask involves the addition of specific hardware mechanisms to the architecture. Two different scheduling policies are then directly implemented using Java bytecodes, aiming area optimization as well as a good performance/energy-consumption trade-off. Some modifications in the development environment and a code relocation tool were introduced, in order to enable the use of the schedulers in the existing design tool flow. Finally, an analysis is performed to evaluate the impact that the multitask support produces in the system with respect to the final performance, area and energy consumption.

Cada vez mais equipamentos eletrônicos digitais têm sido fabricados utilizando um sistema operacional embarcado. Por razões de custo, estes sistemas operacionais são implementados sobre um hardware com os requisitos mínimos para atender as necessidades da aplicação. Este trabalho apresenta um estudo sobre a viabilidade de implementação de suporte a multitarefa sobre a arquitetura FemtoJava, um microcontrolador monotarefa dedicado a sistemas embarcados. Para tanto, o suporte de hardware necessário é adicionado à arquitetura. Também são implementados dois escalonadores de tarefas diretamente em bytecodes Java, visando à otimização de área e o compromisso com desempenho e consumo de energia. Modificações no ambiente de desenvolvimento e uma ferramenta de relocação de endereços são propostas, objetivando a utilização dos escalonadores de tarefas implementados junto ao fluxo de desenvolvimento existente. Por fim, uma análise é realizada sobre o impacto que a capacidade de multitarefa produz no sistema em termos de desempenho, consumo de área e energia. / Most digital electronic equipments are produced using an embedded operating system. Due to economic reasons, these operating systems are implemented on hardware with minimal requirements to support the application needs. This work will present a viability study to implement multitask support on the FemtoJava architecture, a monotask microcontroller dedicated to embedded applications. The support to multitask involves the addition of specific hardware mechanisms to the architecture. Two different scheduling policies are then directly implemented using Java bytecodes, aiming area optimization as well as a good performance/energy-consumption trade-off. Some modifications in the development environment and a code relocation tool were introduced, in order to enable the use of the schedulers in the existing design tool flow. Finally, an analysis is performed to evaluate the impact that the multitask support produces in the system with respect to the final performance, area and energy consumption.

As arquiteturas multiprocessadas heterogêneas têm como objetivo principal a extração de maior desempenho da execução dos processos, por meio da utilização de núcleos apropriados às suas demandas. No entanto, a extração de maior desempenho é dependente de um mecanismo eficiente de escalonamento, capaz de identificar as demandas dos processos em tempo real e, a partir delas, designar o processador mais adequado, de acordo com seus recursos. Este trabalho tem como objetivo propor e implementar o modelo de um escalonador para arquiteturas multiprocessadas heterogêneas, baseado em software e hardware, aplicado ao sistema operacional Linux e ao processador SPARC Leon3, como prova de conceito. Nesse sentido, foram implementados monitores de desempenho dentro dos processadores, os quais identificam as demandas dos processos em tempo real. Para cada processo, sua demanda é projetada para os demais processadores da arquitetura e em seguida é realizado um balanceamento visando maximizar o desempenho total do sistema, distribuindo os processos entre processadores, de modo a diminuir o tempo total de processamento de todos os processos. O algoritmo de maximização Hungarian, utilizado no balanceamento do escalonador, foi desenvolvido em hardware, proporcionando paralelismo e maior desempenho na execução do algoritmo. O escalonador foi validado por meio da execução paralela de diversos benchmarks, resultando na diminuição dos tempos de execução em relação ao escalonador sem suporte à heterogeneidade / Heterogeneous multiprocessor architectures have as main objective the extraction of higher performance from processes through the use of appropriate cores to their demands. However, the extraction of higher performance is dependent on an efficient scheduling mechanism, able to identify in real-time the demands of processes and to designate the most appropriate processor according to their resources. This work aims at design and implementations of a model of a scheduler for heterogeneous multiprocessor architectures based on software and hardware, applied to the Linux operating system and the SPARC Leon3 processor as proof of concept. In this sense, performance monitors have been implemented within the processors, which in real-time identifies the demands of processes. For each process, its demand is projected for the other processors in the architecture and then it is performed a balancing to maximize the total system performance by distributing processes among processors. The Hungarian maximization algorithm, used in balancing scheduler was developed in hardware, providing greater parallelism and performance in the execution of the algorithm. The scheduler has been validated through the parallel execution of several benchmarks, resulting in decreased execution times compared to the scheduler without the heterogeneity support

Computing systems are becoming increasingly data-intensive because of the explosion of data and the needs for processing the data, and storage management is critical to application performance in such data-intensive computing systems. However, existing resource management frameworks in these systems lack the support for storage management, which causes unpredictable performance degradations when applications are under I/O contention. Storage management of data-intensive systems is a challenging problem because I/O resources cannot be easily partitioned and distributed storage systems require scalable management. This dissertation presents the solutions to address these challenges for typical data-intensive systems including high-performance computing (HPC) systems and big-data systems. For HPC systems, the dissertation presents vPFS, a performance virtualization layer for parallel file system (PFS) based storage systems. It employs user-level PFS proxies to interpose and schedule parallel I/Os on a per-application basis. Based on this framework, it enables SFQ(D)+, a new proportional-share scheduling algorithm which allows diverse applications with good performance isolation and resource utilization. To manage an HPC system’s total I/O service, it also provides two complementary synchronization schemes to coordinate the scheduling of large numbers of storage nodes in a scalable manner. For big-data systems, the dissertation presents IBIS, an interposition-based big-data I/O scheduler. By interposing the different I/O phases of big-data applications, it schedules the I/Os transparently to the applications. It enables a new proportional-share scheduling algorithm, SFQ(D2), to address the dynamics of the underlying storage by adaptively adjusting the I/O concurrency. Moreover, it employs a scalable broker to coordinate the distributed I/O schedulers and provide proportional sharing of a big-data system’s total I/O service. Experimental evaluations show that these solutions have low-overhead and provide strong I/O performance isolation. For example, vPFS’ overhead is less than 3% in through- put and it delivers proportional sharing within 96% of the target for diverse workloads; and IBIS provides up to 99% better performance isolation for WordCount and 30% better proportional slowdown for TeraSort and TeraGen than native YARN.

Les travaux de cette thèse portent sur l'optimisation des flux énergétiques et informatiques dans un réseau intelligent ayant pour but d'alimenter un centre de calcul via des énergies renouvelables. Dans cette thèse sont traités les problèmes liés à la mise en commun des informations de types énergétique et informatique dans une contrainte de réactivité forte à travers la création d'une architecture pour un réseau intelligent. La modélisation d'un tel réseau doit permettre la prise de décision de manière dynamique et autonome. L'objectif de cette modélisation, via un réseau intelligent, est l'optimisation des ressources renouvelables afin de diminuer l'empreinte écologique. / The work of this thesis deals with the optimization of energy and computer flows in an intelligent network aiming to supply a data center via renewable energies. In this thesis are treated the problems related to the pooling of energy and computer information in a strong reactivity constraint through the creation of an architecture for an intelligent network. The modeling of such a network must allow the decision making in a dynamic and autonomous way. The objective of this modeling, via an intelligent network, is the optimization of renewable resources in order to reduce the ecological footprint.

The project is aimed at testing the kernels of real-time OS within the HC08 platform. The RM, EDF and polled loop mechanisms are being compared as well as freely available FreeRSTOS and QP systems. The project also incorporates descriptions of techniques used in the development, obtaining and the implementation of test environments. The evaluation is based on the tests made within the HC08 platform and the knowledge gained from the programming for every individual type of real-time OS.

By using the Soil Conservation Service (SCS) “polynomial” method for corn in the Mississippi Irrigation Scheduling Tool (MIST), the total number of irrigations required during the growing season can be reduced depending on the variety, growing degree days required to reach maturity, and the length of the growing season. Results showed that even though the SCS method called for irrigations earlier in the season, the method did not trigger irrigation events after the crop reached physiological maturity. In addition, although changing the timing of model initiation (planting vs emergence) was not important on the total crop water use, it may have other benefits. Lastly, Watermark 200SS sensors generally did not trigger similar irrigation events, especially around the mid-season, but shallower sensors somewhat matched and showed similar trends with the MIST modeled results and irrigation records. Therefore, using MIST with sensors may be beneficial when making precise irrigation scheduling decisions.