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Metal oxide thin films are dynamic materials that have revolutionised the nature of semiconductor and electronic thin film devices. Recently, progress has stagnated in some aspects due to the increasingly complex deposition apparatus required, and the dearth of suitable precursor complexes of certain ???difficult??? metals. This thesis seeks to address both of these issues. The application of a precursor complex, Mg6(O2CNEt2)12 to the SSCVD of MgO thin films delivered the highest quality films ever reported with this technique. The resultant films were found to be of purely (111) orientation. Due to the nature of the precursor, the chemical reactions occurring at the surface during SSCVD growth result in a high growth rate, low flux environment and films of (111) orientation have been achieved without the amorphous underlayer. This finding has important implications for buffer layers in perovskite thin film devices. The unprecedented precursor chemistry has been used as a basis for the extremely high quality material produced, along with the unusual, yet beneficial structural morphology it possesses. A new range of barium complexes with single encapsulating ligands have been prepared for use in chemical vapour deposition (CVD) of BaTiO3 thin films. A novel pathway to an unprecedented class of barium carbamates is reported, and also new dianionic bis ??-ketoesterates and their barium, strontium, and calcium analogues were synthesised. High resolution mass spectrometry showed the barium bis ??-ketoesterate derivatives to be monomeric, and preliminary testing indicated some volatility in these species. Insights were gained into the likely successful pathways to building a volatile heterobimetallic precursor complex containing an alkaline earth metal. The knowledge of intimate mixing in heterobimetallic precursor complexes was extended by some novel chemistry to develop the first mixed Zn/Mg carbamato cluster complexes. These complexes were found to be excellent SSCVD precursors for ZnxMg1-xO thin films. Thin films were deposited with these precursors and exhibited a single preferred orientation, with a constant amount of magnesium throughout the bulk of the films. Investigation of the light emission properties of the films revealed significant improvements in the structural order commensurate with the incorporation of magnesium, and the formation of the ZnxMg1-xO alloy.

Miniaturisation has been the holy grail of mobile technology. The ability to move around with our gadgets, especially the ones for communication and entertainment, has been what semiconductor scientists have battled over the past decades. Miniaturisation brings about reduced consumption in power and ease of mobility. However, the main impediment to untethered mobility of our gadgets has been the lack of unlimited power supply. The battery had filled this gap for some time, but due to the increased functionalities of these mobile gadgets, increasing the battery capacity would increase the weight of the device considerably that it would eventually become too heavy to carry around. Moreover, the fact that these batteries need to be recharged means we are still not completely free of power cords. The advent of low powered micro-controllers and sensors has created a huge industry for more powerful devices that consume a lot less power. These devices have encouraged hardware designers to reduce the power consumption of the gadgets. This has encouraged the idea of wireless power transmission on another level. With lots of radio frequency energy all around us, from our cordless phones to the numerous mobile cell sites there has not been a better time to delve more into research on WPT. This study looks at the feasibilities of WPT in small device applications where very low power is consumed to carry out some important functionality. The work done here compared two rectifying circuits’ efficiencies and ways to improve on the overall efficiencies. The results obtained show that the full wave rectifier would be the better option when designing a WPT system as more power can be drawn from the rectenna. The load also had a great role as this determined the amount of power drawn from the circuitry.

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Two MOS-Bipolar composite power semiconductor switching devices are proposed and experimentally demonstrated. These devices feature high voltage and high current capabilities, fast switching speeds, simple gate drive requirements, savings in chip area, reverse bias second breakdown ruggedness and large safe operating areas. Application characteristics of the devices for high frequency power inverter circuits are discussed. Monolithic integration of the two composite devices are also proposed. / Ph. D.

The semiconductor industry has decreased silicon-based device feature sizes dramatically over the last two decades for improved performance. However, current technology has approached the limit of achievable enhancement via this method. Therefore, other techniques, including introducing stress into the silicon structure, are being used to further advance device performance. While these methods produce successful results, there is not a proven reliable method for stress and strain measurements on the nanometer scale characteristic of these devices. The ability to correlate local strain values with processing parameters and device performance would allow for more rapid improvements and better process control. In this research, x-ray diffraction and convergent beam electron diffraction have been utilized to quantify the strain behavior of simple and complex strained silicon-based systems. While the stress relaxation caused by thinning of the strained structures to electron transparency complicates these measurements, it has been quantified and shows reasonable agreement with expected values. The relaxation values have been incorporated into the strain determination from relative shifts in the higher order Laue zone lines visible in convergent beam electron diffraction patterns. The local strain values determined using three incident electron beam directions with different degrees of tilt relative to the device structure have been compared and exhibit excellent agreement.

Radio-frequency filters and oscillators are widely used in wireless communication and high-speed digital systems, and they are mostly built on passive integrated inductors, which occupy a relative large silicon area. This research attempted to implement filters and oscillators operating at 1-5 GHz using transistors only, to reduce the circuits’ area. The filters and oscillators are designed using active inductors, based on the gyrator principle; they are fabricated in standard digital CMOS technology to be compatible with logic circuits and further lower the cost. To obtain the highest operating frequency, only parasitic capacitors were used. Two new active-inductor circuits are derived from this research, labeled allNMOS and all-NMOS-II. The all-NMOS active inductor was used to design high-Q bandpass filters and oscillators, which were fabricated in TSMC’s 0.18-µm digital CMOS process. The highest center frequency measured was 5.7 GHz at 0.20-µm gate length and the maximum repeatably measured Q was 665. 2.4-GHz circuits were also designed and fabricated in 0.40-µm gate length. The all-NMOS-II circuit has superior linearity and signal fidelity, which are robust against process and temperature variations, due to its novel structure. It was used in signal drivers and will be fabricated in commercial products. Small-signal analysis was conducted for each of the active-inductor, filter and oscillator circuits, and the calculated performance matches those from simulations. The noise performance of the active inductor, active-inductor filter and oscillator was also analyzed and the calculated results agree with simulations. The difference between simulation and measured results is about 10% due to modeling and parasitic extraction error. The all-NMOS active-inductor circuit was granted a US patent. The US patent for all-NMOS-II circuit is pending. This research generated three conference papers and two journal papers.

A new heuristic method to improve the I/O pad assignment for the sea-of-gates placement algorithm "PROUD" is proposed. In PROUD, the preplaced I/O pads are used as the boundary conditions in solving sparse linear equations to obtain the optimal module placement. Due to the total wire length determined by the module positions is the strong function of the preplaced I/O pad positions, the optimization of the I/O pad circular order and their assignment to the physical locations on the chip are attempted in the thesis. The proposed I/O pad assignment program is used as a predecessor of PROUD. The results have revealed excellent improvement.

Fabrication techniques and process integration considerations for amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) constitute the central theme of this dissertation. Within this theme three primary areas of focus are pursued. The first focus involves formulating a general framework for assessing passivation. Avoiding formation of an undesirable backside accumulation layer in an AOS bottom-gate TFT is accomplished by (i) choosing a passivation layer in which the charge neutrality level is aligned with (ideal case) or higher in energy than that of the semiconductor channel layer charge neutrality level, and (ii) depositing the passivation layer in such a manner that a negligible density of oxygen vacancies are present at the channel-passivation layer interface. Two AOS TFT passivation schemes are explored. Sputter-deposited zinc tin silicon oxide (ZTSO) appears promising for suppressing the effects of negative bias illumination stress (NBIS) with respect to ZTO and IGZO TFTs. Solution-deposited silicon dioxide is used as a barrier layer to subsequent PECVD silicon dioxide deposition, yielding ZTO TFT transfer curves showing that the dual-layer passivation process does not significantly alter ZTO TFT electrical characteristics. The second focus involves creating an adaptable back-end process compatible with flexible substrates. A detailed list of possible via formation techniques is presented with particular focus on non-traditional and adaptable techniques. Two of the discussed methods, "hydrophobic surface treatment" and "printed local insulator," are demonstrated and proven effective. The third focus is printing AOS TFT channel layers in order to create an adaptable and additive front-end integrated circuit fabrication scheme. Printed zinc indium aluminum oxide (ZIAO) and indium gallium zinc oxide (IGZO) channel layers are demonstrated using a SonoPlot piezoelectric printing system. Finally, challenges associated with printing electronic materials are discussed. Organic-based solutions are easier to print due to their ability to "stick" to the substrate and form well-defined patterns, but have poor electrical characteristics due to the weakness of organic bonds. Inorganic aqueous-based solutions demonstrate good electrical performance when deposited by spin coating, but are difficult to print because precise control of a substrate's hydrophillic/hydrophobic nature is required. However, precise control is difficult to achieve, since aqueous-based solutions either spread out or ball up on the substrate surface. Thickness control of any printed solution is always problematic due to surface wetting and the elliptical thickness profile of a dispensed solution. / Graduation date: 2013