No description available.

The High-Intensity-Discharge Lamps (HID), consisting of a broad range of gas discharge lamps, are notable for their high luminous efficacy, good color rendering, and long life. Metal halide lamps have the best combination of the above properties and are considered the most ideal light sources. Recently, there has been an emerging demand to replace the conventional halogen headlamps with the newly introduced small-wattage metal halide HID lamps. However, this lamp demands a highly efficient ballast and very complex control circuitry that can achieve fast turn-on and different regulation modes during the lamp start-up process. Due to the complex lamp v-i profile and timing control requirements, control circuit built with conventional analog control is unavoidably cumbersome. With the unparalleled flexibility and programmability, digital control shows more advantages in this application. An automotive HID ballast with digital controller is developed to demonstrate the feasibility of the digital control along with some key issues in digital controller selection and design. Results show that the microcontroller-based HID ballast can successfully realize the required control functions and achieve a smooth turn-on process and a fast turn-on time of 8 seconds. One of the major issues of ballast design is the ballast/HID lamp system stability, which originates from the lamp negative incremental impedance. The lamp small-signal model is presented with simulation and measurements. The negative incremental impedance is attributed to a RHP zero in the small-signal model. A new analysis approach, impedance ratio criterion, is proposed to analyze the system stability. With this approach, it clearly shows how the control configurations and converter and control design affect the system stability. The results can provide guidance and be easily used in control configuration selection and converter and control design. Analysis shows that ballast based on PWM converter without inner current loop is unstable and with inner current loop can stabilized the system. This is the reason why for a microcontroller-based ballast system the inner current loop has to be used. HID lamp has its special acoustic resonance problem and thus a low-frequency unregulated full-bridge is used following the front-end DC/DC converter. To prevent from lamp re-igniting during each bridge commutation, a minimum current changing slope has to be guaranteed. In order to help design the converter, the ballast/lamp re-ignition analysis is presented. With this analysis, it shows that the output capacitance has to be small enough to ensure adequate current slope during zero crossing. Though some approximation is used to simplify the analysis, the results can provide qualitative guidance in the ballast design. / Master of Science

Accurate small and large-signal models of metal-semiconductor field effect transistor (MESFET) devices are essential in all modern microwave and millimeter wave applications. Those models are used for robust designs and fabrication development. The sophistication of modern communication systems urged the need of monolithic microwave integrated circuits (MMICs), which consists of many MESFETs on the same chip. As the chip density increases, the need of accurate MESFET models becomes more pronounced. In this study, a new technique has been developed to extract a 15-element small signal model of MESFET devices. This technique implies the use of three sets of S-parameter measurements at different bias conditions. The technique consists of two major steps; in the first step, some of the bias-independent extrinsic parameters are estimated in preparation for the second step. In the second step, all other parameters should be extracted at the bias point of interest. This technique shows reliable results. Unlike other optimization techniques, our proposed technique shows insensitivity to the unavoidable measurement errors over any frequency range. It shows a unique solution for all parameter values. This technique has been tested on S-parameters of a hypothetical device model and compared with other optimization-based extraction techniques. Moreover, it has been also applied to GaAsTEK 0.8x300 μm2 MESFETs to extract the model parameters at different bias voltages. The study reveals accurate and consistent results among the similar devices on the same wafer. Some thermal characteristics of the small-signal parameters are discussed. The parameters are extracted from measurements at three temperatures for two similar devices on the same wafer. The thermal results of the two devices demonstrate consistent results, which assure the preciseness, and robustness of our proposed technique. In addition, the relation between the small-signal model parameters and the large signal model parameters is also presented. The parameters of an empirical model for the drain-source current are extracted from the dc measurements along with the small-signal transconductance and output conductance. The large-signal model results for a GaAsTEK 0.8x300 μm2 MESFET are introduced. / Ph. D.

"A Low Noise Amplifier (LNA) is an important building block in the RF receiver chain. Typically the LNA should provide acceptable gain and high linearity while maintaining low noise and power consumption. To optimize these conflicting goals the so-called Cascode topology is widely used in industry. Here the gain cell is comprised of two transistors, one in common-source and the other in common gate configuration. Cascode has a number of competitive advantages over other topologies such as high output impedance that shields the input device from voltage variations at the output, good reverse isolation resulting in improved stability, and acceptable input matching. Moreover, the topology features excellent frequency characteristics. Unfortunately, a Cascode design is expensive to deploy in RF systems and it requires more careful tuning and matching. Since the design relies on many circuit components, optimization methods are generally difficult to implement and often inaccurate in their predictions. To overcome these problems, this thesis proposes a modeling environment within the Advanced Design Systems (ADS) simulator that utilized DC and RF measurements in an effort to characterize each transistor separately. The model creates an easy-to-apply design approach capable of predicting the most important circuit components of the Cascode topology. The validity of the method is tested in ADS with a realistic p-HEMT library device. The comparison between model prediction and the realistic device involves both standard transistor parameters and high-frequency parasitic effects. "

Recent advances in wireless communication industry, radio- frequency circuits are developing fast. For power amplifiers, the active circuits are mainly composed of transistors where withstand high voltage and current. The excellent transistors characteristic result in good circuit performances. In the thesis, the modeling of InGaAs pseudomorphic high electron mobility transistor was provided by Win Semiconductor Corporation. The established small signal model contains extrinsic and intrinsic elements. The extrinsic elements are extracted by simple method without fitting process for long time. Then, the intrinsic elements are obtained by conventional matrix transformations. The each element of models is varied with different gate width area are also discussed. Finally, the nonlinear models are expanded upon the concept of small signal model. Due to some of intrinsic elements are significantly varied with bias, small signal models have not applied to nonlinear circuit simulations. For developing nonlinear models, the nonlinear elements characteristics are described by empirical fitting equations. The accuracy of models is achieved by comparing simulated and on wafer measurement results, including DC¡Bsmall signal and large signal power characteristics.

No description available.

Silicon carbide is a very promising semiconductor material for high-power, highrequency, and high-temperature applications. SiC distinguishes from traditional narrow bandgap semiconductors, such as silicon, in that common doping impurities in SiC have activation energies larger than the thermal energy kT even at room temperature. This causes incomplete ionization of such impurities, which leads to strong temperature and frequency dependence of the semiconductor junction differential admittance and, if carrier freeze-out effects are not taken into account, errors in doping profiles calculated from capacitance-voltage data. Approaches commonly used to study the influence of incomplete impurity ionization on the junction admittance are based on the truncated space charge approximation and/or the small-signal approximation. The former leads to impurity ionization time constant and occupation number errors, while the latter fails if the measurement ac signal amplitude is larger than kT/q. In this work, a new reverse bias Schottky junction admittance model valid for the general case of an arbitrary temperature, measurement signal frequency and amplitude, and doping occupation number and time constant distributions is developed. Results of junction admittance calculations using the developed model are compared with the results of traditional models. Based on the general model, a new method of admittance spectroscopy data analysis is created and used to determine impurity parameters more accurately than allowed by traditional approaches. Incomplete impurity ionization is investigated for the case of nitrogen donors and aluminum and boron acceptors in 4H- and 6H-SiC. It is shown that the degree of carrier freeze-out is significant in heavily N-doped 6H-SiC and in Al- and B-doped SiC. Frequency dispersion of the junction admittance is shown to be significant at room temperature in N- and B-doped SiC. Junction capacitance calculations as a function of applied dc bias show that calculated doping profiles deviate from the actual impurity concentration profiles if the impurity ionization time constant is comparable with the ac signal period. This is the case for N- and B-doped SiC with certain values of the impurity activation energy and capture cross-section. Validity of the new model and its predictions are successfully tested on experimental admittance data for N- and B-doped SiC Schottky diodes.

No description available.

With the fast advance in VLSI technology, smaller, more powerful digital system is available. It requires power supply with higher power density, lower profile and higher efficiency. PWM topologies have been widely used for this application. Unfortunately, hold up time requirement put huge penalties on the performance of these topologies. Also, high switching loss limited the power density achievable for these topologies. Two techniques to deal with hold up time issue are discussed in this dissertation: range winding solution and asymmetric winding solution, the efficiency at normal operation point could be improved with these methods. To reduce secondary rectifier conduction loss, QSW synchronous rectifier is developed, which also helps to achieve ZVS for symmetrical half bridge converter. Although with these methods, the efficiency of front end DC/DC converter could be improved, the excessive switching loss prohibited higher switching frequency. To achieve the targets, topologies with high switching frequency and high efficiency must be developed. Three resonant topologies: SRC, PRC and SPRC, are been investigated for this application because of their fame of low switching loss. Unfortunately, to design with hold up requirement, none of them could provide significant improvements over PWM converter. Although the negative outcome, the desired characteristic for front end application could be derived. Base on the desired characteristic, a thorough search is performed for three elements resonant tanks. LLC resonant topology is found to posses the desired characteristic. From comparison, LLC resonant converter could reduce the total loss by 40% at same switching frequency. With doubled switching frequency, efficiency of LLC resonant converter is still far better than PWM converters. To design the power stage of LLC resonant converter, DC analysis is performed with two methods: simulation and fundamental component simplification. Magnetic design is also discussed. The proposed integrated magnetic structure could achieve smaller volume, higher efficiency and easy manufacture. To make practical use of the topology, over load protection is a critical issue. Three methods to limit the stress under over load situation are discussed. With these methods, the converter could not only survive the over load condition, but also operate for long time under over load condition. Next small signal characteristic of the converter is investigated in order to design the feedback control. For resonant converter, state space average method is no longer valid. Two methods are used to investigate the small signal characteristic of LLC resonant converter: simulation and extended describing function method. Compare with test results, both methods could provide satisfactory results. To achieve both breadth and depth, two methods are both used to reveal the myth. With this information, compensator for feedback control could be designed. Test circuit of LLC resonant converter was developed for front end DC/DC application. With LLC topology, power density of 48W/in3 could be achieved compare with 13W/in3 for PWM converter. / Ph. D.

This work presents a modeling methodology that uses new types of models called low-frequency, large-signal models in a circuit simulator (Saber) to model a complex hybrid ac/dc power electronics system. The new achievement in this work is being able to model the different components as circuit-based models and to capture some of the large-signal phenomena, for example, real transient behavior of the system such as startup, inrush current and power flow directionality. In addition, models are capable of predicting most low frequency harmonics only seen in real switching detailed models. Therefore the new models system can be used to predict steady state performance, harmonics, stability and transients. This work discusses the modeling issues faced based on the author recent experiences both on component level and system level. In addition, it recommends proper solutions to these issues verified with simulations. This work also presents one of the new models in detail, a voltage source inverter (VSI), and explains how the model can be modified to capture low frequency harmonics that are usually phenomena modeled only with switching models. The process of implementing these different phenomena is discussed and the model is then validated by comparing the results of the proposed low frequency large signal (LFLS) model to a complete detailed switching model. In addition, experimental results are also obtained with a 2 kW voltage source inverter prototype to validate the proposed improved average model (LFLS model). In addition, a complete Verification, Validation, and Uncertainty Quantification (VV&UQ) procedures is applied to a two-level boost rectifier. The goal of this validation process is the improvement of the modeling procedure for power electronics systems, and the full assessment of the boost rectifier model predictive capabilities. Finally, the performance of the new models system is compared with the detailed switching models system. The LFLS models result in huge cut in simulation time (about 10 times difference) and also the ability to use large time step with the LFLS system and still capture all the information needed. Even though this low frequency large signal (LFLS) models system has wider capabilities than ideal average models system, it still can’t predict all switching phenomena. Therefore, another benefit of this modeling approach is the ability to mix different types of models (low frequency large signal (LFLS) and detailed switching) based on the application study they are used for. / Ph. D.