Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / This Master Thesis presents the development of a new dynamic model for the DC-DC Zero-Voltage-Switching Phase-Shift-Modulated Full-Bridge (ZVS-PSM-FB).At first, the ZVSPSM-FB converter is analyzed and the Steady-State equations are derived. Then, using the ac equivalent circuit modeling technique, it is derived two new ZVS-PSM-FB dynamical models, based on step operation of the converter and steady-state converter equations. These two new ZVS-PSM-FB dynamical models with two dynamical models previously presented in the literature are used to perform a frequency response and a transfer-function DC-gain comparison to verify the performance of the dynamical models. Comparison results shows that our second model here derived presents a better performance among other models, keeping the desirable characteristics as simple polynomial ratio transfer-functions, excellent theoretical accuracy of transfer-functions DC-gains, transfer-functions coefficients independency of circuit parasitics components, excepting the primary leakage inductance. Even in this work, it is shown frequency response experimental results of the ZVS-PSM-FB converter, designed following telecommunications rectifiers power supplies standards. / Esta Dissertação de Mestrado apresenta o desenvolvimento de um novo modelo dinâmico para o conversor CC-CC Ponte-Completa Modulado por Deslocamento de Fase e com Comutação em Zero de Tensão (ZVS-PSM-FB). Inicialmente, o conversor ZVS-PSM-FB é analisado, onde são derivadas as equações que definem a operação em regime-permanente do conversor. A seguir, utilizando-se da técnica de modelagem ca média de conversores estáticos, deriva-se dois novos modelos dinâmicos para o conversor, tendo por base as etapas de operação do conversor e as equações de regime-permanente. Feito isso, os dois modelos aqui derivados, são comparados com outros dois modelos dinâmicos já apresentados na literatura para verificar seus desempenhos quanto à resposta em freqüência e resposta do ganho-cc das funções de transferências à variações de carga do conversor, dos modelos dinâmicos. Resultados desta comparação mostram que o segundo modelo aqui derivado é o que apresenta melhor desempenho entre os modelos comparados, mantendo características desejáveis de simples formato de função de transferência como razão de polinômios, precisão teórica excelente para resposta de ganho-cc das funções de transferências e não-dependência dos coeficientes das funções de transferências de parâmetros parasitas do circuito, a menos da indutância de dispersão do transformador. Ainda neste trabalho, são mostrados resultados experimentais da resposta em freqüência do conversor ZVS-PSM-FB, projetado com especificações de normas para retificadores chaveados de alta-freqüência para equipamentos de telecomunicações.

Les études qui seront présentées dans le cadre de cette thèse portent sur le développement et l’optimisation des techniques pour la modélisation compacte des transistors bipolaires à hétérojonction (TBH). Ce type de modélisation est à la base du développement des bibliothèques de composants qu’utilisent les concepteurs lors de la phase de simulation des circuits intégrés. Le but d’une technologie BiCMOS est de pouvoir combiner deux procédés technologiques différents sur une seule et même puce. En plus de limiter le nombre de composants externes, cela permet également une meilleure gestion de la consommation dans les différents blocs digitaux, analogiques et RF. Les applications dites rapides peuvent ainsi profiter du meilleur des composants bipolaires et des transistors CMOS. Le défi est d’autant plus critique dans le cas des applications analogiques/RF puisqu’il est nécessaire de diminuer la puissance consommée tout en maintenant des fréquences de fonctionnement des transistors très élevées. Disposer de modèles compacts précis des transistors utilisés est donc primordial lors de la conception des circuits utilisés pour les applications analogiques et mixtes. Cette précision implique une étude sur un large domaine de tensions d’utilisation et de températures de fonctionnement. De plus, en allant vers des nœuds technologiques de plus en plus avancés, des nouveaux effets physiques se manifestent et doivent être pris en compte dans les équations du modèle. Les règles d’échelle des technologies plus matures doivent ainsi être réexaminées en se basant sur la physique du dispositif. Cette thèse a pour but d’évaluer la faisabilité d’une offre de modèle compact dédiée à la technologie avancée SiGe TBH de chez ST Microelectronics. Le modèle du transistor bipolaire SiGe TBH est présenté en se basant sur le modèle compact récent HICUMversion L2.3x. Grâce aux lois d’échelle introduites et basées sur le dessin même des dimensions du transistor, une simulation précise du comportement électrique et thermique a pu être démontrée.Ceci a été rendu possible grâce à l’utilisation et à l’amélioration des routines et méthodes d’extraction des paramètres du modèle. C’est particulièrement le cas pour la détermination des éléments parasites extrinsèques (résistances et capacités) ainsi que celle du transistor intrinsèque. Finalement, les différentes étapes d’extraction et les méthodes sont présentées, et ont été vérifiées par l’extraction de bibliothèques SPICE sur le TBH NPN Haute-Vitesse de la technologie BiCMOS avancée du noeud 55nm, avec des fréquences de fonctionnement atteignant 320/370GHz de fT = fmax. / The aim of BiCMOS technology is to combine two different process technologies intoa single chip, reducing the number of external components and optimizing power consumptionfor RF, analog and digital parts in one single package. Given the respectivestrengths of HBT and CMOS devices, especially high speed applications benefit fromadvanced BiCMOS processes, that integrate two different technologies.For analog mixed-signal RF and microwave circuitry, the push towards lower powerand higher speed imposes requirements and presents challenges not faced by digitalcircuit designs. Accurate compact device models, predicting device behaviour undera variety of bias as well as ambient temperatures, are crucial for the development oflarge scale circuits and create advanced designs with first-pass success.As technology advances, these models have to cover an increasing number of physicaleffects and model equations have to be continuously re-evaluated and adapted. Likewiseprocess scaling has to be verified and reflected by scaling laws, which are closelyrelated to device physics.This thesis examines the suitability of the model formulation for applicability to production-ready SiGe HBT processes. A derivation of the most recent model formulationimplemented in HICUM version L2.3x, is followed by simulation studies, whichconfirm their agreement with electrical characteristics of high-speed devices. Thefundamental geometry scaling laws, as implemented in the custom-developed modellibrary, are described in detail with a strong link to the specific device architecture.In order to correctly determine the respective model parameters, newly developed andexisting extraction routines have been exercised with recent HBT technology generationsand benchmarked by means of numerical device simulation, where applicable.Especially the extraction of extrinsic elements such as series resistances and parasiticcapacitances were improved along with the substrate network.The extraction steps and methods required to obtain a fully scalable model library wereexercised and presented using measured data from a recent industry-leading 55nmSiGe BiCMOS process, reaching switching speeds in excess of 300GHz. Finally theextracted model card was verified for the respective technology.