Thesis (Ph. D.)--University of Texas at Austin, 1999. / Vita. Includes bibliographical references (leaves 167-175). Available also in a digital version from Dissertation Abstracts.

No description available.

The objective of the proposed research is to analyze the effects of total ionizing dose (TID) on highly scaled CMOS and Silicon-Germanium Heterojunction Bipolar Transistors (SiGE HBTs). TID damage is caused by a build-up of charge at sensitive Si-SiO₂ interfaces and may cause device or circuit failure. TID damage is due to an accumulation of radiation particle strikes seen in extreme environments, such as space.

Thesis (Ph.D.)--University of Delaware, 2007. / Principal faculty advisor: James Kolodzey, Dept. of Electrical and Computer Engineering. Includes bibliographical references.

Thesis (Ph. D.)--Ohio State University, 2005. / Title from first page of PDF file. Includes bibliographical references (p. 197-212).

<p> Substantial development of silicon-based technology is required to continue to improve product reliability and production yield of silicon-based IC devices. Defects play a key role in process technology and research is required into their properties and interactions with host and impurity atoms. Cavities formed by ion implantation of helium into a silicon substrate are known to be efficient gettering sites for mobile interstitials and metallic impurities. In addition, the existence of a buried void layer drastically reduces the unintentional parasitic transistor gain in power devices by introducing mid-gap energy levels in the substrate. Utilizing slow positron annihilation spectroscopy (PAS), void formation by implanted He+ at a dose of lxl016/cm2 and energy of 60 keV subsequently subjected to various annealing conditions, i.e. different temperatures, times, ramp rate and ambients, is reported. Quantitative measurement of cavity sizes shows that the annealing temperature largely influences helium out-diffusion from the implanted region. Consequently, different void evolution processes associated with specific annealing temperatures are found. Furthermore, larger voids are formed in oxygen ambient leading us to suggest that the supersaturation of interstitials enhances bubble migration and coalescence during the stage when a large fraction of He atoms remains in the cavities. </p> <p> In recent years, SiGe pseudomorphic alloys have become attractive for heterostructure devices due to their higher mobility, lower noise and lower power consumption, as compared with traditional Si devices. More importantly, SiGe is highly compatible with Si processing technologies. With the continuous improvement of SiGe technology, it has been coupled with complementary metal oxide semiconductor (CMOS) technology and has the potential to replace III-V compound semiconductor devices in the near future. However, many unknowns remain in this material system. The study of point defect injection during various thermal treatments is important in itself, and would also allow additional tools for the study of dopant diffusion in the material under different conditions. With preexistent voids in the buried substrate, we performed furnace wet oxidation on a Si0.98Geo.08 sample at 900 °C for half an hour. A small shrinkage of the voids, as compared to complete annihilation in the case of inert annealing, signifies vacancy injection during the oxidation process. Possible defect generation mechanisms and difference in growth rate enhancement in dry and wet oxidation are discussed. Based on a literature review of Si and SiGe oxidation, we suggest that stress relaxation and the Si replacement mechanism are responsible for the catalytic effect of the oxide growth and the change of point defect generation. </p> / Thesis / Master of Applied Science (MASc)

Silicon Germanium (Si1-xGex) is an alloy semiconductor that has caught considerable attention of the semiconductor industry in the past decade. Effects of strain in thin films are the reason for this. Strain leads to considerable deformation of bands providing enhanced mobility for both electrons and holes. Another important aspect of SiGe is the reduction of band gap. This makes band gap engineering feasible in all silicon technology. Yet another attractive point is the adaptability and compatibility of SiGe to silicon process technology.In CMOS circuits the p-channel MOSFET needs more than double the area of the n-channel MOSFET due to the lower mobility of holes in silicon. Hence a p-channel hetero MOSFET (HMOSFET) is chosen as the object of this dissertation.A simple general device structure that can provide considerable enhancement in performance, compared to a conventional MOSFET, is selected. A one dimensional Poisson equation is solved for this hetero junction device. Using these results an Excel spreadsheet is used as a tool to design a complete analytical program that can provide internal as well as terminal parameters of this device. The analytical program is tested by comparing the results with ISE-TCAD numerical device simulator results. The results were found to match very well. This analytical program yields results in a fraction of the time compared to numerical programs. For the device of choice variable parameters are identified. It is found that these parameters are interconnected in many ways and trade offs between them need to be applied.From the front end of the spreadsheet input parameters can be varied and parameters like potentials, hole density and terminal characteristics can be plotted very easily while simultaneously computing other parameters like threshold voltage and saturation current.The main contribution of this dissertation research is(1) Development of a very efficient and accurate analytical program to interactively design and optimize a p-channel HMOSFET(2) A detailed understanding and explanation of various design parameters, their implications, interdependency and trade offs(3) Study and explanation of certain special characteristics ofp-HMOSFET like dual threshold voltage, low off-currents, structural limitations etc.

Thesis (Ph. D.)--Dept. of Chemistry and School of Computing and Engineering. University of Missouri--Kansas City, 2005. / "A dissertation in chemistry and computer networking." Advisor: James R. Durig. Typescript. Vita. Description based on contents viewed Nov. 21, 2007; title from "catalog record" of the print edition. Includes bibliographical references (leaves 415-424). Online version of the print edition.

The objective of the proposed research is to create new reconfigurable RF and millimeter-wave circuit topologies that enable significant systems benefits. The market of RF systems has long evolved under a paradigm where once a system is built, performance cannot be changed. Companies have recognized that building flexibility into RF systems and providing mechanisms to reconfigure the RF performance can enable significant benefits, including: the ability support multiple modulation schemes and standards, the reduction of product size and overdesign, the ability to adapt to environmental conditions, the improvement in spectrum utilization, and the ability to calibrate, characterize, and monitor system performance. This work demonstrates X-band LNA designs with the ability to change the frequency of operation, improve linearity, and digitally control the tradeoff between performance and power dissipation. At W-band frequencies, a novel device configuration is developed, which significantly improves state-of-the-art silicon-based switch performance. The excellent switch performance is leveraged to address major issues in current millimeter-wave systems. A front-end built-in-self-test switch topology is developed to facilitate the characterization of millimeter-wave transceivers without expensive millimeter-wave equipment. A highly integrated Dicke radiometer is also created to enable sensitive measurements of thermal noise.

A novel transit time based analytical broadband noise model is developed and implemented for high frequency bipolar transistors. This model is applied to a complementary (npn + pnp) silicon germanium (SiGe) heterojunction bipolar transistors (HBT). A complete set of analytical equations are derived using this transit time noise model, to express the four fundamental noise parameters in terms of device parameters. A comprehensive analysis on the ac, dc and broadband noise performance of a 200 GHz SiGe HBT technology, under cryogenic temperatures, is presented. The transit time based noise model is used to analyze the RF noise behavior of the SiGe HBT down to 85 K. Significant performance gain is demonstrated in cryogenic temperatures indicating the suitability of SiGe HBT for extreme environment electronics. A sub-circuit based substrate parasitic modeling methodology, in silicon based processes, is presented. A test case low noise amplifier, operating in the 5 GHz band, is designed in a SiGe HBT process and is used to demonstrate the validity of the design methodology. A dual-band, dual-mode transceiver front end for IEEE802.11a/b/g WLAN applications, is designed in a 0.8 and #956;m SiGe HBT process. The transceiver uses a new architecture which uses an on-chip frequency doubler and a single off-chip frequency synthesizer for both the 2.4 and 5 GHz bands. The performance of the transceiver meets the specification of the IEEE802.11a/b/g standards. The work described in the dissertation significantly advances the state-of-the-art in bipolar broadband noise modeling and RF, microwave circuit design using silicon based processes. The contributions and implications of this work for future research are discussed.