Heteroepitaxial SiGe(C) layers have attracted immense attention as a material for performance boost in state of the art electronic devices during recent years. Alloying silicon with germanium and carbon add exclusive opportunities for strain and bandgap engineering. This work presents details of epitaxial growth using chemical vapor deposition (CVD), material characterization and integration of SiGeC layers in MOS devices. Non-selective and selective epitaxial growth of Si1-x-yGexCy (0≤x≤0.30, 0≤y≤0.02) layers have been performed and optimized aimed for various metal oxide semiconductor field effect transistor (MOSFET) applications. A comprehensive experimental study was performed to investigate the growth of SiGeC layers. The incorporation of C into the SiGe matrix was shown to be strongly sensitive to the growth parameters. As a consequence, a much smaller epitaxial process window compared to SiGe epitaxy was obtained. Incorporation of high boron concentrations (up to 1×1021 atoms/cm3) in SiGe layers aimed for recessed and/or elevated source/drain (S/D) junctions in pMOSFETs was also studied. HCl was used as Si etchant in the CVD reactor to create the recesses which was followed (in a single run) by selective epitaxy of B-doped SiGe. The issue of pattern dependency behavior of selective epitaxial growth was studied in detail. It was shown that a complete removal of pattern dependency in selective SiGe growth using reduced pressure CVD is not likely. However, it was shown that the pattern dependency can be predicted since it is highly dependent on the local Si coverage of the substrate. The pattern dependency was most sensitive for Si coverage in the range 1-10%. In this range drastic changes in growth rate and composition was observed. The pattern dependency was explained by gas depletion inside the low velocity boundary layer. Ni silicide is commonly used to reduce access resistance in S/D and gate areas of MOSFET devices. Therefore, the effect of carbon and germanium on the formation of NiSiGe(C) was studied. An improved thermal stability of Ni silicide was obtained when C is present in the SiGe layer. Integration of SiGe(C) layers in various MOSFET devices was performed. In order to perform a relevant device research the dimensions of the investigated devices have to be in-line with the current technology nodes. A robust spacer gate technology was developed which enabled stable processing of transistors with gate lengths down to 45 nm. SiGe(C) channels in ultra thin body (UTB) silicon on insulator (SOI) MOSFETs, with excellent performance down to 100 nm gate length was demonstrated. The integration of C in the channel of a MOSFET is interesting for future generations of ultra scaled devices where issues such as short channel effects (SCE), temperature budget, dopant diffusion and mobility will be extremely critical. A clear performance enhancement was obtained for both SiGe and SiGeC channels, which point out the potential of SiGe or SiGeC materials for UTB SOI devices. Biaxially strained-Si (sSi) on SiGe virtual substrates (VS) as mobility boosters in nMOSFETs with gate length down to 80 nm was demonstrated. This concept was thoroughly investigated in terms of performance and leakage of the devices. In-situ doping of the relaxed SiGe was shown to be superior over implantation to suppress the junction leakage. A high channel doping could effectively suppress the source to drain leakage. / <p>QC 20100715</p>

<p>Heteroepitaxial SiGeC layers have attracted immenseattention as a material for high frequency devices duringrecent years. The unique properties of integrating carbon inSiGe are the additional freedom for strain and bandgapengineering as well as allowing more aggressive device designdue to the potential for increased thermal budget duringprocessing. This work presents different issues on epitaxialgrowth, defect density, dopant incorporation and electricalproperties of SiGeC epitaxial layers, intended for variousdevice applications.</p><p>Non-selective and selective epitaxial growth of Si_1-x-yGe_xC_y(0≤x≤30, ≤y≤0.02) layershave been optimized by using high-resolution x-ray reciprocallattice mapping. The incorporation of carbon into the SiGematrix was shown to be strongly sensitive to the growthparameters. As a consequence, a much smaller epitaxial processwindow compared to SiGe epitaxy was obtained. Differentsolutions to decrease the substrate pattern dependency (loadingeffect) of SiGeC growth have also been proposed. The key pointin these methods is based on reduction of surface migration ofthe adsorbed species on the oxide. In non-selective epitaxy,this was achieved by introducing a thin silicon polycrystallineseed layer on the oxide. The thickness of this seed layer had acrucial role on both the global and local loading effect, andon the epitaxial quality. Meanwhile, in selective epitaxy,polycrystalline stripes introduced around the oxide openingsact as migration barriers and reduce the loading effecteffectively. Chemical mechanical polishing (CMP) was performedto remove the polycrystalline stripes on the oxide.</p><p>Incorporation and electrical properties of boron-doped Si_1-x-yGe_xC_ylayers (x=0.23 and 0.28 with y=0 and 0.005) with aboron concentration in the range of 3x10¹⁸-1x10²¹atoms/cm3 have also been investigated. In SiGeClayers, the active boron concentration was obtained from thestrain compensation. It was also found that the boron atomshave a tendency to locate at substitutional sites morepreferentially compared to carbon. These findings led to anestimation of the Hall scattering factor of the SiGeC layers,which showed good agreement with theoretical calculations.</p><p><b>Keywords:</b>Silicon germanium carbon (SiGeC), Epitaxy,Chemical vapor deposition (CVD), Loading effect, Highresolution x-ray diffraction (HRXRD), Hall measurements, Atomicforce microscopy (AFM).</p>

Heterojunction bipolar transistors (HBT) based on SiGeC havebeen investigated. Two high-frequency architectures have beendesigned, fabricated and characterized. Different collectordesigns were applied either by using selective epitaxial growthdoped with phosphorous or by non-selective epitaxial growthdoped with arsenic. Both designs have a non-selectivelydeposited SiGeC base doped with boron and a poly-crystallineemitter doped with phosphorous. Selective epitaxial growth of the collector layer has beendeveloped by using a reduced pressure chemical vapor deposition(RPCVD) technique. The incorporation of phosphorous and defectformation during selective deposition of these layers has beenstudied. A major problem of phosphorous-doping during selectiveepitaxy is segregation. Different methods, e.g. chemical orthermal oxidation, are shown to efficiently remove thesegregated dopants. Chemical-mechanical polishing (CMP) hasalso been used as an alternative to solve this problem. The CMPstep was successfully integrated in the HBT process flow. Epitaxial growth of Si1-x-yGexCy layers for base layerapplications in bipolar transistors has been investigated indetail. The optimization of the growth parameters has beenperformed in order to incorporate carbon substitutionally inthe SiGe matrix without increasing the defect density in theepitaxial layers. The thermal stability of npn SiGe-based heterojunctionstructures has been investigated. The influence of thediffusion of dopants in SiGe or in adjacent layers on thethermal stability of the structure has also been discussed. SiGeC-based transistors with both non-selectively depositedcollector and selectively grown collector have been fabricatedand electrically characterized. The fabricated transistorsexhibit electrostatic current gain values in the range of 1000-2000. The cut-off frequency and maximum oscillation frequencyvary from 40-80 GHz and 15-30 GHz, respectively, depending onthe lateral design. The leakage current was investigated usinga selectively deposited collector design and possible causesfor leakage has been discussed. Solutions for decreasing thejunction leakage are proposed. <b>Key words:</b>Silicon-Germanium-Carbon (SiGeC),Heterojunction bipolar transistor (HBT), chemical vapordeposition (CVD), selective epitaxy, non-selective epitaxy,collector design, high-frequency measurement, dopantsegregation, thermal stability.

<p>Heterojunction bipolar transistors (HBT) based on SiGeC havebeen investigated. Two high-frequency architectures have beendesigned, fabricated and characterized. Different collectordesigns were applied either by using selective epitaxial growthdoped with phosphorous or by non-selective epitaxial growthdoped with arsenic. Both designs have a non-selectivelydeposited SiGeC base doped with boron and a poly-crystallineemitter doped with phosphorous.</p><p>Selective epitaxial growth of the collector layer has beendeveloped by using a reduced pressure chemical vapor deposition(RPCVD) technique. The incorporation of phosphorous and defectformation during selective deposition of these layers has beenstudied. A major problem of phosphorous-doping during selectiveepitaxy is segregation. Different methods, e.g. chemical orthermal oxidation, are shown to efficiently remove thesegregated dopants. Chemical-mechanical polishing (CMP) hasalso been used as an alternative to solve this problem. The CMPstep was successfully integrated in the HBT process flow.</p><p>Epitaxial growth of Si1-x-yGexCy layers for base layerapplications in bipolar transistors has been investigated indetail. The optimization of the growth parameters has beenperformed in order to incorporate carbon substitutionally inthe SiGe matrix without increasing the defect density in theepitaxial layers.</p><p>The thermal stability of npn SiGe-based heterojunctionstructures has been investigated. The influence of thediffusion of dopants in SiGe or in adjacent layers on thethermal stability of the structure has also been discussed.</p><p>SiGeC-based transistors with both non-selectively depositedcollector and selectively grown collector have been fabricatedand electrically characterized. The fabricated transistorsexhibit electrostatic current gain values in the range of 1000-2000. The cut-off frequency and maximum oscillation frequencyvary from 40-80 GHz and 15-30 GHz, respectively, depending onthe lateral design. The leakage current was investigated usinga selectively deposited collector design and possible causesfor leakage has been discussed. Solutions for decreasing thejunction leakage are proposed.</p><p><b>Key words:</b>Silicon-Germanium-Carbon (SiGeC),Heterojunction bipolar transistor (HBT), chemical vapordeposition (CVD), selective epitaxy, non-selective epitaxy,collector design, high-frequency measurement, dopantsegregation, thermal stability.</p>

Heteroepitaxial SiGeC layers have attracted immenseattention as a material for high frequency devices duringrecent years. The unique properties of integrating carbon inSiGe are the additional freedom for strain and bandgapengineering as well as allowing more aggressive device designdue to the potential for increased thermal budget duringprocessing. This work presents different issues on epitaxialgrowth, defect density, dopant incorporation and electricalproperties of SiGeC epitaxial layers, intended for variousdevice applications. Non-selective and selective epitaxial growth of Si1-x-yGexCy(0≤x≤30, ≤y≤0.02) layershave been optimized by using high-resolution x-ray reciprocallattice mapping. The incorporation of carbon into the SiGematrix was shown to be strongly sensitive to the growthparameters. As a consequence, a much smaller epitaxial processwindow compared to SiGe epitaxy was obtained. Differentsolutions to decrease the substrate pattern dependency (loadingeffect) of SiGeC growth have also been proposed. The key pointin these methods is based on reduction of surface migration ofthe adsorbed species on the oxide. In non-selective epitaxy,this was achieved by introducing a thin silicon polycrystallineseed layer on the oxide. The thickness of this seed layer had acrucial role on both the global and local loading effect, andon the epitaxial quality. Meanwhile, in selective epitaxy,polycrystalline stripes introduced around the oxide openingsact as migration barriers and reduce the loading effecteffectively. Chemical mechanical polishing (CMP) was performedto remove the polycrystalline stripes on the oxide. Incorporation and electrical properties of boron-doped Si1-x-yGexCylayers (x=0.23 and 0.28 with y=0 and 0.005) with aboron concentration in the range of 3x1018-1x1021atoms/cm3 have also been investigated. In SiGeClayers, the active boron concentration was obtained from thestrain compensation. It was also found that the boron atomshave a tendency to locate at substitutional sites morepreferentially compared to carbon. These findings led to anestimation of the Hall scattering factor of the SiGeC layers,which showed good agreement with theoretical calculations. Keywords:Silicon germanium carbon (SiGeC), Epitaxy,Chemical vapor deposition (CVD), Loading effect, Highresolution x-ray diffraction (HRXRD), Hall measurements, Atomicforce microscopy (AFM).

Epitaxially grown SiGe(C) materials have a great importance for many device applications. In these applications, (strained or relaxed) SiGe(C) layers are grown either selectively on the active areas, or on the entire wafer. Epitaxy is a sensitive step in the device processing and choosing an appropriate thermal budget is crucial to avoid the dopant out–diffusion and strain relaxation. Strain is important for bandgap engineering in (SiGe/Si) heterostructures, and to increase the mobility of the carriers. An example for the latter application is implementing SiGe as the biaxially strained channel layer or in recessed source/drain (S/D) of pMOSFETs. For this case, SiGe is grown selectively in recessed S/D regions where the Si channel region experiences uniaxial strain.The main focus of this Ph.D. thesis is on developing the first empirical model for selective epitaxial growth of SiGe using SiH2Cl2, GeH4 and HCl precursors in a reduced pressure chemical vapor deposition (RPCVD) reactor. The model describes the growth kinetics and considers the contribution of each gas precursor in the gas–phase and surface reactions. In this way, the growth rate and Ge content of the SiGe layers grown on the patterned substrates can be calculated. The gas flow and temperature distribution were simulated in the CVD reactor and the results were exerted as input parameters for the diffusion of gas molecules through gas boundaries. Fick‟s law and the Langmuir isotherm theory (in non–equilibrium case) have been applied to estimate the real flow of impinging molecules. For a patterned substrate, the interactions between the chips were calculated using an established interaction theory. Overall, a good agreement between this model and the experimental data has been presented. This work provides, for the first time, a guideline for chip manufacturers who are implementing SiGe layers in the devices.The other focus of this thesis is to implement SiGe layers or dots as a thermistor material to detect infrared radiation. The result provides a fundamental understanding of noise sources and thermal response of SiGe/Si multilayer structures. Temperature coefficient of resistance (TCR) and noise voltage have been measured for different detector prototypes in terms of pixel size and multilayer designs. The performance of such structures was studied and optimized as a function of quantum well and Si barrier thickness (or dot size), number of periods in the SiGe/Si stack, Ge content and contact resistance. Both electrical and thermal responses of such detectors were sensitive to the quality of the epitaxial layers which was evaluated by the interfacial roughness and strain amount. The strain in SiGe material was carefully controlled in the meta–stable region by implementingivcarbon in multi quantum wells (MQWs) of SiGe(C)/Si(C). A state of the art thermistor material with TCR of 4.5 %/K for 100×100 μm2 pixel area and low noise constant (K1/f) value of 4.4×10-15 is presented. The outstanding performance of these devices is due to Ni silicide contacts, smooth interfaces, and high quality of multi quantum wells (MQWs) containing high Ge content.The novel idea of generating local strain using Ge multi quantum dots structures has also been studied. Ge dots were deposited at different growth temperatures in order to tune the intermixing of Si into Ge. The structures demonstrated a noise constant of 2×10-9 and TCR of 3.44%/K for pixel area of 70×70 μm2. These structures displayed an improvement in the TCR value compared to quantum well structures; however, strain relaxation and unevenness of the multi layer structures caused low signal–to–noise ratio. In this thesis, the physical importance of different design parameters of IR detectors has been quantified by using a statistical analysis. The factorial method has been applied to evaluate design parameters for IR detection improvements. Among design parameters, increasing the Ge content of SiGe quantum wells has the most significant effect on the measured TCR value. / QC 20110405