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This thesis deals with the main aspects in chemical vapordeposition (CVD) of silicon (Si) and silicon-germanium (Si1-xGex) films for high-speed bipolar transistors.In situdoping of polycrystalline silicon (poly-Si)using phosphine (PH3) and disilane (Si2H6) in a low-pressure CVD reactor was investigated toestablish a poly-Si emitter fabrication process. The growthkinetics and P incorporation was studied for amorphous Si filmgrowth. Hydrogen (H) incorporated in the as-deposited films wasrelated to growth kinetics and the energy for H2desorption was extracted. Film properties such asresistivity, mobility, carrier concentration and grain growthwere studied after crystallization using either furnaceannealing or rapid thermal annealing (RTA). In order tointegrate an epitaxial base, non-selective epitaxial growth(NSEG) of Si and SiGe in a lamp-heated single-waferreduced-pressure CVD reactor was examined. The growth kineticsfor Si epitaxy and poly-Si deposition showed a differentdependence on the deposition conditions i.e. temperature andpressure. The growth rate difference was mainly due to growthkinetics rather than wafer surface emissivity effects. However,it was observed that the growth rate for Si epitaxy and poly-Sideposition was varying during growth and the time-dependencewas attributed to wafer surface emissivity variations. A modelto describe the emissivity effects was established, taking intoconsideration kinetics and the reactor heating mechanisms suchas heat absorption, emission andconduction. Growth ratevariations in opening of different sizes (local loading) andfor different oxide surface coverage (global loading) wereinvestigated. No local loading effects were observed, whileglobal loading effects were attributed to chemical as well astemperature effects. Finally, misfit dislocations formed in theSiGe epitaxy during NSEG were found to originate from theinterface between the epitaxial and polycrystalline regions.The dislocations tended to propagate across the activearea. <b>Keywords:</b>chemical vapor deposition (CVD), bipolarjunction transistor (BJT), heterojunction bipolar transistor(HBT), silicon-germanium (SiGe), epitaxy, poly-Si emitter,in situdoping, non-selective epitaxy (NSEG), loadingeffect, emissivity effect

Heterojunction bipolar transistors (HBT) based on SiGeC havebeen investigated. Two high-frequency architectures have beendesigned, fabricated and characterized. Different collectordesigns were applied either by using selective epitaxial growthdoped with phosphorous or by non-selective epitaxial growthdoped with arsenic. Both designs have a non-selectivelydeposited SiGeC base doped with boron and a poly-crystallineemitter doped with phosphorous. Selective epitaxial growth of the collector layer has beendeveloped by using a reduced pressure chemical vapor deposition(RPCVD) technique. The incorporation of phosphorous and defectformation during selective deposition of these layers has beenstudied. A major problem of phosphorous-doping during selectiveepitaxy is segregation. Different methods, e.g. chemical orthermal oxidation, are shown to efficiently remove thesegregated dopants. Chemical-mechanical polishing (CMP) hasalso been used as an alternative to solve this problem. The CMPstep was successfully integrated in the HBT process flow. Epitaxial growth of Si1-x-yGexCy layers for base layerapplications in bipolar transistors has been investigated indetail. The optimization of the growth parameters has beenperformed in order to incorporate carbon substitutionally inthe SiGe matrix without increasing the defect density in theepitaxial layers. The thermal stability of npn SiGe-based heterojunctionstructures has been investigated. The influence of thediffusion of dopants in SiGe or in adjacent layers on thethermal stability of the structure has also been discussed. SiGeC-based transistors with both non-selectively depositedcollector and selectively grown collector have been fabricatedand electrically characterized. The fabricated transistorsexhibit electrostatic current gain values in the range of 1000-2000. The cut-off frequency and maximum oscillation frequencyvary from 40-80 GHz and 15-30 GHz, respectively, depending onthe lateral design. The leakage current was investigated usinga selectively deposited collector design and possible causesfor leakage has been discussed. Solutions for decreasing thejunction leakage are proposed. <b>Key words:</b>Silicon-Germanium-Carbon (SiGeC),Heterojunction bipolar transistor (HBT), chemical vapordeposition (CVD), selective epitaxy, non-selective epitaxy,collector design, high-frequency measurement, dopantsegregation, thermal stability.

No description available.

<p>This thesis deals with the main aspects in chemical vapordeposition (CVD) of silicon (Si) and silicon-germanium (Si_1-xGe_x) films for high-speed bipolar transistors.<i>In situ</i>doping of polycrystalline silicon (poly-Si)using phosphine (PH₃) and disilane (Si₂H₆) in a low-pressure CVD reactor was investigated toestablish a poly-Si emitter fabrication process. The growthkinetics and P incorporation was studied for amorphous Si filmgrowth. Hydrogen (H) incorporated in the as-deposited films wasrelated to growth kinetics and the energy for H₂desorption was extracted. Film properties such asresistivity, mobility, carrier concentration and grain growthwere studied after crystallization using either furnaceannealing or rapid thermal annealing (RTA). In order tointegrate an epitaxial base, non-selective epitaxial growth(NSEG) of Si and SiGe in a lamp-heated single-waferreduced-pressure CVD reactor was examined. The growth kineticsfor Si epitaxy and poly-Si deposition showed a differentdependence on the deposition conditions i.e. temperature andpressure. The growth rate difference was mainly due to growthkinetics rather than wafer surface emissivity effects. However,it was observed that the growth rate for Si epitaxy and poly-Sideposition was varying during growth and the time-dependencewas attributed to wafer surface emissivity variations. A modelto describe the emissivity effects was established, taking intoconsideration kinetics and the reactor heating mechanisms suchas heat absorption, emission andconduction. Growth ratevariations in opening of different sizes (local loading) andfor different oxide surface coverage (global loading) wereinvestigated. No local loading effects were observed, whileglobal loading effects were attributed to chemical as well astemperature effects. Finally, misfit dislocations formed in theSiGe epitaxy during NSEG were found to originate from theinterface between the epitaxial and polycrystalline regions.The dislocations tended to propagate across the activearea.</p><p><b>Keywords:</b>chemical vapor deposition (CVD), bipolarjunction transistor (BJT), heterojunction bipolar transistor(HBT), silicon-germanium (SiGe), epitaxy, poly-Si emitter,<i>in situ</i>doping, non-selective epitaxy (NSEG), loadingeffect, emissivity effect</p>

<p>Heterojunction bipolar transistors (HBT) based on SiGeC havebeen investigated. Two high-frequency architectures have beendesigned, fabricated and characterized. Different collectordesigns were applied either by using selective epitaxial growthdoped with phosphorous or by non-selective epitaxial growthdoped with arsenic. Both designs have a non-selectivelydeposited SiGeC base doped with boron and a poly-crystallineemitter doped with phosphorous.</p><p>Selective epitaxial growth of the collector layer has beendeveloped by using a reduced pressure chemical vapor deposition(RPCVD) technique. The incorporation of phosphorous and defectformation during selective deposition of these layers has beenstudied. A major problem of phosphorous-doping during selectiveepitaxy is segregation. Different methods, e.g. chemical orthermal oxidation, are shown to efficiently remove thesegregated dopants. Chemical-mechanical polishing (CMP) hasalso been used as an alternative to solve this problem. The CMPstep was successfully integrated in the HBT process flow.</p><p>Epitaxial growth of Si1-x-yGexCy layers for base layerapplications in bipolar transistors has been investigated indetail. The optimization of the growth parameters has beenperformed in order to incorporate carbon substitutionally inthe SiGe matrix without increasing the defect density in theepitaxial layers.</p><p>The thermal stability of npn SiGe-based heterojunctionstructures has been investigated. The influence of thediffusion of dopants in SiGe or in adjacent layers on thethermal stability of the structure has also been discussed.</p><p>SiGeC-based transistors with both non-selectively depositedcollector and selectively grown collector have been fabricatedand electrically characterized. The fabricated transistorsexhibit electrostatic current gain values in the range of 1000-2000. The cut-off frequency and maximum oscillation frequencyvary from 40-80 GHz and 15-30 GHz, respectively, depending onthe lateral design. The leakage current was investigated usinga selectively deposited collector design and possible causesfor leakage has been discussed. Solutions for decreasing thejunction leakage are proposed.</p><p><b>Key words:</b>Silicon-Germanium-Carbon (SiGeC),Heterojunction bipolar transistor (HBT), chemical vapordeposition (CVD), selective epitaxy, non-selective epitaxy,collector design, high-frequency measurement, dopantsegregation, thermal stability.</p>

Although the majority of wireless receiver subsystems have moved to digital signal processing over the last decade, the low noise amplifier (LNA) remains a crucial analogue subsystem in any design being the dominant subsystem in determining the noise figure (NF) and dynamic range of the receiver as a whole. In this research a novel LNA configuration, namely the LC-ladder and capacitive shunt-shunt feedback topology, was proposed for use in the implementation of very wideband LNAs. This was done after a thorough theoretical investigation of LNA configurations available in the body of knowledge from which it became apparent that for the most part narrowband LNA configurations are applied to wideband applications with suboptimal results, and also that the wideband configurations that exist have certain shortcomings. A mathematical model was derived to describe the new configuration and consists of equations for the input impedance, input return loss, gain and NF, as well as an approximation of the worst case IIP3. Compact design equations were also derived from this model and a design strategy was given which allows for electronic design automation of a LNA using this configuration. A process for simultaneously optimizing the circuit for minimum NF and maximum gain was deduced from this model and different means of improving the linearity of the LNA were given. This proposed design process was used successfully throughout this research. The accuracy of the mathematical model has been verified using simulations. Two versions of the LNA were also fabricated and the measured results compared well with these simulations. The good correlation found between the calculated, simulated and measured results prove the accuracy of the model, and some comments on how the accuracy of the model could be improved even further are provided as well. The simulated results of a LNA designed for the 1 GHz to 18 GHz band in the IBM 8HP process show a gain of 21.4 dB and a minimum NF of only 1.7 dB, increasing to 3.3 dB at the upper corner frequency while maintaining an input return loss below -10 dB. After steps were taken to improve the linearity, the IIP3 of the LNA is -14.5 dBm with only a small degradation in NF now 2.15 dB at the minimum. The power consumption of the respective LNAs are 12.75 mW and 23.25 mW and each LNA occupies a chip area of only 0.43 mm2. Measured results of the LNA fabricated in the IBM 7WL process had a gain of 10 dB compared to an expected simulated gain of 20 dB, however significant path loss was introduced by the IC package and PCB parasitics. The S11 tracked the simulated response very well and remained below -10 dB over the feasible frequency range. Reliable noise figure measurements could not be obtained. The measured P1dB compression point is -22 dBm. A 60 GHz LNA was also designed using this topology in a SiGe process with ƒT of 200 GHz. A simulated NF of 5.2 dB was achieved for a gain of 14.2 dB and an input return loss below -15 dB using three amplifier stages. The IIP3 of the LNA is -8.4 dBm and the power consumption 25.5 mW. Although these are acceptable results in the mm-wave range it was however found that the wideband nature of this configuration is redundant in the unlicensed 60 GHz band and results are often inconsistent with the design theory due to second order effects. The wideband results however prove that the LC-ladder and capacitive shunt-shunt feedback topology is a viable means for especially implementing LNAs that require a very wide operating frequency range and also very low NF over that range. / Thesis (PhD(Eng))--University of Pretoria, 2011. / Electrical, Electronic and Computer Engineering / unrestricted

SiGe is a significant enabling technology for therealization of integrated circuits used in high performanceoptical networks and radio frequency applications. In order tocontinue to fulfill the demands for these applications, newmaterials and device structures are needed. This thesis focuseson new materials and their integration into heterojunctionbipolar transistor (HBT) structures as well as using devicesimulations to optimize and better understand the deviceoperation. Specifically, a SiGeC HBT platform was designed,fabricated, and electrically characterized. The platformfeatures a non-selectively grown epitaxial SiGeC base,in situdoped polysilicon emitter, nickel silicide,LOCOS isolation, and a minimum emitter width of 0.4 μm.Alternately, a selective epitaxy growth in an oxide window wasused to form the collector and isolation regions. Thetransistors exhibited cutoff frequency (fT) and maximum frequency of oscillation (fMAX) of 40-80 GHz and 15-45 GHz, respectively.Lateral design rules allowed the investigation of behavior suchas transient enhanced diffusion, leakage current, and theinfluence of parasitics such as base resistance and CBC. The formation of nickel silicide on polysiliconSiGe and SiGeC films was also investigated. The formation ofthe low resistivity monosilicide phase was shown to occur athigher temperatures on SiGeC than on SiGe. The stability of themonosilicide was also shown to improve for SiGeC. Nickelsilicide was then integrated into a SiGeC HBT featuring aselectively grown collector. A novel, fully silicided extrinsicbase contact was demonstrated along with the simultaneousformation of NiSi on thein situdoped polysilicon emitter. High-resolution x-ray diffraction (HRXRD) was used toinvestigate the growth and stability of SiGeC base layers forHBT integration. HRXRD proved to be an effective, fast,non-destructive tool for monitoring carbon out-diffusion due tothe dopant activation anneal for different temperatures as wellas for inline process monitoring of epitaxial growth of SiGeClayers. The stability of the SiGe layer with 0.2-0.4 at% carbonwhen subjected to dopant activation anneals ranging from1020-1100&amp;#176C was analyzed by reciprocal lattice mapping.It was found that as the substitutional carbon increases theformation of boron clusters due to diffusion is suppressed, buta higher density of carbon clusters is formed. Device simulations were performed to optimize the DC and HFperformance of an advanced SiGeC HBT structure with low baseresistance and small dimension emitter widths. The selectivelyimplanted collector (SIC) was studied using a design ofexperiments (DOE) method. For small dimensions the lateralimplantation straggle has a significant influence on the SICprofile (width). A significant influence of the SIC width onthe DC gain was observed. The optimized structure showedbalanced fT/fMAXvalues of 200+ GHz. Finally, SOI BJT transistorswith deep trench isolation were fabricated in a 0.25μmBiCMOS process and self-heating effects were characterized andcompared to transistors on bulk silicon featuring deep trenchand shallow trench isolation. Device simulations based on SEMcross-sections and SIMS data were performed and the resultscompared to the fabricated transistors. Key words:Silicon-Germanium(SiGe), SiGeC,heterojunction bipolar transistor(HBT), nickel silicide,selectively implanted collector(SIC), device simulation, SiGeClayer stability, high resolution x-ray diffraction(HRXRD),silicon-on-insulator(SOI), self-heating.

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No description available.