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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Investigation and development of advanced Si/SiGe and Si/SiGeC Heterojunction Bipolar Transistors by means of Technology Modeling / Recherche et développement de transistors bipolaires avancés par le biais de la modélisation technologique

Quiroga, Andrés 14 November 2013 (has links)
Le travail porte sur le développement et l’optimisation de transistors bipolaires à hétérojonction (TBH) SiGe et SiGeC par conception technologique assistée par ordinateur (TCAD). L'objectif est d'aboutir à un dispositif performant réalisable technologiquement, en tenant compte de tous les paramètres : étapes de fabrication technologiques, topologie du transistor, modèles physiques. Les études menées permettent d’atteindre les meilleures performances, en particulier une amélioration importante de la fréquence maximale d’oscillation (fMAX). Ce travail est la première approche développée pour la simulation des TBH SiGeC qui prend en compte l'impact de la contrainte et de la teneur en germanium et en carbone dans la base; conjointement pour les simulations des procédés de fabrication et les simulations électriques.Pour ce travail, nous avons développé et implémenté dans le simulateur TCAD des méthodes d'extraction de fMAX prenant en compte les éléments parasites intrinsèques et extrinsèques. Nous avons développé et implémenté un modèle pour la densité effective d’états fonction de la teneur en germanium et en carbone dans la base. Les modèles pour la bande interdite, la mobilité et le temps de relaxation de l'énergie sont calibrés sur la base de simulations Monte-Carlo.Les différentes analyses présentées dans cette thèse portent sur six variantes technologiques de TBH. Trois nouvelles architectures de TBH SiGeC avancés ont été élaborées et proposées pour des besoins basse et haute performance. Grace aux résultats obtenus, le meilleur compromis entre les différents paramètres technologiques et dimensionnels permettent de fabriquer un TBH SiGeC avec une valeur de fMAX de 500 GHz, réalisant ainsi l’objectif principal de la thèse. / The present work investigates the technology development of state-of-the-art SiGe and SiGeC Heterojunction Bipolar Transistors (HBT) by means of technology computer aided design (TCAD). The objective of this work is to obtain an advanced HBT very close to the real device not only in its process fabrication steps, but also in its physical behavior, geometric architecture, and electrical results. This investigation may lead to achieve the best electrical performances for the devices studied, in particular a maximum operating frequency of 500 GHz. The results of this work should help to obtain more physical and realistic simulations, a better understanding of charge transport, and to facilitate the development and optimization of SiGe and SiGeC HBT devices.The TCAD simulation kits for SiGe/SiGeC HBTs developed during our work have been carried out in the framework of the STMicroelectronics bipolar technology evolution. In order to achieve accurate simulations we have used, developed, calibrated and implemented adequate process models, physical models and extraction methodologies. To our knowledge, this work is the first approach developed for SiGe/SiGeC HBTs which takes into account the impact of the strain, and of the germanium and carbon content in the base, for both: process and electrical simulations.In this work we will work with the successive evolutions of B3T, B4T and B5T technologies. For each new device fMAX improves of 100 GHz, thus the technology B3T matches to 300 GHz, B4T and B5T to 400 and 500 GHz, respectively.Chapter one introduces the SiGe SiGeC heterojunction bipolar technologies and their operating principles. This chapter deals also with the high frequency AC transistor operation, the extraction methods for fMAX and the carrier transport in extremely scaled HBTs.Chapter two analyzes the physical models adapted to SiGeC strained alloys used in this work and the electrical simulation of HBT devices. This is also an important work of synthesis leading to the selection, implementation and development of dedicated models for SiGeC HBT simulation.Chapter three describes the B3T TCAD simulation platform developed to obtain an advanced HBT very close to the real device. In this chapter the process fabrication of the B3T technology is described together with the methodology developed to simulate advanced HBT SiGeC devices by means of realistic TCAD simulations.Chapter four describes the HBT architectures developed during this work. We will propose low-cost structures with less demanding performance requirements and highly performing structures but with a higher cost of production. The B4T architecture which has been manufactured in clean-room is deeply studied in this chapter. The impact of the main fabrication steps is analyzed in order to find the keys process parameters to increase fMAX without degrading other important electrical characteristics. At the end of this chapter the results obtained is used to elaborate a TCAD simulation platform taking into account the best trade-off of the different key process parameters to obtain a SiGeC HBT working at 500 GHz of fMAX.
2

SiGeC Near Infrared Photodetectors

Li, Baojun, Chua, Soo-Jin, Fitzgerald, Eugene A., Leitz, Christopher W., Miao, Lingyun 01 1900 (has links)
A near infrared waveguide photodetector in Si-based ternary Si₁−x−yGexCy alloy was demonstrated for 0.85~1.06 µm wavelength fiber-optic interconnection system applications. Two sets of detectors with active absorption layer compositions of Si₀.₇₉Ge₀.₂C₀.₀₁ and Si₀.₇₀Ge₀.₂₈C₀.₀₂ were designed. The active absorption layer has a thickness of 120~450 nm. The external quantum efficiency can reach ~3% with a cut-off wavelength of around 1.2 µm. / Singapore-MIT Alliance (SMA)
3

Device design and process integration for SiGeC and Si/SOI bipolar transistors

Haralson, Erik January 2004 (has links)
SiGe is a significant enabling technology for therealization of integrated circuits used in high performanceoptical networks and radio frequency applications. In order tocontinue to fulfill the demands for these applications, newmaterials and device structures are needed. This thesis focuseson new materials and their integration into heterojunctionbipolar transistor (HBT) structures as well as using devicesimulations to optimize and better understand the deviceoperation. Specifically, a SiGeC HBT platform was designed,fabricated, and electrically characterized. The platformfeatures a non-selectively grown epitaxial SiGeC base,in situdoped polysilicon emitter, nickel silicide,LOCOS isolation, and a minimum emitter width of 0.4 μm.Alternately, a selective epitaxy growth in an oxide window wasused to form the collector and isolation regions. Thetransistors exhibited cutoff frequency (fT) and maximum frequency of oscillation (fMAX) of 40-80 GHz and 15-45 GHz, respectively.Lateral design rules allowed the investigation of behavior suchas transient enhanced diffusion, leakage current, and theinfluence of parasitics such as base resistance and CBC. The formation of nickel silicide on polysiliconSiGe and SiGeC films was also investigated. The formation ofthe low resistivity monosilicide phase was shown to occur athigher temperatures on SiGeC than on SiGe. The stability of themonosilicide was also shown to improve for SiGeC. Nickelsilicide was then integrated into a SiGeC HBT featuring aselectively grown collector. A novel, fully silicided extrinsicbase contact was demonstrated along with the simultaneousformation of NiSi on thein situdoped polysilicon emitter. High-resolution x-ray diffraction (HRXRD) was used toinvestigate the growth and stability of SiGeC base layers forHBT integration. HRXRD proved to be an effective, fast,non-destructive tool for monitoring carbon out-diffusion due tothe dopant activation anneal for different temperatures as wellas for inline process monitoring of epitaxial growth of SiGeClayers. The stability of the SiGe layer with 0.2-0.4 at% carbonwhen subjected to dopant activation anneals ranging from1020-1100&#176C was analyzed by reciprocal lattice mapping.It was found that as the substitutional carbon increases theformation of boron clusters due to diffusion is suppressed, buta higher density of carbon clusters is formed. Device simulations were performed to optimize the DC and HFperformance of an advanced SiGeC HBT structure with low baseresistance and small dimension emitter widths. The selectivelyimplanted collector (SIC) was studied using a design ofexperiments (DOE) method. For small dimensions the lateralimplantation straggle has a significant influence on the SICprofile (width). A significant influence of the SIC width onthe DC gain was observed. The optimized structure showedbalanced fT/fMAXvalues of 200+ GHz. Finally, SOI BJT transistorswith deep trench isolation were fabricated in a 0.25μmBiCMOS process and self-heating effects were characterized andcompared to transistors on bulk silicon featuring deep trenchand shallow trench isolation. Device simulations based on SEMcross-sections and SIMS data were performed and the resultscompared to the fabricated transistors. Key words:Silicon-Germanium(SiGe), SiGeC,heterojunction bipolar transistor(HBT), nickel silicide,selectively implanted collector(SIC), device simulation, SiGeClayer stability, high resolution x-ray diffraction(HRXRD),silicon-on-insulator(SOI), self-heating.
4

Device design and process integration for SiGeC and Si/SOI bipolar transistors

Haralson, Erik January 2004 (has links)
<p>SiGe is a significant enabling technology for therealization of integrated circuits used in high performanceoptical networks and radio frequency applications. In order tocontinue to fulfill the demands for these applications, newmaterials and device structures are needed. This thesis focuseson new materials and their integration into heterojunctionbipolar transistor (HBT) structures as well as using devicesimulations to optimize and better understand the deviceoperation. Specifically, a SiGeC HBT platform was designed,fabricated, and electrically characterized. The platformfeatures a non-selectively grown epitaxial SiGeC base,<i>in situ</i>doped polysilicon emitter, nickel silicide,LOCOS isolation, and a minimum emitter width of 0.4 μm.Alternately, a selective epitaxy growth in an oxide window wasused to form the collector and isolation regions. Thetransistors exhibited cutoff frequency (f<sub>T</sub>) and maximum frequency of oscillation (f<sub>MAX</sub>) of 40-80 GHz and 15-45 GHz, respectively.Lateral design rules allowed the investigation of behavior suchas transient enhanced diffusion, leakage current, and theinfluence of parasitics such as base resistance and C<sub>BC</sub>. The formation of nickel silicide on polysiliconSiGe and SiGeC films was also investigated. The formation ofthe low resistivity monosilicide phase was shown to occur athigher temperatures on SiGeC than on SiGe. The stability of themonosilicide was also shown to improve for SiGeC. Nickelsilicide was then integrated into a SiGeC HBT featuring aselectively grown collector. A novel, fully silicided extrinsicbase contact was demonstrated along with the simultaneousformation of NiSi on the<i>in situ</i>doped polysilicon emitter.</p><p>High-resolution x-ray diffraction (HRXRD) was used toinvestigate the growth and stability of SiGeC base layers forHBT integration. HRXRD proved to be an effective, fast,non-destructive tool for monitoring carbon out-diffusion due tothe dopant activation anneal for different temperatures as wellas for inline process monitoring of epitaxial growth of SiGeClayers. The stability of the SiGe layer with 0.2-0.4 at% carbonwhen subjected to dopant activation anneals ranging from1020-1100&#176C was analyzed by reciprocal lattice mapping.It was found that as the substitutional carbon increases theformation of boron clusters due to diffusion is suppressed, buta higher density of carbon clusters is formed.</p><p>Device simulations were performed to optimize the DC and HFperformance of an advanced SiGeC HBT structure with low baseresistance and small dimension emitter widths. The selectivelyimplanted collector (SIC) was studied using a design ofexperiments (DOE) method. For small dimensions the lateralimplantation straggle has a significant influence on the SICprofile (width). A significant influence of the SIC width onthe DC gain was observed. The optimized structure showedbalanced f<sub>T</sub>/f<sub>MAX</sub>values of 200+ GHz. Finally, SOI BJT transistorswith deep trench isolation were fabricated in a 0.25μmBiCMOS process and self-heating effects were characterized andcompared to transistors on bulk silicon featuring deep trenchand shallow trench isolation. Device simulations based on SEMcross-sections and SIMS data were performed and the resultscompared to the fabricated transistors.</p><p><b>Key words:</b>Silicon-Germanium(SiGe), SiGeC,heterojunction bipolar transistor(HBT), nickel silicide,selectively implanted collector(SIC), device simulation, SiGeClayer stability, high resolution x-ray diffraction(HRXRD),silicon-on-insulator(SOI), self-heating.</p>
5

Contribution à la caractérisation de composants sub-terahertz / Contribution on the characterization of sub THz components

Potéreau, Manuel 24 November 2015 (has links)
La constante amélioration des technologies silicium permet aux transistors bipolaires à hétérojonction (HBT) SiGeC (Silicium-Germanium : Carbone) de concurrencer les composants III-V pour les applications millimétriques et sous-THz (jusqu’à 300GHz). Le cycle de développement de la technologie (caractérisation-modélisation-conception-fabrication) nécessite plusieurs itérations, entraînant des coûts élevés. De plus, les méthodologies de mesure doivent être réévaluées et ajustées pour adresser des fréquences plus élevées. Afin de réduire le nombre d’itérations et de permettre la montée en fréquence de la mesure, un travail de fond sur la première étape, la caractérisation, s’avère indispensable.Pour répondre à cette exigence, une description et une étude des instruments de mesure (VNA) est réalisée dans un premier temps. Un état de l’art des méthodes de calibrage permet de choisir la solution la plus pertinente pour la calibration sur puce valable dans la gamme de fréquences sous-THz. Ensuite, après avoir relevé plusieurs défauts dans la méthode choisie (à savoir la méthode Thru-Reflect-Line : TRL), des solutions sont proposées concernant la modification des calculs des coefficients d’erreur et également en modifiant les standards utilisés durant le calibrage. Finalement, une étude sur les méthodes d’épluchage est réalisée. Une amélioration est proposée par la modification de deux standards évitant le principal problème de l’état de l’art, la surcompensation des composants parasites. / The continuous improvement in Silicon technologies allows SiGeC (Silicon-Germanium-Carbon) heterojunction bipolar transistors (HBT) to compete with III-V components for millimeter wave and sub-THz (below 300GHz) applications. The technology development cycle (characterization, modeling, design and fabrication) needs several iterations resulting in high costs. Furthermore, the measurement methodologies need to be re-assessed and modified to address higher measurement frequencies. In order to reduce the number of iterations and to allow reliable measurement in the sub-THz band, the characterization procedure has been revisited.First, a description and investigation of the measurement instrument (VNA) has been made. After exploring all possible calibration methods, the best candidate for an “on-wafer” calibration for the sub-THz frequency range has been selected. Then, after analyzing the limits of the chosen calibration method (Thru-Reflect-Line: TRL), workarounds are proposed, by modification of the errors coefficients calculation and by changing the standards used during the calibration process. At last, a study concerning the de-embedding methods is carried out. It is shown, that using two new standards helps to reduce the over-compensation of parasitic components.
6

Integration of epitaxial SiGe(C) layers in advanced CMOS devices

Hållstedt, Julius January 2007 (has links)
Heteroepitaxial SiGe(C) layers have attracted immense attention as a material for performance boost in state of the art electronic devices during recent years. Alloying silicon with germanium and carbon add exclusive opportunities for strain and bandgap engineering. This work presents details of epitaxial growth using chemical vapor deposition (CVD), material characterization and integration of SiGeC layers in MOS devices. Non-selective and selective epitaxial growth of Si1-x-yGexCy (0≤x≤0.30, 0≤y≤0.02) layers have been performed and optimized aimed for various metal oxide semiconductor field effect transistor (MOSFET) applications. A comprehensive experimental study was performed to investigate the growth of SiGeC layers. The incorporation of C into the SiGe matrix was shown to be strongly sensitive to the growth parameters. As a consequence, a much smaller epitaxial process window compared to SiGe epitaxy was obtained. Incorporation of high boron concentrations (up to 1×1021 atoms/cm3) in SiGe layers aimed for recessed and/or elevated source/drain (S/D) junctions in pMOSFETs was also studied. HCl was used as Si etchant in the CVD reactor to create the recesses which was followed (in a single run) by selective epitaxy of B-doped SiGe. The issue of pattern dependency behavior of selective epitaxial growth was studied in detail. It was shown that a complete removal of pattern dependency in selective SiGe growth using reduced pressure CVD is not likely. However, it was shown that the pattern dependency can be predicted since it is highly dependent on the local Si coverage of the substrate. The pattern dependency was most sensitive for Si coverage in the range 1-10%. In this range drastic changes in growth rate and composition was observed. The pattern dependency was explained by gas depletion inside the low velocity boundary layer. Ni silicide is commonly used to reduce access resistance in S/D and gate areas of MOSFET devices. Therefore, the effect of carbon and germanium on the formation of NiSiGe(C) was studied. An improved thermal stability of Ni silicide was obtained when C is present in the SiGe layer. Integration of SiGe(C) layers in various MOSFET devices was performed. In order to perform a relevant device research the dimensions of the investigated devices have to be in-line with the current technology nodes. A robust spacer gate technology was developed which enabled stable processing of transistors with gate lengths down to 45 nm. SiGe(C) channels in ultra thin body (UTB) silicon on insulator (SOI) MOSFETs, with excellent performance down to 100 nm gate length was demonstrated. The integration of C in the channel of a MOSFET is interesting for future generations of ultra scaled devices where issues such as short channel effects (SCE), temperature budget, dopant diffusion and mobility will be extremely critical. A clear performance enhancement was obtained for both SiGe and SiGeC channels, which point out the potential of SiGe or SiGeC materials for UTB SOI devices. Biaxially strained-Si (sSi) on SiGe virtual substrates (VS) as mobility boosters in nMOSFETs with gate length down to 80 nm was demonstrated. This concept was thoroughly investigated in terms of performance and leakage of the devices. In-situ doping of the relaxed SiGe was shown to be superior over implantation to suppress the junction leakage. A high channel doping could effectively suppress the source to drain leakage. / <p>QC 20100715</p>
7

Epitaxy and characterization of SiGeC layers grown by reduced pressure chemical vapor deposition

Hållstedt, Julius January 2004 (has links)
<p>Heteroepitaxial SiGeC layers have attracted immenseattention as a material for high frequency devices duringrecent years. The unique properties of integrating carbon inSiGe are the additional freedom for strain and bandgapengineering as well as allowing more aggressive device designdue to the potential for increased thermal budget duringprocessing. This work presents different issues on epitaxialgrowth, defect density, dopant incorporation and electricalproperties of SiGeC epitaxial layers, intended for variousdevice applications.</p><p>Non-selective and selective epitaxial growth of Si<sub>1-x-y</sub>Ge<sub>x</sub>C<sub>y</sub>(0≤x≤30, ≤y≤0.02) layershave been optimized by using high-resolution x-ray reciprocallattice mapping. The incorporation of carbon into the SiGematrix was shown to be strongly sensitive to the growthparameters. As a consequence, a much smaller epitaxial processwindow compared to SiGe epitaxy was obtained. Differentsolutions to decrease the substrate pattern dependency (loadingeffect) of SiGeC growth have also been proposed. The key pointin these methods is based on reduction of surface migration ofthe adsorbed species on the oxide. In non-selective epitaxy,this was achieved by introducing a thin silicon polycrystallineseed layer on the oxide. The thickness of this seed layer had acrucial role on both the global and local loading effect, andon the epitaxial quality. Meanwhile, in selective epitaxy,polycrystalline stripes introduced around the oxide openingsact as migration barriers and reduce the loading effecteffectively. Chemical mechanical polishing (CMP) was performedto remove the polycrystalline stripes on the oxide.</p><p>Incorporation and electrical properties of boron-doped Si<sub>1-x-y</sub>Ge<sub>x</sub>C<sub>y</sub>layers (x=0.23 and 0.28 with y=0 and 0.005) with aboron concentration in the range of 3x10<sup>18</sup>-1x10<sup>21</sup>atoms/cm3 have also been investigated. In SiGeClayers, the active boron concentration was obtained from thestrain compensation. It was also found that the boron atomshave a tendency to locate at substitutional sites morepreferentially compared to carbon. These findings led to anestimation of the Hall scattering factor of the SiGeC layers,which showed good agreement with theoretical calculations.</p><p><b>Keywords:</b>Silicon germanium carbon (SiGeC), Epitaxy,Chemical vapor deposition (CVD), Loading effect, Highresolution x-ray diffraction (HRXRD), Hall measurements, Atomicforce microscopy (AFM).</p>
8

Paramètres matériau pour la simulation de transistors bipolaires à hétérojonctions Si/SiGe et Si/SiGeC

Michaillat, Marc 10 February 2010 (has links) (PDF)
Dans cette thèse, un algorithme de simulation Monte Carlo est spécifiquement développé pour modéliser le transport homogène et stationnaire des porteurs de charge dans les alliages aléatoires ternaires massifs de type SiGeC. Le simulateur Monte Carlo intègre une description numérique Full-Band de la structure de bande, et il est adapté à la simulation du transport des électrons et des trous. Les mécanismes d'interaction modélisés incluent l'interaction porteur-phonon, l'ionisation parvchoc, la diffusion sur potentiel d'alliage, l'interaction porteur-impureté ionisée, et le principe d'exclusion de Pauli. Les modèles théoriques sont calibrés sur un ensemble complet de résultats expérimentaux, et un accord quantitatif est atteint entre la simulation et la mesure sur de nombreuses propriétés électriques, qui incluent la mobilité à faible champ, la vitesse de dérive, le coefficient d'ionisation et le ratio d'efficacité quantique. L'algorithme de simulation Monte Carlo final est capable de modéliser le transport des porteurs de charge majoritaires et minoritaires dans les alliages ternaires SiGeC dopés, relaxés ou biaxialement contraints sur substrat de silicium. Le modèle Monte Carlo développé peut être utilisé pour extraire les paramètres matériau requis dans les simulateurs hydrodynamiques de dispositifs, notamment dans le cadre de la simulation de transistors bipolaires à hétérojonction intégrant des bases de SiGeC fortement dopées et épitaxiées sur silicium. L'implémentation de paramètres électriques spécifiques aux alliages SiGeC nous ont permis de prendre en compte les profils de germanium, de carbone et de dopants dans les simulations hydrodynamiques de dispositifs TBH. Cette description rigoureuse des propriétés électroniques du matériau SiGeC au sein d'un dispositif TBH constitue l'état de l'art de la modélisation électrique des transistors bipolaires avancés.
9

SiGeC Heterojunction Bipolar Transistors

Suvar, Erdal January 2003 (has links)
Heterojunction bipolar transistors (HBT) based on SiGeC havebeen investigated. Two high-frequency architectures have beendesigned, fabricated and characterized. Different collectordesigns were applied either by using selective epitaxial growthdoped with phosphorous or by non-selective epitaxial growthdoped with arsenic. Both designs have a non-selectivelydeposited SiGeC base doped with boron and a poly-crystallineemitter doped with phosphorous. Selective epitaxial growth of the collector layer has beendeveloped by using a reduced pressure chemical vapor deposition(RPCVD) technique. The incorporation of phosphorous and defectformation during selective deposition of these layers has beenstudied. A major problem of phosphorous-doping during selectiveepitaxy is segregation. Different methods, e.g. chemical orthermal oxidation, are shown to efficiently remove thesegregated dopants. Chemical-mechanical polishing (CMP) hasalso been used as an alternative to solve this problem. The CMPstep was successfully integrated in the HBT process flow. Epitaxial growth of Si1-x-yGexCy layers for base layerapplications in bipolar transistors has been investigated indetail. The optimization of the growth parameters has beenperformed in order to incorporate carbon substitutionally inthe SiGe matrix without increasing the defect density in theepitaxial layers. The thermal stability of npn SiGe-based heterojunctionstructures has been investigated. The influence of thediffusion of dopants in SiGe or in adjacent layers on thethermal stability of the structure has also been discussed. SiGeC-based transistors with both non-selectively depositedcollector and selectively grown collector have been fabricatedand electrically characterized. The fabricated transistorsexhibit electrostatic current gain values in the range of 1000-2000. The cut-off frequency and maximum oscillation frequencyvary from 40-80 GHz and 15-30 GHz, respectively, depending onthe lateral design. The leakage current was investigated usinga selectively deposited collector design and possible causesfor leakage has been discussed. Solutions for decreasing thejunction leakage are proposed. <b>Key words:</b>Silicon-Germanium-Carbon (SiGeC),Heterojunction bipolar transistor (HBT), chemical vapordeposition (CVD), selective epitaxy, non-selective epitaxy,collector design, high-frequency measurement, dopantsegregation, thermal stability.
10

SiGeC Heterojunction Bipolar Transistors

Suvar, Erdal January 2003 (has links)
<p>Heterojunction bipolar transistors (HBT) based on SiGeC havebeen investigated. Two high-frequency architectures have beendesigned, fabricated and characterized. Different collectordesigns were applied either by using selective epitaxial growthdoped with phosphorous or by non-selective epitaxial growthdoped with arsenic. Both designs have a non-selectivelydeposited SiGeC base doped with boron and a poly-crystallineemitter doped with phosphorous.</p><p>Selective epitaxial growth of the collector layer has beendeveloped by using a reduced pressure chemical vapor deposition(RPCVD) technique. The incorporation of phosphorous and defectformation during selective deposition of these layers has beenstudied. A major problem of phosphorous-doping during selectiveepitaxy is segregation. Different methods, e.g. chemical orthermal oxidation, are shown to efficiently remove thesegregated dopants. Chemical-mechanical polishing (CMP) hasalso been used as an alternative to solve this problem. The CMPstep was successfully integrated in the HBT process flow.</p><p>Epitaxial growth of Si1-x-yGexCy layers for base layerapplications in bipolar transistors has been investigated indetail. The optimization of the growth parameters has beenperformed in order to incorporate carbon substitutionally inthe SiGe matrix without increasing the defect density in theepitaxial layers.</p><p>The thermal stability of npn SiGe-based heterojunctionstructures has been investigated. The influence of thediffusion of dopants in SiGe or in adjacent layers on thethermal stability of the structure has also been discussed.</p><p>SiGeC-based transistors with both non-selectively depositedcollector and selectively grown collector have been fabricatedand electrically characterized. The fabricated transistorsexhibit electrostatic current gain values in the range of 1000-2000. The cut-off frequency and maximum oscillation frequencyvary from 40-80 GHz and 15-30 GHz, respectively, depending onthe lateral design. The leakage current was investigated usinga selectively deposited collector design and possible causesfor leakage has been discussed. Solutions for decreasing thejunction leakage are proposed.</p><p><b>Key words:</b>Silicon-Germanium-Carbon (SiGeC),Heterojunction bipolar transistor (HBT), chemical vapordeposition (CVD), selective epitaxy, non-selective epitaxy,collector design, high-frequency measurement, dopantsegregation, thermal stability.</p>

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