Silicon-on-Insulator (SOI) micro-ring resonators (MRRs) are versatile elements in high-density integrated optics telecommunication systems. However, small inaccuracies in the fabrication process intensely deteriorate the response of SOI MRRs. By utilizing the racetrack resonator structures with strong coupling abilities, one can improve the fabrication tolerance. For the SOI racetrack resonators, the FSR is usually large. By introducing gratings into SOI racetrack resonators, the mutual mode coupling between the clockwise and counterclockwise modes can be induced and result in the resonance splitting. The grating-assisted SOI racetrack resonators can increase the operation wavelength and open up the possibility to overcome this limitation. In this thesis, we first use the 2-D FDTD method with the effective index method (EIM) to obtain the transmission spectra of the SOI racetrack resonators. The transmission spectra are then fitted by using the time-domain coupled mode theory (CMT) to obtain the quality factor and optical parameters of the SOI racetrack resonators. Next, we demonstrate the characteristics of mode splitting resulted from the mutual mode coupling between the clockwise and counterclockwise modes in the grating-assisted racetrack resonators by utilizing both the CMT and the 2-D FDTD method with the EIM. By tuning the grating configurations, such as the length or the structure of sidewall gratings, one can obtain the desired transmission spectrum of the grating-assisted racetrack resonators. Finally, we numerically investigate the temperature-dependent spectral characterics of the grating-assisted SOI racetrack resonator by taking the thermal-optic responce of the SOI materials into account. The thermal sensitivity of this device is 95.38 pm/¢XC, and the calculted properties can help the further designs based on the grating-assisted SOI racetrack resonators.

Developments in automotive (particularly hybrid electric vehicles), aerospace, and energy production industries over the recent years have led to expanding research interest in integrated circuit (IC) design toward high-temperature applications. A high-voltage, high-temperature SOI process allows for circuit design to expand into these extreme environment applications. Nearly all electronic devices require a reliable supply voltage capable of operating under various input voltages and load currents. These input voltages and load currents can be either DC or time-varying signals. In this work, a stable supply voltage for embedded circuit functions is generated on chip via a voltage regulator circuit producing a stable 5-V output voltage. Although applications of this voltage regulator are not limited to gate driver circuits, this regulator was developed to meet the demands of a gate driver IC. The voltage regulator must provide reliable output voltage over an input range from 10 V to 30 V, a temperature range of −50 ºC to 200 ºC, and output loads from 0 mA to 200 mA. Additionally, low power stand-by operation is provided to help reduce heat generation and thus lower operating junction temperature. This regulator is based on the LM723 Zener reference voltage regulator which allows stable performance over temperature (provided proper design of the temperature compensation scheme). This circuit topology and the SOI silicon process allow for reliable operation under all application demands. The designed voltage regulator has been successfully tested from −50 ºC to 200 ºC while demonstrating an output voltage variation of less than 25 mV under the full range of input voltage. Line regulation tests from 10 V to 35 V show a 3.7-ppm/V supply sensitivity. With the use of a high-temperature ceramic output capacitor, a 5-nsec edge, 0 to 220 mA, 1-µsec pulse width load current induced only a 55 mV drop in regulator output voltage. In the targeted application, load current pulse widths will be much shorter, thereby improving the load transient performance. Full temperature and input voltage range tests reveal the no-load supply current draw is within 330 µA while still providing an excess of 200 mA of load current upon demand.

The hydrogen (H2) gas sensing mechanism driving 3C-SiC resistive gas sensors is investigated in this work in which two hypotheses are proposed. One hypothesis involves the surface adsorption of H2 on the sensor surface with the adsorbed molecules influencing the flow of current in a resistive gas sensor, termed the surface adsorption detection mechanism. The second hypothesis includes the transfer of heat from the sensor to the gas, producing a change in the temperature of the device when the heat transfer characteristics of the gas change, termed the thermal detection mechanism. The heat transfer characteristics of the gas are dependent on the thermal conductivity of the gas, a property which is a strong function of gas composition. Thus, the thermal detection mechanism mainly detects changes in the thermal conductivity of a gas or gas mixture.Initial experiments suggested the surface adsorption mechanism as the detection mechanism of resistive 3C-SiC gas sensors. However, these experiments were performed in the absence of device temperature measurements. Recent experiments in which the device temperature was measured with a resistance temperature detector (RTD) in thermal contact with the device strongly support the thermal detection mechanism as being responsible for hydrogen gas detection. Experimental observations show the temperature of the resistive 3C-SiC hydrogen gas sensors changes greatly with changing hydrogen gas composition. For example, a 3C-SiC/SOI resistive sensor biased at 10 Vdc displayed a change in temperature from ~400°C to ~216°C, correlating to a change in current from ~41 mA to ~6mA, upon the introduction of 100% H2. The this 3C-SiC/SOI resistive sensor, this large decrease in temperature caused a large increase in resistance which is detected as a decrease in current. Several different experiments have also been performed to confirm the thermal detection mechanism hypothesis.

Στην εργασία αυτή γίνεται προσομοίωση της Διασταυρούμενης Διαμόρφωσης Φάσης που λαμβάνει χώρα σε ένα SOI κυματοδηγό υπό την προϋπόθεση της μηδενικής διασποράς. Για να καταλήξουμε στο μοντέλο προσομοίωσης παρουσιάζονται τα μη-γραμμικά οπτικά φαινόμενα τα οποία συμμετέχουν στο υπό μελέτη φαινόμενο καθώς επίσης και τα χαρακτηριστικά του κυματοδηγού που επιδρούν στην διάδοση του παλμού. Το τελικό μοντέλο λαμβάνει επίσης υπόψη του τις βασικές ιδιότητες του πυριτίου και τις διεργασίες που γίνονται σ’ αυτό κατά την διάρκεια της αλληλεπίδρασης του υλικού με την οπτική ακτινοβολία. Τα αποτελέσματα που δίνει το μοντέλο είναι η επίδραση της έντασης του παλμού άντλησης στην μεταβολή της φάσης του διαδιδόμενου κύματος και κατά συνέπεια την μεταβολή του μήκους κύματος. / In this work becomes simulation of Cross-Phase Modulation (XPM) that takes place in a silicon-on-insulator (SOI) waveguide under the condition less-dispersion. In order to we lead to the model of simulation are presented the nonlinear optical phenomena which participate in under study phenomenon as well as the characteristics of waveguide that affect in the propagation of pulses. The final model takes into consideration the basic properties of silicon and the activities that become in this at the duration of interaction of material with the optical radiation. The results that it gives the model are the effect of intensity of pump pulse in the change of phase of propagated wave and accordingly the change of wavelength.

This thesis describes the development and demonstration of a new technique for the fabrication of well-defined quantum dots in a bulk silicon substrate, for potential applications such as quantum computation in coupled quantum dots. Hall characterisation was performed on double-gated mesaMetal-Oxide- Semiconductor Field-Effect Transistors (MOSFETs) on a silicon-on-insulator (SOI) substrate, for the purpose of silicon quantum dots in etched nanowires on SOI. Carrier density and mobility results are presented, demonstrating top- and backgate control over the two inversion layers created at the upper and lower surfaces of the superficial silicon mesa. A new technique is developed enabling effective depletion gating of quantum dots in a bulk silicon substrate. A lower layer of aluminium gates is defined using electron beam lithography; the surface of these gates is oxidised using a plasma oxidation technique; and a further layer of aluminium gates is deposited. The lower gates form tunable tunnel barriers in the narrow inversion layer channel created by the upper MOSFET gate. The two layers of gates are electrically isolated by the localised layer of aluminium oxide. Low-temperature transport spectroscopy has been performed in both the many electron (∼100 electrons) and the few electron (∼10 electrons) regimes.Excited states in the bias spectroscopy provide evidence of quantum confinement. Preliminary temperature and magnetic field dependence data are presented. These results demonstrate that depletion gates are an effective technique for defining quantum dots in silicon. Furthermore, the demonstration of the first silicon radio-frequency single electron transistor is reported. The island is again defined by electrostatically tunable tunnel barriers in a narrow channel field effect transistor. Charge sensitivities of better than 10μe/√Hz are demonstrated at MHz bandwidth. These results establish that silicon may be used to fabricate fast, sensitive electrometers.

Thesis (doctoral)--Helsinki University of Technology, 2007. / Includes bibliographical references. Also available on the World Wide Web.

Univ., Habil.-Schr.--Kiel, 1999. / Literaturverz. S. [297] - 323.

Thesis (M.App.Sc.) - Carleton University, 2006. / Includes bibliographical references (p. 85-91). Also available in electronic format on the Internet.

Thesis (M.S.)--Rochester Institute of Technology, 2009. / Typescript. Includes bibliographical references (leaves 89-91).

Thesis (M.S.)--West Virginia University, 2002. / Title from document title page. Document formatted into pages; contains x, 113 p. : ill. (some col.). Includes abstract. Includes bibliographical references (p. 108-113).