Switching frequency modulation techniques, an inductor current sensing circuit for fast switching converter, and a dual converter are proposed, and the simulation results and experimental results are drawn. The experimental results for monotonic and pseudo-random modulation techniques show that the switching noise peak was effectively reduced as much as -19 dBc. The inductor current sensing circuit accurately tracks the output current of the switching converter that switches up to 30MHz. This current sensing circuit is used to drive the slow converter in the dual converter. The dual converter consists of a fast converter and a slow converter. The fast converter provides only the high frequency conponents in the output current, and the slow converter provides the majority portion of the output current with a higher efficiency. Therefore, the dual converter can have a fast transient response without sacrificing its efficiency. All chips are fabricated in a standard CMOS 0.18um process.

abstract: A wideband hybrid envelope tracking modulator utilizing a hysteretic-controlled three-level switching converter and a slew-rate enhanced linear amplifierer is presented. In addition to smaller ripple and lower losses of three-level switching converters, employing the proposed hysteresis control loop results in a higher speed loop and wider bandwidth converter, enabling over 80MHz of switching frequency. A concurrent sensor circuit monitors and regulates the flying capacitor voltage VCF and eliminates conventional required calibration loop to control it. The hysteretic-controlled three-level switching converter provides a high percentage of power amplifier supply load current with lower ripple, reducing the linear amplifier high-frequency current and ripple cancellation current, improving the overall system efficiency. A slew-rate enhancement (SRE) circuit is employed in the linear amplifier resulting in slew-rate of over 307V/us and bandwidth of over 275MHz for the linear amplifier. The slew-rate enhancement circuit provides a parallel auxiliary current path directly to the gate of the class-AB output stage transistors, speeding-up the charging or discharging of out- put without modifying the operating point of the remaining linear amplifier, while maintaining the quiescent current of the class-AB stage. The supply modulator is fabricated in 65nm CMOS process. The measurement results show the tracking of LTE-40MHz envelope with 93% peak efficiency at 1W output power, while the SRE is disabled. Enabling the SRE it can track LTE-80MHz envelope with peak efficiency of 91%. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2019