This thesis demonstrates the effective use of low temperature molecular beam epitaxy to encapsulate planar Si:P (phosphorus-in-silicon) devices lithographically patterned by scanning tunnelling microscopy (STM) without significant redistribution of the dopants. To achieve this goal, low temperature magnetotransport is used in combination with STM, Auger electron spectroscopy and secondary ion-mass spectrometry to analyse Si:P ??-doped samples fabricated under different doping and growth conditions. An important aspect of this project is the use of large 1 ?? 1 cm2 Si(001) samples which are about five times larger than standard STM samples. The larger sample size is necessary for post-STM fabrication lithography processes in a cleanroom but presents problems for preparing atomically clean surfaces. The ability to prepare clean and atomically flat Si(001) surfaces for STM lithography on such 1 ?? 1 cm2 samples is demonstrated, and it is shown that Si:P ??-doped layers fabricated on these surfaces exhibit complete electrical activation. Two dopant sources (gaseous PH3 and solid GaP source) were investigated to assess their compatibility with STM-lithography on the H:Si(001) surface. The findings show that while the PH3 and GaP sources result in near identical electrical qualities, only PH3 molecules are compatible with H-resist based lithography for controlled nano-scale doping. For achieving complete activation of the P dopants, it is shown that an anneal to ??? 350 ???C to incorporate P atoms into the Si surface prior to encapsulation is critical. While it is known that the presence of H during growth degrades the quality of Si epitaxy, investigations in this thesis indicate that it has no significant effect on dopant activation. Systematic studies performed to assess the impact of growth temperature recommend an encapsulation temperature of 250 ???C for achieving optimal electrical qualities with minimal dopant segregation. In addition, it is shown that rapid thermal anneals (RTAs) at temperatures &lt 700 ???C provide only marginal improvement in the electrical quality of Si:P ??-doped samples encapsulated at 250 ???C, while RTA temperatures &gt 700 ???C should be avoided due to the high probability of dopant redistribution. To elucidate the nature of 2D transport in Si:P ??-doped devices, a detailed analysis of the low temperature magnetotransport for Si:P ??-doped layers with doping densities in the range ??? 0.2 ??? 2 ?? 1014 cm???2 was carried out. Using conventional 2D theories for disordered systems, both weak localisation (WL) and electron-electron interactions (EEI) are shown to contribute almost equal corrections to the 2D conductivity. In particular, it is found that EEI can introduce a significant correction in the Hall coefficient RH (hence Hall density) especially in the low density/temperature regime and the need to correct for this when using the Hall density to estimate the activated electron density is highlighted. While the electronic mean free path in such highly doped ??-layers is typically &lt 10 nm making ballistic transport in these devices difficult to observe, the phase coherence length can extend to almost 200 nm at about 0.3???0.5 K for doping densities of ??? 1 ??? 2 ?? 1014 cm???2. Finally, the optimised encapsulation strategy developed in this thesis is applied to a 2D square device fabricated by STM. The device exhibits Ohmic conductivity with complete dopant activation. An analysis of its low temperature magnetotransport shows that the device behaves similarly to a Si:P ??-doped layer encapsulated under similar conditions, thus highlighting that the STM patterning process had no adverse effect on device quality.

This dissertation focuses on the development of integrated circuits that employ InAs quantum well electronic devices. There are two InAs quantum well electronic devices studied in this work, the first being the pseudomorphic InAs/In₀.₅₃Ga₀.₄₇As/AlAs resonant tunneling diode (RTD) grown on an InP substrate, and the second being the InAs/AlSb HEMT. Because of there is no semi-insulating substrate near the InAs lattice constant of 6.06 Å this work develops monolithic and hybrid integration methods to realize integrated circuits. For the case of hybrid RTD circuits, a thin-film integration method was developed to integrate InAs/In₀.₅₃Ga₀.₄₇As/AlAs RTDs to prefabricated CMOS circuits, and this technique was employed to demonstrate a novel RTD-CMOS comparator. To achieve higher speed circuit operation, a next-generation RTD fabrication process was developed to minimize the parasitic capacitance associated with the thin-film hybridization process. This improved fabrication process is detailed and yield and uniformity analysis is included. Similar InP-based tunnel diodes can be integrated with InP-based HEMTs in monolithic RTD-HEMT integrated circuits, and in this work elementary microwave circuit components were characterized that co-integrate InP-based tunnel diodes with HEMTs. In the case of the InAs/AlSb HEMT, the monolithic approach grows the HEMT on a metamorphic buffer on a GaAs substrate. The semiconductor material and process development of the InAs/AlSb HEMT MMIC technology is described. The remarkable microwave and RF noise properties of the InAs/AlSb HEMT were characterized and analyzed, with special attention given to the strong effects of impact ionization in the narrow bandgap InAs channel. Results showed the extent to which impact ionization affects the small-signal gain and noise figure of the HEMT, and that these effects become less prevalent as the frequency of operation increases.

We used self-assembling tunnel junctions (SATJs) to study the electron transport through films of the molecular magnets, Mn12-Acetate. Pulse laser deposition (PLD) was used to deposit two monolayers of Mn12-Acetate on thin Pt wires (diameter 0.001 in). The electron tunneling current was measured with typical bias voltages from -1 to 1 V at liquid helium temperature, 4.2 K. I, dI/dV , and d2I/dV 2 signals were directly acquired with the aid of a current amplifier and two lock-in-amplifiers. Results show that the differential conductance is approximately 10â 6 S for bias voltages 0.04 V < or =| V |< or = V and exhibits a strong voltage dependence. In the region | V |< or = 0.04 V, we find a zero-bias feature (ZBF) in which the differential conductance is suppressed. In some samples, we observe I -V staircases which we attribute to electrons "hopping" between the electrodes and the molecules. The observed hysteresis was attributed to the slow relaxation of molecules re-orienting within the junction. Abrupt conductance jumps at a bias voltage of -0.12 V were also observed and may indicate state transitions in the Mn12-Acetate molecules. Furthermore, we observed that the zero bias feature (ZBF) can switch from an enhancement to a suppression of the differential conductance. A dip and dry (DAD) method was also used to form films of Mn12-Acetate on Al and Pt wires. Although the conductances were similar to those obtained using the PLD method, there were some subtle differences. In particular, we did not observe the I -V staircases and the state jumps were more ambiguous. The differential conductance for the Mn12-Acetate films on Al wires were typically 10- 7 S, which we attributed to the oxide layer on Al surfaces. We have also found substantial changes in the I - V characteristics when the Pt wires coated with the Mn12-Acetate films were stored in 10-2 Torr for 6 months. In particular, we observed many new features such as peaks in the conductance as a function as the bias voltage. We believe that these effects may be caused by the slow oxidation of the Mn12-Acetate molecules.

Thesis (Ph. D.)--Lehigh University, 2000. / Includes vita. Includes bibliographical references (leaves 127-134).

Thesis (M. Sc.)--University of Alberta, 2010. / Title from pdf file main screen (viewed on Jan. 21, 2010). A thesis submitted to the Faculty of Graduate Studies and Research in partial fulfillment of the requirements for the degree of Master of Science in Applied Mathematics, Department of Mathematical and Statistical Sciences. Includes bibliographical references.

Thesis (Ph. D.)--University of Washington, 2001. / Vita. Includes bibliographical references (leaves 130-142).

Thesis (Ph. D.)--University of Texas at Austin, 2001. / Vita. Includes bibliographical references (leaves 337-351). Available also in a digital version from Dissertation Abstracts.

published_or_final_version / Chemistry / Master / Master of Philosophy

No description available.

A Metal-Insulator-Metal (MIM) diode is a device that can achieve rectification at high frequencies. The main objective of this research work is designing, fabricating, and characterizing thin film MIM diodes with single and multi-insulator layers. 
Cr/Al₂O₃/Cr and Pt/Al₂O₃/Al MIM diodes have been fabricated to show the impact of the materials on the current-voltage (I-V) curve. It is illustrated that the Cr/Al₂O₃/Cr MIM diode has a symmetrical I-V curve while the Pt/Al₂O₃/Al MIM diode has a very asymmetrical I-V curve. 
MIM diodes with single and multi-insulator layers have been fabricated to demonstrate the impact of the number of insulators on a MIM diode’s performance. It is found that by repeating two insulator layers with different electron affinities and keeping the total insulator thickness the same, the asymmetry and nonlinearity values show a significant improvement in a MIM diode. While the asymmetry of the diode with a double insulator layer (MI²M) is 3, it is 90 for the diode with a quadra insulator layer (MI⁴M), which 30 times greater than that of the MI²M diode.